Board Level Power Delivery Design Engineer in San Francisco

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Lead system signal integrity (SI) design for AI supercomputer product in the data center application. Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity Perform simulation and modeling to identify and troubleshoot signal integrity issues Lead system interconnect design, bring up and qualification As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings. You might thrive in this role if you: Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications Have a strong bias toward action, and won’t take no for an answer. Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level Have ex

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role You will work on the systems software strategy and execution that brings new AI silicon from first power-on to a fully integrated system running production-representative models at expected functionality and performance. You will define how software exercises and validates compute, memory, interconnect, and I/O subsystems, then build the diagnostics, automation, and observability needed to find issues quickly. This role sits at the center of silicon, firmware, platform, systems, and workload teams. You will turn hardware specifications and performance targets into an end-to-end bringup plan, drive cross-functional debug, and establish the stress and regression infrastructure that makes each new platform reliable across operating environments. In this role, you will: Contribute to the end-to-end software bringup and validation strategy for new silicon and first-party systems. Define software-driven test coverage across compute, memory, interconnect, I/O, and their system-level interactions. Build diagnostics, test automation, telemetry, and regression infrastructure that accelerate first-silicon learning and issue isolation. Lead bringup from initial silicon arrival through board and system integration, docking, runtime enablement, and model execution. Design stress tests that characterize reliability, performance, and stability across workloads and operating conditions. Translate architecture specifications and performance models into measurable acceptance crit

About the Team The Software Engineering Firmware team builds reliable, high-performance systems on custom hardware. We work closely with hardware engineers to design, optimize, and ship software that bridges cutting-edge devices and real-world constraints like memory, power, and latency. Our work spans early prototyping through product launch, ensuring that our embedded platforms are robust, efficient, and production-ready. About the Role As a Firmware Engineer , you will design, implement, and debug software for embedded devices. You’ll own low-level bring-up, write production C/C++ code, and partner closely with hardware teams to deliver reliable, high-performance systems. We’re looking for engineers with deep embedded expertise, strong debugging skills, and a passion for building systems that perform under real-world conditions. This role is based in San Francisco, CA . We use a hybrid work model of four days in the office per week and offer relocation assistance to new employees. In this role, you will: Design, implement, and debug software for embedded devices. Contribute to defining software requirements, interfaces, and test plans. Bring up and debug new boards. Analyze performance, memory, and power profiles and implement optimizations. Investigate field issues, perform root-cause analysis, and deliver robust fixes. Foster good software engineering practices. You might thrive in this role if you: Have deep experience shipping embedded systems (around 10+ years). Are proficient in C and C++. Are familiar with embedded toolchains, operating systems, and debugging tools. Have experience with both rapid prototyping and scalable product development. (Nice to have) Have experience with Zephyr RTOS. (Nice to have) Have worked with networking/wireless stacks (BLE, Wi-Fi). (Nice to have) Have experience with robotic system bring-up or Linux kernel development. About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose arti

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role OpenAI's Hardware organization builds supercompute platforms from silicon and boards to full rack-scale systems to power advanced AI workloads. This role owns end-to-end quality for high-speed interconnect hardware across the product lifecycle: early design influence, supplier/contract manufacturer readiness, qualification, ramp, and fleet quality in lab and data center environments. You will be the quality lead for advanced interconnect components and assemblies, including high-speed copper cables, cable cartridges, patch panels, backplane/cable-backplane solutions, high-speed connectors, and related electro-mechanical interfaces. You will partner closely with electrical, mechanical, SI/PI, systems, reliability, operations, and external vendors to prevent escapes and drive rapid, data-driven containment and corrective action. In this role you will: Own quality for advanced interconnect components and assemblies: high-speed connectors, high-speed copper cables, cable cartridges (e.g., cable cassette style assemblies), patch panels & optics, and backplane/cable-backplane interconnect solutions. Drive quality-by-design: participate in design reviews, DFM/DFx, tolerance stacks, material and plating selections, connector mating strategy, strain relief, and assembly methods to reduce variation and field failures. Define and track quality and reliability metrics (DPPM, yield, escapes, RMA/FRACAS trends, Cpk/Ppk where applicable) for interconnects across NPI and m

About the Team The Consumer Products team at OpenAI builds end-to-end hardware and software systems that bring AI into the physical world. We work at the intersection of custom silicon, embedded systems, operating systems, and cloud services to deliver reliable, production-ready devices at scale. Within Consumer Products, the camera stack is a critical sensing component. The team partners closely with electrical engineering, silicon vendors, systems, and higher-level perception and product teams to bring up new hardware, stabilize capture pipelines, and ensure camera systems are robust, debuggable, and ready for real-world deployment. This work spans early prototypes through production, with a strong emphasis on correctness, repeatability, and long-term reliability. About the Role As a Camera Firmware Engineer, you will own low-level camera enablement on custom hardware—from early board bring-up through stable production capture. You will develop and maintain the firmware and software that makes camera sensors reliable, controllable, and debuggable, forming the foundation for higher-level camera pipelines and product features. This role is highly hands-on and systems-oriented. You will work close to the hardware, diagnose real-world timing and integration issues, and build tooling that accelerates iteration across the entire camera stack. This role is based in San Francisco, CA. We follow a hybrid work model with four days per week in the office and offer relocation assistance to new employees. In This Role, You Will Bring up new camera sensors and modules on prototype and production boards, including link stability, sensor control, and correct power, reset, and clock sequencing. Develop and maintain low-level camera software, including sensor drivers, board configuration, and camera subsystem integration across hardware revisions. Enable and validate core capture paths for development and production, including RAW capture for debugging, still capture, and hardware-

What you’ll do Act as the in-house electrical lead for Midjourney Medical: own the electrical architecture of the scanner and the technical direction for all board-level design. Own complex board design end-to-end: architecture, schematic capture, layout (high-speed digital, analog/mixed-signal, power), DFM/DFT, fabrication and assembly vendor management, bring-up, and revision control. Write firmware for embedded targets (MCU/SoC): drivers, real-time control loops, safety-relevant logic, bootloaders, and field update paths. Audit and update HDL (FPGA) code for high-throughput data acquisition, timing/synchronization, triggering, and pre-processing of ultrasound and sensor data streams. Define electrical interfaces and data contracts with software, recon/ML and mechanical teams: timing budgets, clocking/sync, signal integrity, connectors/harnessing, and failure modes. Establish electrical engineering rigor: design reviews, schematic/layout review checklists, bring-up procedures, test fixtures, and documentation suitable for a regulated medical device program (DHF, traceability, change control). Mentor and grow the electrical function; select and manage external design partners where leverage is high. What we’re looking for Deep experience designing complex boards from blank page to stable revision, including high-speed digital and analog/mixed-signal domains. Strong schematic and layout skills (Altium/KiCad or equivalent) with real signal integrity, power integrity, grounding, and EMI/EMC instincts. Solid embedded firmware background in C/C++ (and Python for tooling): peripherals, DMA, interrupts, real-time constraints, and debugging on hardware. Practical HDL experience (VHDL/Verilog/SystemVerilog) for data acquisition, timing, and streaming interfaces. Track record of owning bring-up and debug on real hardware: scopes, logic analyzers, and disciplined root-cause analysis. Technical leadership: clear trade-offs, strong written documentation, and the ability to set

About the Team Our Robotics team is focused on unlocking general-purpose robotics and advancing toward AGI-level intelligence in dynamic, real-world environments. Working across the full model and systems stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the physical constraints of real-world systems to improve people’s lives. About the Role We are looking for a PCB Layout Engineer to design high-density electronics for next-generation robotic systems. You will own PCB layout from floor planning through fabrication release, working closely with electrical, SI/PI, mechanical, and manufacturing teams. This role is based in San Francisco and requires in-person presence four days per week. In this role, you will: Own PCB layout, component placement, routing, and fabrication release for complex robotic systems. Collaborate with SI/PI engineers to refine layouts based on simulation results. Implement high-speed routing, controlled impedance, power distribution, decoupling, grounding, EMI/EMC, thermal, and mechanical-integration requirements. Work directly with fabricators and assembly partners to define stack-ups, establish design rules, drive DFM/DFA/DFT reviews, and close findings before release. Prepare fabrication and assembly documentation, including drawings, ODB++, drill files, stack-up tables, and manufacturing notes. Inspect newly received PCBAs and participate in board-level manufacturing failure analysis. Contribute to reusable design constraints and layout workflows, and maintain component-library assets such as symbols, footprints, and 3D models. You might thrive in this role if you: Have 6+ years of experience designing complex, multilayer PCBs. Are fluent in Cadence Allegro PCB Designer and Constraint Manager. Have strong HDI design experience, including fine-pitch BGAs, microvias, blind and buried vias, via-in-pad, and sequential lamination.

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Washington D.C., London and Amsterdam. The Compensation team designs, manages, and evolves Plaid’s compensation strategy to attract, retain, and motivate world-class talent. We make sure compensation is fair inside the company and competitive in the market. We work on programs that connect directly to Plaid’s business goals and employee experience — using data and insight to make equitable, well-informed decisions. Our work spans cash and equity program design, annual and mid-year review cycles, benchmarking, and exec comp support. In this role, you will own compensation support for specific client groups and take the lead on cycle operations and comp tooling across the team. You’ll work alongside a sharp team and closely with Plaid’s Head of Total Rewards. You’ll have clear ownership of your domain from day one, with real exposure to equity program mechanics, exec comp, and board-level deliverables. Responsibilities: Own comp support for specific client groups — offers, promos, manager/HRBP questions — with a high bar for speed and accuracy Lead configuration and rollout of annual and mid-year compensation cycles in Workday and comp tooling Manage and maintain Plaid’s comp systems: Compa, Pave, and external survey tools (Compensia, Radf

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Seattle, Washington D.C., Raleigh, London, and Amsterdam. We are looking for a Senior Financial Analyst to join the Corporate Finance team. This is the strategic, externally-oriented arm of the team — covering the board process, long range planning, capital structure, SBC and equity modeling, and enterprise-level financial strategy. You will partner closely with the CFO, Leadership, the Board, Corp Dev, and Accounting on the decisions that shape Plaid’s long-term financial trajectory. What excites us: 5+ years of work experience including financial planning & analysis, corporate finance, investment banking, private equity, strategic finance, or management consulting — ideally with tech, SaaS, or fintech exposure. Advanced financial modeling skills, with hands-on experience building long range, scenario/sensitivity, or valuation models. Strong command of consolidated financial statements, key SaaS / fintech operating metrics, and external benchmarking. Excellent communication and storytelling skills — able to move fluidly between granular model detail and an executive-level narrative for senior leaders and the Board. Proven ability to partner cross-functionally and distill complex, ambiguous topics into structured frameworks and clear

What you’ll do Be the generalist EE for the scanner system: integration, bring-up, debugging, and making the electrical side of the device reliable and serviceable. Own ultrasound experimentations that feeds the image reconstruction team Design and execute experiment setups for transducer characterization (element sensitivity, bandwidth, cross-talk mapping, beam profile measurements) and ex vivo / phantom clinical testing. Acquire, process, and analyze RF and baseband signals for data quality assessment and benchmarking. Design simple boards and adapters as needed (monitoring, power/safety, interface/conditioning), and take them from prototype through a stable revision. Prototype quickly, then harden what works: wiring/harnessing, grounding, safety interlocks, and reliable integration across subsystems. Own practical test setups and documentation (fixtures, scripts, procedures) that make experiments repeatable and results comparable over time. What we’re looking for Strong hands-on EE background with experience building, debugging, and iterating on real systems in the lab. Solid understanding of signal processing fundamentals — knows what to measure, how to condition and digitize it, and how to evaluate signal quality in the context of an imaging system (SNR, bandwidth, dynamic range, artifacts). Comfortable spanning system integration + occasional design work (schematics/layout reviews or light PCB design) in a fast-moving environment. Ability to work at the boundary between hardware and algorithms: measure reality, communicate constraints, and help close gaps vs simulation. High agency and practicality: able to set up experiments, get trustworthy data, and unblock others on a lean team. Useful experience Analog/mixed-signal, or high-speed data capture experience; strong instincts for instrumentation and noise/debugging. Ultrasound or acoustic sensor handling: hydrophone calibration and field mapping, transducer impedance characterization, element-level sensitivity

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Washington D.C., London and Amsterdam. We are looking for a Senior Financial Analyst to join the Corporate Finance team. This is the strategic, externally-oriented arm of the team — covering the board process, long range planning, capital structure, SBC and equity modeling, and enterprise-level financial strategy. You will partner closely with the CFO, Leadership, the Board, Corp Dev, and Accounting on the decisions that shape Plaid’s long-term financial trajectory. What excites us: 5+ years of work experience including financial planning & analysis, corporate finance, investment banking, private equity, strategic finance, or management consulting — ideally with tech, SaaS, or fintech exposure. Advanced financial modeling skills, with hands-on experience building long range, scenario/sensitivity, or valuation models. Strong command of consolidated financial statements, key SaaS / fintech operating metrics, and external benchmarking. Excellent communication and storytelling skills — able to move fluidly between granular model detail and an executive-level narrative for senior leaders and the Board. Proven ability to partner cross-functionally and distill complex, ambiguous topics into structured frameworks and clear recommendations. P

About the Role We are seeking a senior Treasury Markets leader to build and lead OpenAI's investment management, FX, interest rate risk management, and debt markets capabilities. This role will own corporate liquidity investment strategy, global currency risk, rate exposure, and the design of market-risk programs across rates, FX, liquidity, counterparty, and other Treasury exposures. The ideal candidate combines CFA-level investment discipline, hands-on derivatives and capital markets execution, strong tax and accounting fluency, and exceptional executive communication. They should be able to translate complex market, hedge, liquidity, capital structure, credit market, rating agency, tax, accounting, risk, and governance topics into crisp executive-ready recommendations, decision memos, and Board-level materials. In this role, your responsibility will include: Investment Management Own investment strategy for corporate cash and liquidity portfolios, balancing capital preservation, liquidity, yield, diversification, counterparty risk, accounting, tax, and regulatory considerations. Lead portfolio construction, investment policy governance, risk monitoring, performance reporting, manager/counterparty oversight, and compliance for corporate investment portfolios. Maintain market intelligence on rates, credit, liquidity markets, fixed income products, external manager performance, and emerging portfolio risks. FX & Cash Flow Hedging Design and operate FX balance sheet and cash flow hedging programs that align exposure management, hedge objectives, accounting treatment, tax considerations, controls, and business needs. Manage FX and derivatives activity across global operations, including exposure analytics, hedge strategy, trade execution, counterparty management, effectiveness tracking, and reporting. Partner deeply with Accounting, Tax, FP&A, Legal, and business leaders to improve exposure visibility and ensure hedge programs are operationally controlled and

About the Team OpenAI’s Governance team helps shape how the company responsibly develops and deploys increasingly capable AI. We bring together technical evidence, policy, and operational perspectives to help the company address emerging risks, resolve difficult questions, and make well-supported decisions. Our work includes shaping and improving governance practices, supporting effective oversight, developing clear assessments and recommendations, and ensuring that decisions lead to action. We work closely with research, safety, security, legal, and product teams to identify gaps, reconcile different views, and improve our approach as capabilities and circumstances change. About the Role We are looking for a curious, high-agency Research Program Manager who can reason from first principles, make sense of incomplete or conflicting information, and move difficult work forward. You will help shape the substance of governance reviews, connect ideas and evidence across teams, and develop recommendations that are both well-founded and practical. The work requires someone who can use established approaches where they fit, recognize when circumstances call for a different approach, and update their thinking as new evidence emerges. You should bring sound judgment, a willingness to experiment and learn, and the program-management discipline to turn good analysis into action. Depending on your experience and the team’s needs, your work may focus on safety advisory and board-level oversight, deployment governance, or standards and strategic partner commitments. In this role, you will: Bring together technical, policy, and operational inputs to develop coherent assessments, recommendations, and decision materials for governance bodies and senior leaders. Work through emerging or ambiguous questions, test assumptions, identify gaps or conflicting evidence, and help determine what additional analysis or decisions are needed. Engage critically with research, evaluations, safeguar

Who We Are Notion is the collaborative AI workspace where teams and agents think together . We're building one place where your knowledge, projects, meetings, and AI tools live side by side, so work is faster, clearer, and less fragmented. Millions of individuals, small teams, and large companies run their work on Notion. Notinos (our employees) are customer zero in bringing this future of work to life. We care about craft, building things that last, and the belief that great work is still fundamentally human. Our goal isn’t to ship the next feature. Each and every team of Notinos is working to set the standard for how humans work together in the AI era. From building a business’s system of record to making and managing AI agents to automating away the busy work, we care deeply about giving our customers more time for their life’s work. About the Role: As our GTM Compensation Lead on Commercial Operations, you’ll own commissions strategy, design, and execution for GTM. This is an opportunity to evolve how GTM Comp supports a growing GTM org through Notion’s AI-era selling motion and Enterprise growth. You’ll set the incentive systems that shape how our sellers focus, partner, and grow with customers. On a typical week, you’ll work with senior GTM leaders — including the Head of Sales and geo leaders — to translate business priorities into clear, accurate, scalable comp programs. What You'll Achieve: By your 90th day, map the current GTM Comp operating model and publish a roadmap for evolving the function as GTM grows. Introduce AI quick wins that improve the quality of work: triage inbound questions, help reps estimate payouts, flag discrepancies across systems, and automate reminders tied to the comp calendar. Build a planning-cycle framework that makes design inputs, trade-offs, decision rights, and timelines clear across GTM, Finance, and Commercial Operations. Provide board-level updates, including clear reporting on plan health, payout accuracy, systems quality

About the Team The Strategic Finance team provides financial insights and guidance to support the organization's long-term goals and strategies. We partner across the business to allocate and deploy our resources for the highest impact outcomes. About the Role We are hiring a Hardware Finance Manager, Consolidations & Systems to own the consolidated financial reporting, forecasting cadence, and financial systems across our hardware organizations (Io and Robotics). This role sits at the intersection of Hardware Finance, central FP&A, Accounting, and Finance Systems, and is responsible for ensuring leadership has a single, accurate, and timely financial view of the hardware business. This role will serve as the embedded owner of the hardware financial backbone, with end-to-end responsibility for consolidated P&L reporting, forecasting and variance analysis, and the systems and processes that enable scalable, decision-ready insights. You will help ensure hardware financials are consistent, auditable, and fit for executive and board-level decision-making as the organization scales in size, complexity, and capital intensity. We have a strong preference for candidates who can be based in our San Francisco HQ. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will oversee multiple areas of responsibility: Own end-to-end consolidated financial reporting for all hardware organizations (Io and Robotics), delivering a single, integrated P&L view across R&D, Product, Revenue, COGS, and OpEx. Establish and run the hardware financial operating cadence, including monthly close, forecasting, reforecasting, and variance analysis, ensuring consistency and accountability across teams. Serve as a key finance partner to Hardware Finance leads, central FP&A, and Accounting, aligning bottoms-up plans with accounting actuals and enterprise reporting requirements. Build and maintain consoli