Engineer 3 in United States

Job Details: Job Description: The Thin Films Senior Process Engineer will support PVD, CVD, and ALD technologies for dielectric and metal thin-film deposition in a high-volume manufacturing environment. Key Responsibilities Apply advanced expertise in thin-film deposition processes to drive continuous improvement in process performance, sustainment, and technology development. Collaborate with upstream and downstream partners to deliver manufacturing improvements through strong cross-functional engagement and stakeholder management. Own manufacturing processes and/or equipment, ensuring achievement of key performance indicators (KPIs) including safety, quality, cost, productivity, defect reduction, and yield improvement. Develop and execute strategic plans for complex projects, coordinating timelines and dependencies across multiple teams and initiatives. Support manufacturing capacity expansion and technology transfer activities to enable successful ramp-to-volume production. Partner with equipment vendors and cross-functional stakeholders to troubleshoot technical challenges, improve tool performance, and enhance operational efficiency. Lead process development initiatives that support current and next-generation high-volume manufacturing technologies. Design and optimize excursion prevention and detection systems to strengthen process control and minimize manufacturing risk. Lead equipment installation, conversion, qualification, and readiness activities during factory ramps, ensuring all tools are deployed safely, on schedule, and in compliance with quality and manufacturing standards. Drive root cause analysis and implement corrective actions to resolve process and equipment-related issues while improving overall manufacturing stability and performance. <p st

About the Team Consumer Monetization builds the experiences and systems that power how customers purchase and pay for OpenAI products. Our scope spans purchasing flows, payments, subscriptions, and billing, along with the shared capabilities that support new products, offers, and distribution channels. We own both customer-facing experiences and the underlying platforms that power them. We partner closely with Product, Design, Growth, Data Science, and engineering teams across OpenAI to make purchasing effective and reliable, and new offerings easier to launch and monetize. About the Role We’re looking for experienced Staff+ engineers with deep iOS or Android expertise and demonstrated experience contributing beyond mobile to frontend web or backend development. You’ll shape and build purchasing and subscription experiences across mobile applications, web, and supporting product APIs. The work spans improving conversion, performance, and reliability, building reusable components, and enabling new product launches. You’ll combine product judgment with technical depth to set direction, lead initiatives across teams, and remain hands-on through implementation and delivery. Approximately 50% of the work will initially be native mobile development, with the remainder across web and product APIs. We’re looking for engineers who enjoy working across the stack and have concrete examples of doing so professionally. Depth in either iOS or Android is required; experience in both is not required. This role is based in San Francisco, with three days per week in the office. In this role, you will: Architect and build purchasing and subscription experiences across native mobile, mobile web, and supporting product APIs. Partner with Product, Design, and Growth to identify customer needs, prioritize improvements, and shape technical direction for purchasing experiences. Improve conversion, performance, and reliability through experimentation, product analytics, and customer insights

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsible for understanding the processes used to assess and mitigate risks related to the introduction of new package technologies so that you can improve efficiency and effectiveness by implementing automation, data analysis and machine learning/AI solutions. Set up data bases, develop data ingestion pipelines, and implement automated data analysis and reporting tools. Support problem solving and risk assessment for internal or customer quality issue by pulling and analyzing data. Contribute to the advancement of technology at Micron through mentoring, publishing technical papers (internal and external), and developing innovative solutions to challenging problems. Implement Automation, Data Analysis, and AI Solutions. Collaborate with Engineering teams to Map Package DDQA processes and data streams. Set up and optimize databases and develop solutions to improve efficiency and effectiveness. Understand the needs of internal customers and develop solutions. Support Problem Solving and Risk Assessment for Quality Issues. Pull relevant product information, manufacturing data, and reliability data based on given problem statements. Determine the appropriate dataset and treatment required to answer questions posed by problem solving teams. This could include producing data visualizations, machine learning models, statistical inferences, and web applications. Provide recommendations about root cause findings and product risk, based on data analysis. Collaboratively Communicate Findings and Best Practices. Share best practices with global teams to enable a cultur

Location: Remote (U.S.) Clearance: U.S. Citizen or Permanent Resident Required with the ability to obtain a Public Trust Salary Range: 110K – 125K LTS is seeking a Senior Security RMF Engineer to join a cybersecurity transformation surge team supporting the VA.gov Platform. This role will serve as the bridge between VA security/RMF requirements and the engineers responsible for implementing those requirements across VA.gov. The Senior Security / RMF Engineer must understand how security controls are implemented in modern cloud infrastructure and software delivery environments and be able to translate control deficiencies, authorization requirements, and security risks into actionable engineering work.This is not intended to be a documentation-only compliance role. This individual will work closely with DevSecOps engineers and the existing VA.gov Platform ATO/security team to assess the current security posture, address gaps in VA.gov's Critical Controls, support ATO/cATO readiness, improve authorization artifacts, and automate evidence and control assessment wherever possible. The PWS specifically describes the desired model as one in which ATO/RMF documentation confirms security rather than defines it, with success measured through risk reduction and security outcomes rather than paperwork completeness. What You’ll Do: Assess VA.gov Platform compliance with the 18 Critical Controls identified by VA and help establish a baseline of current implementation and remaining gaps. Perform security reviews, gap analyses, and risk assessments across VA.gov Platform infrastructure, pipelines, applications, and component systems. Support ongoing ATO and cATO readiness for the VA.gov Platform authorization boundary. Develop, update, and maintain RMF and authorization artifacts, including System Security Plans (SSPs), control narratives, POA&Ms, Business Impact Analyses (BIAs), Privacy Threshold Analyses (PTAs), and supporting evidence. Evaluate identified

Job Details: Job Description: The Role and Impact We are seeking a Module Engineer to play a pivotal role in advancing Intel's high-volume manufacturing capabilities. In this position, you will oversee critical equipment and processes that enable the production of cutting-edge integrated circuits, driving innovation in device miniaturization and semiconductor excellence. Your expertise will directly impact production efficiency, quality, and yield, ensuring Intel maintains its leadership in the semiconductor industry. Business Group Join Intel Corporation's Engineering team, which is dedicated to enabling the rapid advancements of semiconductor manufacturing technologies. This group supports Intel's broader mission of delivering world-class technology solutions by optimizing manufacturing processes, ensuring high-quality outputs, and transferring technology globally. As part of this team, you will collaborate across regions to shape the future of semiconductor innovation. Key Responsibilities - Operate and optimize high-volume manufacturing equipment and processes to maintain control over critical dimensions and defectivity. - Conduct tests and measurements to evaluate equipment and process performance, recommending and implementing modifications to improve productivity and quality. - Execute maintenance, repair, and upgrades for assigned equipment and modules to ensure consistent operational excellence. - Lead continuous improvement initiatives focused on enhancing safety, productivity, cost efficiency, and yield. - Develop and implement excursion prevention systems to detect and address discrepant materials or activities in equipment and processes. - Facilitate technology transfer to global manufacturing sites through training, audits, and documentation to ensure consistent processing across locations. - Oversee installation, conversion, and qualification of

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is advancing a historic $15 billion investment in semiconductor manufacturing in Boise, Idaho, with DRAM production planned for the second half of the decade. As a global leader in memory and storage solutions, Micron is investing more than $150 billion worldwide over the next decade to expand groundbreaking manufacturing capabilities and drive innovation across the semiconductor industry. Join the Boise expansion team and help build the future of semiconductor manufacturing. You will work alongside experienced engineers to develop advanced processes, solve complex manufacturing challenges, and support the production of technologies that power everything from artificial intelligence to next-generation computing systems. As a Dry Etch Process Engineer, you will contribute to the development, optimization, and sustainment of semiconductor manufacturing processes. You will gain hands-on experience in a brand new fabrication environment, working with multi-functional teams to improve yield, quality, reliability, and productivity. This is an excellent opportunity to apply engineering fundamentals, develop technical expertise, and grow your career in semiconductor manufacturing. Responsibilities Support the development and optimization of dry etch processes to improve product performance, yield, and manufacturing efficiency. Analyze process and manufacturing data to identify trends, solve issues, and implement corrective actions. Partner with process integration, equipment,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. About Fab 4 Wet Process Operations Fab 4 Wet Process Operations supports the safe, efficient, and high-quality movement of wafers through the Wet Process area. Our team works closely with peer manufacturing areas, Process teams, Equipment teams, and many other organizations to supervise fab performance, manage production risks, optimize cycle time, and drive execution against move targets. Through real-time decision making and continuous improvement, we help ensure the fab meets customer and business commitments. Position Summary The Shift Manufacturing Engineer (ME) is responsible for driving daily fab performance within the assigned area. This role partners closely with Manufacturing Technicians, Shift Lead Engineers, Process Engineers, and Operations teams to achieve wafer move targets, optimize cycle time, respond to quality concerns, and maintain efficient workflow through the manufacturing line. Working on a 12-hour compressed workweek schedule, this position provides real-time operational leadership by identifying manufacturing constraints, supervising material flow, supporting production decisions, and driving actions needed to meet weekly wafer movement and wafer-on-hand objectives. Responsibilities: Supervise wafer movement performance by DID, process step, and operational targets. Identify manufacturing gaps, WIP imbalances, bottlenecks, and workflow disruptions. Develop and implement plans to close gaps and achieve weekly move and wafer-on-hand commitments.</l

F/A-18 Senior Systems Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) is seeking a Senior Systems Engineer to join the F/A-18 Systems Engineering Integration and Test (SEIT) Team in Berkeley, MO . The Senior Systems Engineer is responsible for leading cross-functional integration to drive engineering excellence in the execution of our F/A-18 software development activities. The individual selected for this role will be primarily focused on the Technical Integration role for Software Development and Advanced Systems activities. Position Responsibilities Ensure Engineering Excellence: Responsible for leading integration across multiple engineering and program teams to ensure safety, technical excellence, and product integrity. Drives adherence to Boeing and program processes, setting high standards for quality and performance Systems Engineering Approach: Ensure an integrated systems engineering approach. Take ownership to manage requirements and ensure full traceability. Manage the configuration of the integrated system to ensure dependencies are well understood. Responsible for ensuring comprehensive certification and verification activities, demonstrating a commitment to excellence Build Strategic Partnerships: Develop and nurture strong relationships with the United States Navy (USN), engineering functions, and program management. Leverage these partnerships to enhance collaboration and drive program success Manage Technical Baseline: Oversees the technical baseline, including mission systems configuration, technical performance measures, architecture diagrams, and Risk Identification and Opportunity (RIO) assessments. Foster

PWI R&D Writing Systems Engineer Description - A Writing Systems Engineer is an experience individual contributor responsible for owning system-level performance of industrial inkjet web presses , with a strong emphasis on hands-on engineering, on-press troubleshooting, and technical leadership . This role leads complex problem solving across ink, printhead, media, firmware, and mechanical systems, driving print quality, reliability, and robustness through a combination of deep systems thinking and direct experimentation . The specialist serves as a key decision-maker in resolving ambiguous, cross-functional issues and ensuring successful product delivery. Responsibilities Hands-on system ownership & advanced troubleshooting (Primary) Serve as the technical owner for system-level performance , including print quality, reliability, and production robustness Lead hands-on troubleshooting on industrial web presses , diagnosing complex print defects (banding, mottle, nozzle behavior, edge effects, etc.) Design and execute on-press experiments (DOEs) to isolate root causes and quantify system sensitivities Drive root cause analysis across subsystems (ink formulation, printhead, firmware, mechanics, media) and implement corrective actions Support press bring-up, ramp, customer escalations, and field issues , often in high-pressure situations requiring rapid, data-driven decisions Translate real-world press behavior into actionable engineering insights and design improvements System design & integration leadership Define and develop system-level solutions to optimize ink/media interactions, printhead performance, and image quality Lead integration of subsystems (ink, printheads, m

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are BS in Electrical or Computer Engineering (or equivalent experience) with 5+ years in Physical Design CAD methodology at advanced nodes. Proven track record improving PPA and/or runtime on high-performance, low-power taped-out designs. Hands-on with industry-standard EDA tools (e.g., Fusion Compiler) across synthesis, P&R, STA, signoff, and hierarchical flows. Strong Python/Tcl and data skills, with interest or experience in ML frameworks (PyTorch, TensorFlow), and the ability to drive complex projects independent

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard industry PV tools, and collaborate across RTL, PD, CAD, and packaging teams to achieve successful tapeouts. If you thrive in a fast-paced environment and enjoy solving complex challenges in cutting-edge silicon, we’d love to hear from you. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout closure. A hands-on problem solver who excels at debugging and driving signoff through complex verification flows. A collaborative team player who works effectively across RTL, PD, CAD, and foundry interfaces. A mentor and technical leader passionate about building efficient, manufacturable silicon. What We Need BS/MS in Electrical/Electronics Engineering (or related) with 7–14 years of hands-on CPU/IP/SoC physical verif

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

Staff -Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debu

About the Team The Applied AI Engineering team partners closely with customers to help them move from experimentation to production with OpenAI’s technologies. We act as trusted technical advisors, working across customer strategy, architecture, deployment, and adoption to help organizations realize meaningful impact from frontier AI. The Startups segment serves fast-moving, high-growth companies that are often building new products, workflows, and businesses directly on top of AI. These customers move quickly, operate with high ambiguity, and expect practical, creative, and technically rigorous partnership. About the Role We are looking for an Applied AI Engineering Manager, Startups to lead and scale the Startups Applied AI Engineering motion. This team helps high-growth startups move quickly from experimentation to production, unlock meaningful usage, and build durable technical partnerships with OpenAI. This leader will operate in a high-velocity customer segment where founders, CTOs, and technical teams expect speed, judgment, and hands-on problem-solving. They will balance team leadership, technical depth, customer prioritization, and cross-functional influence across Sales, Product, Engineering, Research, and broader go-to-market teams. In this role, you will define how OpenAI supports startup customers at scale: identifying where deep technical engagement can unlock outsized impact, building repeatable deployment mechanisms, and ensuring the team can serve a broad and dynamic customer base without losing quality or strategic focus. In this role, you will: Craft and continuously refine the strategic vision and operating model for the Startups Applied AI Engineering team, aligning it with OpenAI’s broader company objectives and the evolving needs of high-growth startup customers. Lead, mentor, and grow a team of high-performing technical ICs supporting startup customers across AI-native, developer-led, and product-led companies. Help startups move from early e

About the Team The Applied AI Engineering team is responsible for helping customers turn frontier AI capabilities into real products, workflows, and business impact. We act as trusted technical partners across solution design, architecture, implementation, evaluation, and adoption, working alongside customers to build and scale effective AI applications with OpenAI’s technologies. The Codex Applied AI Engineering team focuses on helping organizations transform how software is built with AI. We partner directly with engineering teams and technical leaders to integrate Codex into their software development lifecycle — from identifying high-impact use cases and designing AI-enabled workflows to implementation, evaluation, and scaled adoption. Our work helps ensure AI-powered software development is effective, reliable, secure, and deeply integrated into how engineering organizations operate. About the Role We are seeking an experienced technical leader to join as Manager, Applied AI Engineering (Codex) , leading a team of Applied AI Engineers responsible for driving successful Codex adoption across strategic customers. Your team will work hands-on with customer engineering organizations to design and build AI-enabled development workflows, solve complex implementation challenges, and establish scalable patterns for AI-powered software development. As a manager, you will shape how these technical engagements operate at scale — setting strategy, coaching engineers, determining where the team can have the greatest impact, and ensuring consistently strong execution across customers. You will serve as both a people leader and senior technical advisor, partnering closely with Sales, Product, Research, and Engineering to translate customer needs and real-world usage into better technical approaches, reusable patterns, and product insights. Success in this role will be measured by meaningful and sustained Codex adoption, successful customer outcomes, and the creation of repeat