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Active6mo ago

Full-Chip Physical Design Verification Engineer

Tenstorrent·📍 Austin, Texas, United States

Employment

FULL TIME

Work mode

On-site

Experience

7–14 years

Salary

C$100K – C$500K/yr

Role overview

Job description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard

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About this listing

  • Source: Tenstorrent's official careers site (via Greenhouse) · last confirmed on the source 3 Nov 2026
  • Posted 1 May 2026

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What they are looking for

Skills & requirements

pythonai

Qualification

export license for persons whose most recent country of citizenship or permanent residence is a U.S; As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S

Department · Advanced Physical Design

Hiring company

Tenstorrent

Technology

Tenstorrent is a next-generation computing company that builds computers for AI. Headquartered in the U.S. with offices in Austin, Texas, and Silicon Valley, and global offices in Toronto, Belgrade, Seoul, Tokyo, and Bangalore, Tenstorrent brings together experts in the field of computer architecture, ASIC design, RISC-V technology, advanced systems, and neural network compilers.

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