Engineer 4 in United States

Job Details: Job Description: The Role and Impact We are seeking a Module Engineer to play a pivotal role in advancing Intel's high-volume manufacturing capabilities. In this position, you will oversee critical equipment and processes that enable the production of cutting-edge integrated circuits, driving innovation in device miniaturization and semiconductor excellence. Your expertise will directly impact production efficiency, quality, and yield, ensuring Intel maintains its leadership in the semiconductor industry. Business Group Join Intel Corporation's Engineering team, which is dedicated to enabling the rapid advancements of semiconductor manufacturing technologies. This group supports Intel's broader mission of delivering world-class technology solutions by optimizing manufacturing processes, ensuring high-quality outputs, and transferring technology globally. As part of this team, you will collaborate across regions to shape the future of semiconductor innovation. Key Responsibilities - Operate and optimize high-volume manufacturing equipment and processes to maintain control over critical dimensions and defectivity. - Conduct tests and measurements to evaluate equipment and process performance, recommending and implementing modifications to improve productivity and quality. - Execute maintenance, repair, and upgrades for assigned equipment and modules to ensure consistent operational excellence. - Lead continuous improvement initiatives focused on enhancing safety, productivity, cost efficiency, and yield. - Develop and implement excursion prevention systems to detect and address discrepant materials or activities in equipment and processes. - Facilitate technology transfer to global manufacturing sites through training, audits, and documentation to ensure consistent processing across locations. - Oversee installation, conversion, and qualification of

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Manufacturing Development Engineering (MDE) Shift Engineer in Photolithography , you will play a critical role in enabling 24/7 process development for next-generation DRAM technologies. Operating on a 12-hour rotating shift schedule , you will be the primary engineering decision-maker for off-hours development activities, ensuring uninterrupted execution of process development experiments and technology learning. Unlike traditional manufacturing shift engineering roles, this position operates in a highly dynamic development environment where process conditions, specifications, and experimental flows regularly evolve. You will apply sound engineering judgment to disposition development wafers, address process and equipment challenges, and balance development objectives with execution needs. In addition, you will use advanced analytics, automation, and AI-enabled solutions to accelerate learning cycles, improve decision quality, and support Micron's AI-driven digital manufacturing strategy. Responsibilities Serve as the primary off-hours technical authority for development activities by dispositioning wafers, releasing or holding tools, responding to process deviations, addressing execution risks, and maintaining development momentum. Partner with Photolithography Process Development, Process Integration, Equipment Development, Manufacturing, and Shift Operations teams to resolve process and equipment issues, remove output constraints, and support experimental processing. Apply Statistical Process Co

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is advancing a historic $15 billion investment in semiconductor manufacturing in Boise, Idaho, with DRAM production planned for the second half of the decade. As a global leader in memory and storage solutions, Micron is investing more than $150 billion worldwide over the next decade to expand groundbreaking manufacturing capabilities and drive innovation across the semiconductor industry. Join the Boise expansion team and help build the future of semiconductor manufacturing. You will work alongside experienced engineers to develop advanced processes, solve complex manufacturing challenges, and support the production of technologies that power everything from artificial intelligence to next-generation computing systems. As a Dry Etch Process Engineer, you will contribute to the development, optimization, and sustainment of semiconductor manufacturing processes. You will gain hands-on experience in a brand new fabrication environment, working with multi-functional teams to improve yield, quality, reliability, and productivity. This is an excellent opportunity to apply engineering fundamentals, develop technical expertise, and grow your career in semiconductor manufacturing. Responsibilities Support the development and optimization of dry etch processes to improve product performance, yield, and manufacturing efficiency. Analyze process and manufacturing data to identify trends, solve issues, and implement corrective actions. Partner with process integration, equipment,

F/A-18 Senior Systems Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) is seeking a Senior Systems Engineer to join the F/A-18 Systems Engineering Integration and Test (SEIT) Team in Berkeley, MO . The Senior Systems Engineer is responsible for leading cross-functional integration to drive engineering excellence in the execution of our F/A-18 software development activities. The individual selected for this role will be primarily focused on the Technical Integration role for Software Development and Advanced Systems activities. Position Responsibilities Ensure Engineering Excellence: Responsible for leading integration across multiple engineering and program teams to ensure safety, technical excellence, and product integrity. Drives adherence to Boeing and program processes, setting high standards for quality and performance Systems Engineering Approach: Ensure an integrated systems engineering approach. Take ownership to manage requirements and ensure full traceability. Manage the configuration of the integrated system to ensure dependencies are well understood. Responsible for ensuring comprehensive certification and verification activities, demonstrating a commitment to excellence Build Strategic Partnerships: Develop and nurture strong relationships with the United States Navy (USN), engineering functions, and program management. Leverage these partnerships to enhance collaboration and drive program success Manage Technical Baseline: Oversees the technical baseline, including mission systems configuration, technical performance measures, architecture diagrams, and Risk Identification and Opportunity (RIO) assessments. Foster

PWI R&D Writing Systems Engineer Description - A Writing Systems Engineer is an experience individual contributor responsible for owning system-level performance of industrial inkjet web presses , with a strong emphasis on hands-on engineering, on-press troubleshooting, and technical leadership . This role leads complex problem solving across ink, printhead, media, firmware, and mechanical systems, driving print quality, reliability, and robustness through a combination of deep systems thinking and direct experimentation . The specialist serves as a key decision-maker in resolving ambiguous, cross-functional issues and ensuring successful product delivery. Responsibilities Hands-on system ownership & advanced troubleshooting (Primary) Serve as the technical owner for system-level performance , including print quality, reliability, and production robustness Lead hands-on troubleshooting on industrial web presses , diagnosing complex print defects (banding, mottle, nozzle behavior, edge effects, etc.) Design and execute on-press experiments (DOEs) to isolate root causes and quantify system sensitivities Drive root cause analysis across subsystems (ink formulation, printhead, firmware, mechanics, media) and implement corrective actions Support press bring-up, ramp, customer escalations, and field issues , often in high-pressure situations requiring rapid, data-driven decisions Translate real-world press behavior into actionable engineering insights and design improvements System design & integration leadership Define and develop system-level solutions to optimize ink/media interactions, printhead performance, and image quality Lead integration of subsystems (ink, printheads, m

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are BS in Electrical or Computer Engineering (or equivalent experience) with 5+ years in Physical Design CAD methodology at advanced nodes. Proven track record improving PPA and/or runtime on high-performance, low-power taped-out designs. Hands-on with industry-standard EDA tools (e.g., Fusion Compiler) across synthesis, P&R, STA, signoff, and hierarchical flows. Strong Python/Tcl and data skills, with interest or experience in ML frameworks (PyTorch, TensorFlow), and the ability to drive complex projects independent

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard industry PV tools, and collaborate across RTL, PD, CAD, and packaging teams to achieve successful tapeouts. If you thrive in a fast-paced environment and enjoy solving complex challenges in cutting-edge silicon, we’d love to hear from you. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout closure. A hands-on problem solver who excels at debugging and driving signoff through complex verification flows. A collaborative team player who works effectively across RTL, PD, CAD, and foundry interfaces. A mentor and technical leader passionate about building efficient, manufacturable silicon. What We Need BS/MS in Electrical/Electronics Engineering (or related) with 7–14 years of hands-on CPU/IP/SoC physical verif

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

Staff -Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debu

About the Team The Applied AI Engineering team partners closely with customers to help them move from experimentation to production with OpenAI’s technologies. We act as trusted technical advisors, working across customer strategy, architecture, deployment, and adoption to help organizations realize meaningful impact from frontier AI. The Startups segment serves fast-moving, high-growth companies that are often building new products, workflows, and businesses directly on top of AI. These customers move quickly, operate with high ambiguity, and expect practical, creative, and technically rigorous partnership. About the Role We are looking for an Applied AI Engineering Manager, Startups to lead and scale the Startups Applied AI Engineering motion. This team helps high-growth startups move quickly from experimentation to production, unlock meaningful usage, and build durable technical partnerships with OpenAI. This leader will operate in a high-velocity customer segment where founders, CTOs, and technical teams expect speed, judgment, and hands-on problem-solving. They will balance team leadership, technical depth, customer prioritization, and cross-functional influence across Sales, Product, Engineering, Research, and broader go-to-market teams. In this role, you will define how OpenAI supports startup customers at scale: identifying where deep technical engagement can unlock outsized impact, building repeatable deployment mechanisms, and ensuring the team can serve a broad and dynamic customer base without losing quality or strategic focus. In this role, you will: Craft and continuously refine the strategic vision and operating model for the Startups Applied AI Engineering team, aligning it with OpenAI’s broader company objectives and the evolving needs of high-growth startup customers. Lead, mentor, and grow a team of high-performing technical ICs supporting startup customers across AI-native, developer-led, and product-led companies. Help startups move from early e

About the Team The Applied AI Engineering team is responsible for helping customers turn frontier AI capabilities into real products, workflows, and business impact. We act as trusted technical partners across solution design, architecture, implementation, evaluation, and adoption, working alongside customers to build and scale effective AI applications with OpenAI’s technologies. The Codex Applied AI Engineering team focuses on helping organizations transform how software is built with AI. We partner directly with engineering teams and technical leaders to integrate Codex into their software development lifecycle — from identifying high-impact use cases and designing AI-enabled workflows to implementation, evaluation, and scaled adoption. Our work helps ensure AI-powered software development is effective, reliable, secure, and deeply integrated into how engineering organizations operate. About the Role We are seeking an experienced technical leader to join as Manager, Applied AI Engineering (Codex) , leading a team of Applied AI Engineers responsible for driving successful Codex adoption across strategic customers. Your team will work hands-on with customer engineering organizations to design and build AI-enabled development workflows, solve complex implementation challenges, and establish scalable patterns for AI-powered software development. As a manager, you will shape how these technical engagements operate at scale — setting strategy, coaching engineers, determining where the team can have the greatest impact, and ensuring consistently strong execution across customers. You will serve as both a people leader and senior technical advisor, partnering closely with Sales, Product, Research, and Engineering to translate customer needs and real-world usage into better technical approaches, reusable patterns, and product insights. Success in this role will be measured by meaningful and sustained Codex adoption, successful customer outcomes, and the creation of repeat

Associate and Mid-Level Software Engineers Company: The Boeing Company The Boeing Company is looking for an Associate or Mid-Level Software Engineer to join our team in Berkeley, MO. Position Responsibilities: Lab Environment Provisioning: Design, provision, and maintain scalable lab environments on-premises and on cloud platforms (Azure, AWS) using Infrastructure as Code (IaC) tools such as Terraform and Ansible. Automated Integration Testing Orchestration: Develop and manage automated integration testing workflows that aggregate inputs from multiple program segments, ensuring comprehensive test coverage and timely feedback. Deployment Management: Manage and optimize automated deployment pipelines and mechanisms for both physical and virtual systems, ensuring reliable and repeatable software delivery. Data-Driven Feedback & Reporting: Orchestrate processes to collect, analyze, and deliver comprehensive feedback on product stability, performance, and integration issues to segment development teams, enabling continuous improvement. Collaboration & Communication: Work closely with cross-functional teams including development, QA, security, and physical lab team to align deployment strategies, testing requirements, and environment configurations. Security & Compliance: Integrate security best practices into provisioning, deploying, and testing processes, supporting compliance with relevant standards and frameworks. This position is expected to be 100% onsite. The selected candidate will be required to work onsite in Berkeley, MO. Basic Qualifications (Required Skills/ Experien

We are looking for a 100% hands-on Storage Services Software engineer to join the block storage group. You will be a member of a team that builds the next-generation block storage capabilities and architects a proprietary distributed file system solution from its inception. You will work closely with a variety of teams and architects including the networking team, and external customers. You will take part in defining the software architecture and implementation of the most advanced storage services! Services that will need to meet extreme performance and scalability demands! We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform of tomorrow. At NVIDIA, we work, think and learn as a team. We thrive in a deeply strong environment, and we're passionate about a culture that demands innovation and the highest standards. The rewards are sweet and include collaborating with some of the smartest people in the industry, an aggressive compensation plan that rewards top performers, and the opportunity to work on products that transform the way people work and play. What you’ll be doing: 100% hands-on coding role in C language, Kernel and Userspace Access advanced AI tools and a token budget for code development provided by NVIDIA, the world's AI factory leader. Research, design, implement and test, new and existing, distributed storage services and features of NVIDIA’s block and file storage solution, in both Host and DPU environments. Acquire understanding of the algorithms, the technicalities and the interaction with other components across NVIDIA’s block and file storage ecosystem. Analyze and solve challenging bugs and customer cases in la

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Metrology Operations Shift Engineer at Micron Technology, Inc. in Manassas, VA (MTV), you will be responsible for investigating, improving and maintaining measurement recipes within the Metrology department. You will work with applications team and shift team members within the department as well as shift engineers from other process areas to investigate and resolve any measurement recipe related issues as well as equipment related issues occurring within the fabrication line! Responsibilities: Resolve recipe issues with line monitoring, analyze tools, identify root cause, and intensify to process engineering teams. Engage process areas regarding measurement and inspection recipe related investigations and works with their engineering teams to identify plan of action. Involves themselves in fab-wide events that may have impacted production quality. Can organize and drive RDA/Metrology shift actions to respond to such events! Works with first shift engineers to understand recipe related concerns and is involved in execution of shift actions that are associated with such work. This includes creating recipes for new part types on all toolsets and creating custom recipes with GDM for difficult lots. Process DTS case closures and MWR’s. Provide real-time feedback to shift team members when there are any issues that are identified with these documentations. Manage WIP in the area by monitoring lots and KPI holds in the area. Ensure proper focus is placed on prior

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Thin Films Equipment Engineering team at Micron develops and enhances advanced semiconductor manufacturing equipment in a fast-paced research and development environment. The team works closely with Process Engineering, Facilities Engineering, and equipment suppliers to enable next-generation memory technologies and achieve world-class equipment performance. Through innovation, collaboration, and data-driven decision-making, the team plays a critical role in advancing semiconductor technology development. As a Thin Films Equipment Engineering Intern, you will gain hands-on experience working with groundbreaking semiconductor equipment and processes. You will support engineering projects focused on equipment optimization, data analysis, and technology development while collaborating with multi-functional teams. This role provides exposure to semiconductor manufacturing, experimental design, and the application of advanced analytics to solve complex engineering challenges. Responsibilities Collect, analyze, and interpret equipment and process data to find opportunities for performance optimization and continuous improvement. Support structured engineering experiments, document findings, and communicate results through technical reports and presentations. Collaborate with Equipment Engineering, Process Engineering, Facilities Engineering, and equipment suppliers to address technology-development challenges and improve equipment performance. Develop an understanding of equipment hardware,