Hardware Software Codesign Engineer in San Francisco

About the Team OpenAI’s acquisition of io marks our entry into consumer hardware and our ambition to define the next human–computer interface. Success in hardware requires strong financial stewardship across the full product cost stack—from early design and sourcing decisions through manufacturing, logistics, inventory, returns, and warranty. Hardware Finance works across Product, Supply Chain, Operations, Accounting, Systems/Data, and Finance to connect business decisions to product cost, inventory, cash, COGS, and margin. About the Role We are seeking a Hardware Finance Manager to own an assigned area of hardware COGS and inventory end to end. The initial assignment will depend on business priorities and the successful candidate’s expertise. It may include BOM and product cost, manufacturing variance analysis, inventory planning, logistics, returns and warranty, customer support, or another connected set of hardware-finance responsibilities. This is an individual-contributor role with broad scope. Prior hardware experience and deep, hands-on expertise in at least two relevant domains are required. The person will be expected to operate independently, build reusable processes and analytical workflows, and remain accountable for the analysis, judgment, and recommendations. In this role, you will: Own an assigned area of hardware COGS and inventory end to end. Own forecasting, close, and business variance analysis for the assigned scope. Provide hardware leadership with clear variance explanations, trend analysis, and forward-looking signals that connect business and supplier decisions to inventory, cash, COGS, and margin. Partner with business teams and Finance Platforms to establish the financial data, systems, and dashboards needed to support analysis. Ensure data integrity and governance through clear definitions, ownership, validation checks, controls, and review processes. Improve forecasting, reporting, systems, and finance processes so they remain reliable an

About the Team The Industrial Compute team is responsible for building the physical infrastructure that powers OpenAI’s largest-scale AI systems. We design, deploy, and operate next-generation compute infrastructure across a rapidly expanding global footprint, combining OpenAI-owned infrastructure with strategic cloud and infrastructure partners to support frontier AI workloads. As our infrastructure footprint grows, operational excellence across third-party providers becomes increasingly critical. Our team ensures external infrastructure partners consistently deliver the reliability, performance, and operational maturity required to support OpenAI’s rapidly expanding compute environment. About the Role We are seeking a Hardware Technical Program Manager, Infrastructure Partner Operations to lead operational delivery across OpenAI’s third-party infrastructure partners, including major cloud service providers and strategic compute vendors. In this role, you will serve as the primary operational program manager for external infrastructure partners, driving accountability for service delivery, operational readiness, incident management, performance reporting, and continuous operational improvement. You will work closely with partner engineering and operations teams while coordinating internally across Hardware Engineering, Infrastructure Operations, Capacity Planning, Networking, Supply Chain, Deployment, Reliability Engineering, and executive leadership. Success in this role requires someone who understands how hyperscale infrastructure organizations operate, can establish strong operational governance with external partners, and is comfortable driving complex technical programs without direct ownership of the underlying infrastructure. Key Responsibilities Own operational engagement with third-party infrastructure providers, ensuring consistent execution against operational commitments, service-level agreements (SLAs), and performance expectations. Develop operationa

About the Team OpenAI, in close collaboration with our capital partners, is building the world’s most advanced AI infrastructure ecosystem. Our Industrial Compute organization develops and deploys large-scale AI campuses designed to support the next generation of frontier model training and inference workloads. The Hardware Operations team is responsible for ensuring the reliability, availability, and lifecycle health of OpenAI’s compute infrastructure. We partner closely with Data Center Operations, Fleet Health Engineering, Manufacturing, Network Infrastructure, Capacity Planning, and our infrastructure partners to maintain world-class operational performance across rapidly expanding AI environments. As we scale globally, we are building the operational frameworks, reliability standards, and sustaining engineering practices required to support thousands of GPUs and servers across multiple campuses. About the Role We are seeking a Datacenter Hardware Technician Lead to serve as the senior on-site technical authority for hardware reliability and fleet health at one of OpenAI’s flagship AI campuses. This role operates at the intersection of hardware operations, sustaining engineering, and fleet reliability. You will partner closely with Cloud Service Provider operations teams, OpenAI fleet-health engineers, hardware engineering teams, and OEM vendors to identify, diagnose, and resolve hardware issues affecting production systems. Beyond day-to-day operational support, you will drive root cause investigations, reliability improvement initiatives, lifecycle management programs, and operational readiness efforts. You will help establish hardware maintenance standards, operational procedures, and best practices that scale across future OpenAI infrastructure deployments. The ideal candidate combines deep hands-on datacenter hardware expertise with strong troubleshooting, failure analysis, and cross-functional leadership skills. Candidates must be able to sit onsite at our

About the Team The Strategic Finance team provides financial insights and guidance to support the organization's long-term goals and strategies. We partner across the business to allocate and deploy our resources for the highest impact outcomes. About the Role We are hiring a Hardware Finance Manager, Consolidations & Systems to own the consolidated financial reporting, forecasting cadence, and financial systems across our hardware organizations (Io and Robotics). This role sits at the intersection of Hardware Finance, central FP&A, Accounting, and Finance Systems, and is responsible for ensuring leadership has a single, accurate, and timely financial view of the hardware business. This role will serve as the embedded owner of the hardware financial backbone, with end-to-end responsibility for consolidated P&L reporting, forecasting and variance analysis, and the systems and processes that enable scalable, decision-ready insights. You will help ensure hardware financials are consistent, auditable, and fit for executive and board-level decision-making as the organization scales in size, complexity, and capital intensity. We have a strong preference for candidates who can be based in our San Francisco HQ. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will oversee multiple areas of responsibility: Own end-to-end consolidated financial reporting for all hardware organizations (Io and Robotics), delivering a single, integrated P&L view across R&D, Product, Revenue, COGS, and OpEx. Establish and run the hardware financial operating cadence, including monthly close, forecasting, reforecasting, and variance analysis, ensuring consistency and accountability across teams. Serve as a key finance partner to Hardware Finance leads, central FP&A, and Accounting, aligning bottoms-up plans with accounting actuals and enterprise reporting requirements. Build and maintain consoli

About the Team OpenAI’s Central Procurement – Hardware Operations team is building scalable, AI-enabled operating foundations for a rapidly growing hardware footprint. We help the business move quickly while maintaining the data quality and controls needed to manage financial and operational risk responsibly. As OpenAI scales across R&D, new-product introduction, manufacturing, and third-party custody models, we are building the foundations to absorb complexity without adding unnecessary friction. That means establishing practical standards, strengthening discipline where it matters, using AI thoughtfully, and continuously improving how teams manage hardware operations. About the Role We are hiring an Asset Compliance Program Lead to establish the cross-business framework that gives OpenAI reliable lifecycle visibility over hardware-related financial assets and capital equipment. You will define the controls, systems roadmap, and evidence practices needed to manage those assets within OpenAI’s financial-control scope. This is a senior individual-contributor role in Central Procurement – Hardware Operations within Finance. Distinct from sourcing and transaction execution, you will partner with hardware business units, Accounting, Financial Risk Management, Procurement, contract manufacturers, and other third-party custodians to deploy practical operating mechanisms. These mechanisms will connect how assets are purchased, built, received, moved, held, verified, and retired with the ownership, data, reporting, and evidence needed for financial governance. The role covers those assets regardless of location or custody, including manufacturing equipment and tooling, supplier- and contract-manufacturer-held assets, leased assets, and other third-party-held equipment. You will stay close to the operational details—how assets move, where records diverge, which controls are not working, and where evidence is incomplete—and use that view to strengthen processes, accountab

About the Team The Marketing team helps OpenAI bring products, research, and company priorities to the world with clarity, creativity, and impact. We partner across Product, Research, Design, Creative, Communications, Finance, Legal, and Go-to-Market teams to translate complex technology into work that people can understand, trust, and use. Marketing Strategy & Operations builds the operating systems that help this work move with focus and speed. We connect priorities to plans, plans to resourcing, and resourcing to execution, so teams can make better decisions earlier and stay aligned as priorities evolve. About the Role We’re looking for a Strategy & Operations Lead, Hardware Marketing to help build and run the operating system for OpenAI’s Hardware Marketing work. This role will partner closely with Hardware Marketing leadership, Product Marketing, Product, Design, Creative, Production, Communications, Finance, Legal, and external partners to bring structure to a fast-moving, highly cross-functional product area. You will help the team clarify priorities, build plans, manage intake, track decisions, surface risks, frame tradeoffs, and keep critical workstreams moving from planning through operating readiness. This is a strong fit for someone who can operate independently in ambiguity, build practical systems from scratch, and move fluidly between strategy and execution. Experience with complex product launches or sensitive, cross-functional product areas is preferred. This role is based in San Francisco. We use a hybrid work model of three days in the office per week and offer relocation assistance to new employees. In this role, you will: Build and run the core operating rhythm for Hardware Marketing, including planning cycles, planning reviews, weekly priorities, decision forums, risk tracking, and leadership-ready updates. Partner with Hardware Marketing leadership to translate business and product priorities into clear workstreams, owners, milestones,

About the Team OpenAI's Legal team plays a crucial role in furthering OpenAI's mission by tackling innovative, fundamental legal issues in AI. If you're passionate about doing significant and unique work as a technology lawyer, this team is for you. The team comprises legal professionals from diverse fields, including technology, privacy, IP, corporate, cybersecurity, employment, tax, regulatory, and litigation. About the Role We’re growing our world-class Legal team and seek an experienced counsel to lead our global hardware IP portfolio initiatives, including patent, trademark and other intellectual property matters related to our business. This role is highly cross-functional across OpenAI, including work across our Legal, Communications, Global Affairs, Product, Research and Executive teams. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own global hardware IP initiatives, including setting and executing on the strategic direction and management of our hardware IP portfolio. Create scalable processes internally and externally with outside counsel to build, maintain and protect our hardware IP portfolio. Developing and maintaining internal hardware IP policies and programs. Engaging externally on hardware IP policy issues. Advising on strategic hardware IP deals. Advising on hardware IP issues, ranging from patent, trademark, trade secret to open source. Developing and building internal AI expertise, processes and tools to facilitate legal team work. Experience advising on complex technology transactions and inbound technology licensing. You might thrive in this role if you: Have at least 10+ years of combined hardware IP experience at innovative technology companies and law firms. Have a JD and license or qualification to practice in CA. Have a strong sense of ownership, are inquisitive and enthusiastic about technology, enjoy being con

About the Team OpenAI is building Procurement of the future: one that uses AI-enabled systems, clean data, and scalable processes to help the business absorb increasing complexity, speed, volume, and throughput — while enabling teams across OpenAI to operate more strategically and at greater scale. The Hardware Procurement Operations team supports the operational flow of goods and hardware purchasing across OpenAI's hardware business units. We help teams turn business needs into controlled, accurate, and executable procurement activity, from request intake through purchase orders, supplier coordination, change management, receiving readiness, and downstream invoice support. As OpenAI scales, we are building procurement operations that can support changing hardware needs, new business unit priorities, and increasing operational complexity. That means creating practical standards where they help, preserving flexibility where the business requires it, and continuously improving how requests, suppliers, POs, data, and controls move through our systems. About the Role As a Senior Manager of Procurement Operations focused on Hardware, you will own procurement operations for one or more assigned hardware business units. You will be the day-to-day DRI for hardware and goods procurement activity, leading work from intake through purchase requests, POs, supplier needs, changes, receiving readiness, and operational escalations. This is a hands-on operator-builder role for someone who understands the practical complexity of hardware and goods procurement and can both run the work and redesign how the work gets done. You will keep work moving while improving the operating model through better systems, workflows, automation, AI-enabled processes, controls, metrics, and operating leverage. You will evaluate how people, process, policy, systems, data, fiscal controls, and accounting practices come together, and you will work closely with other Central Procurement and BU Procurement

About the Team The Stargate team is responsible for building the physical infrastructure that powers large-scale AI systems. We design and deliver next-generation data centers optimized for dense compute clusters, advanced networking, and rapidly evolving hardware platforms. This work sits at the intersection of hardware engineering, systems architecture, and infrastructure execution—translating cutting-edge compute roadmaps into scalable, production-ready environments. Our teams partner across silicon vendors, server and storage OEMs, networking teams, and data center engineering organizations to bring new capacity online quickly, reliably, and at global scale. About the Role We are seeking a CPU & Storage Technical Lead to define and drive the server compute and storage architecture strategy for Stargate infrastructure. In this role, you will own technical direction across CPU platforms, memory configurations, local and disaggregated storage systems, and their integration into large-scale AI clusters. You will evaluate vendor roadmaps, lead platform tradeoff decisions, and ensure compute and storage systems are optimized for training, inference, and supporting services. You will work cross-functionally with hardware engineering, performance modeling, networking, supply chain, and deployment teams, as well as external partners such as AMD, Intel, OEMs, ODMs, and storage vendors. This is a highly strategic role for someone who can operate deeply at the component level while also driving long-range infrastructure decisions. Key Responsibilities Own CPU and storage technical strategy for Stargate compute infrastructure across current and future generations. Evaluate CPU platforms across performance, efficiency, memory bandwidth, PCIe topology, cost, and roadmap alignment. Define storage architectures for AI environments, including boot media, local NVMe, shared storage, caching tiers, metadata services, and high-performance data pipelines. Drive server platform de

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Rack Power Engineer with deep expertise in high-power conversion and distribution to design, qualify, and support power systems for AI supercomputers. You will own rack power solutions—including power shelves, AC/DC rectifiers, power supply units (PSUs), power management controllers (PMCs), and high-current distribution—from requirements and supplier development through deployment. You will also monitor fleet rack power health, lead debugging and root-cause investigations, and drive improvements into hardware, firmware, and qualification coverage. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own rack power architecture and requirements for high-power AI supercomputing systems, including power budgets, AC input interfaces, DC distribution, redundancy, efficiency, serviceability, and integration with data center infrastructure. Drive the design and supplier development of power shelves, rectifiers, PSUs, PMCs, busbars, connectors, and protection circuits. Review electrical designs and control behavior, and evaluate performance, cost, reliability, and availability trade-offs. Define and execute component, shelf, and rack qualification plans covering load transients, current sharing, hot-swap, startup and shutdown, redundancy failover, fault protection and recovery, thermal limits, and AC disturbances and ride-through

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking a highly skilled Physical Design Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team and is central to delivering power, performance, and area (PPA) optimized datapath and interconnect solutions for next-generation AI accelerators. You’ll work closely with RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies to increase team productivity. Your work will directly impact silicon’s performance and cost efficiency, as well as the team’s execution velocity and quality. In this role, you will: Develop, build and own tools, flows and methodologies for physical implementation Own physical implementation of floorplan blocks from floorplanning to final signoff Collaborate with RTL designers to drive optimal block implementation solutions Analyze and optimize design for timing, power, and area trade-offs, working in collaboration with EDA vendors and ASIC partners Qualifications: BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development Demonstrated success in taping out complex silicon designs Hands-on experience with block physical implementation and PPA convergence Strong coding experience with python, bazel, TCL Strong experience building physical design tools, flows and methodologies Strong understanding of microarchitecture, RTL design,

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a product manufacturing & quality engineer, who will be responsible for driving technical initiatives related to the manufacturing, quality and reliability of our AI supercomputer hardware systems to ensure product success from concept to launch and through mass production. You’ll have the opportunity to coordinate with functional SMEs and work with a wide range of stakeholders, from design engineering and operations teams, TPMs, external industry vendors and partners to ensure that all products are developed and delivered on time and to the highest quality standards. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees In this role, you will: Own the integrated manufacturing and quality readiness for a product across L6, L10, and L11, with clear gates, milestones, deliverables, owners, and closure criteria. Lead readiness of process flows, tooling, fixtures, assembly operations, test interfaces, and production controls. Review and contribute to work instructions. Translate product requirements into qualification plans, process controls, test requirements and acceptance criteria with design engineering and Area SMEs Coordinate and drive execution of product and process qualification, reliability testing, and validation with the relevant SMEs. Maintain traceable evidence that assigned products and processes meet agreed performance, reliability,

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Product Manufacturing Engineer to drive manufacturing strategy and execution for next-generation AI hardware within the Silicon & Systems team, with a particular focus on PCBA manufacturing, assembly, process development, and production readiness. You will work closely with design engineering, systems engineering, operations, TPMs, contract manufacturers, suppliers, and other external partners to ensure new hardware products successfully transition from concept and prototype builds through NPI and high-volume production. You’ll own critical manufacturing initiatives, identify and resolve production risks, and help establish the processes and controls required to deliver complex hardware at scale. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Drive manufacturing and quality initiatives to ensure product success from concept and early development through NPI, production launch, and scale. Lead manufacturing process development for next-generation AI hardware systems, partnering closely with design engineering, systems engineering, operations, TPMs, suppliers, and manufacturing partners. Own PCBA manufacturing development and production readiness, including assembly processes, process validation, manufacturing test, rework, yield improvement, and successful transition into volume production. Establish NPI manufact

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking an experienced ASIC Package Signal Integrity / Power Integrity Engineer to drive electrical architecture, modeling, optimization, and validation for the most advanced AI/HPC silicon and package design. This role focuses on high-speed SerDes and memory channel architecture, advanced 2.5D/3D package SI/PI, substrate to package co-design, power-delivery-network optimization, electromagnetic modeling, and simulation-to-measurement correlation. The ideal candidate has strong hands-on experience with high-speed channel and PDN analysis across ASIC packages, interposers, substrates, and power-delivery structures, and can translate simulation results into practical design requirements for interposers and package substrate design optimization. The engineer will work closely with ASIC, package, system, mechanical, thermal, power, and silicon validation teams from early architecture and feasibility studies through production bring-up. In this role you will Own SI/PI architecture and analysis for advanced AI ASIC packages from early feasibility studies through production. Develop and optimize high-speed electrical channels for 200G/400G SerDes, PCIe, HBM, DDR, and chiplet/die-to-die interfaces. Perform package, interposer and substrate modeling using 2D/3D electromagnetic solvers. Define and optimize package stack-ups, transmission-line structures, via transitions, breakout structures, return paths, ground shielding, bump maps, and ball maps based on SI/PI re

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are looking for a highly experienced RTL engineer to own critical on- and off-chip interconnect components for our custom AI accelerator platform. You will drive the microarchitecture and RTL implementation of scalable on-chip communication fabrics connecting high-bandwidth compute, memory, and I/O subsystems as well as purpose-built off-chip interfaces and protocols needed to enable custom computing at scale. This is a senior, hands-on engineering role with broad technical ownership. You will drive design from requirements through the full silicon lifecycle, from architecture definition and performance analysis through RTL implementation, verification closure, physical design convergence, bring-up, and production readiness. You will plan and oversee the work of junior engineers and help drive and develop productive engineering relationships with external partners and help manage partner execution. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own the microarchitecture, RTL design, and delivery of major SoC interconnect components, including network-on-chip fabrics, switches, routers, bridges, protocol adapters, arbiters, and traffic-management logic as well as off-chip protocol bridges and interfaces. Drive third party engagements to develop novel networking and interface protocols and silicon IP while ensuring high quality and de