Job Details: Job Description: This is a high-visibility, commissioned sales leadership role within Intel's US Sales organization, specifically focused on our most disruptive AI-Native and Strategic CSP accounts. You will be the primary architect of Intel's relationship with industry titans who are redefining the boundaries of AI model training, AIaaS solutions and deployment at scale. This is not a traditional sales role. You will operate at the intersection of deep technical engineering and executive business strategy, ensuring Intel's silicon and software roadmap aligns with the world's most demanding AI-as-a-Service and SaaS platforms across on-prem, Tier1 CSP and NeoCloud environments. Key Responsibilities Executive Orchestration: Act as the One Intel lead, building deep-rooted partnerships with C-suite executives and Principal Engineers at world-class AI and SaaS firms. Technical Value Synthesis: Translate complex hardware architectures (CPU, GPU, Accelerator, Networking, and Packaging) into business outcomes for customers running massive-scale distributed training and inference workloads. Strategic Growth: Drive Intel's data-centric growth strategy by identifying and securing design wins within the core infrastructure of the world's leading AI models and solution providers. Cross-Functional Leadership: Partner closely with Cloud Solution Architects (CSAs), Intel Business Units, Cloud and OEM partners to influence future product roadmaps based on the unique needs of AI-native disruptors. Market Evangelism: Serve as a technical and business evangelist, articulating Intel's vision for the future of AI and compute infrastructure in a highly competitive landscape. <p style="text-align:inhe
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Intel Foundry Ltd Product Yield Engineer in United States
84 active opportunities · Updated October 2026
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Job Details: Job Description: Job Description The Role and Impact As an Industrial Hygienist, you will play a critical role in safeguarding employee health and ensuring workplace safety. You will drive industrial hygiene risk assessments, oversee exposure evaluations, approve chemical usage, and coordinate monitoring of workplace environments. Your expertise will directly contribute to maintaining a safe and compliant work environment while addressing health risks associated with workplace conditions and chemical usage. Business group You will be part of a team dedicated to environmental health and safety within Intel's broader organization. This group focuses on driving compliance with applicable industrial hygiene regulations, developing global policies, and ensuring alignment with Intel's high standards. By fostering a safe and healthy work environment, the team supports Intel's commitment to employee well-being and operational excellence. Key Responsibilities - Conduct qualitative risk assessments and personal protective equipment evaluations for workplace environments. - Evaluate chemical exposure implications and approve their usage based on toxicology data. - Monitor workplace environments to identify and mitigate health risks. - Ensure compliance with local industrial hygiene regulations and Intel's internal standards. - Support site program self-assessments, follow-up plans, and respond to incident investigations. - Participate in project reviews, pre-startup safety reviews, and hazard evaluations. - Conduct surveys of working conditions to assess hazardous exposures and control measure effectiveness. - Develop industrial hygiene policies, programs, and procedural documentation in alignment with global and regional standards. - Investigate employee reports of un
Job Details: Job Description: As a Material Analysis (MA) Technician, you will be part of a Technology Development (TD) and High-Volume Manufacturing (HVM) lab responsible for performing material analysis and failure analysis in support of Intel's silicon process development and high-volume production. You will work on developing imaging, composition analysis and sample preparation techniques, and best-known methods (BKMs) to improve lab analysis quality, efficiency and output. You will directly interface with TD and HVM fab customers and quality/reliability engineers to develop solutions to problems by utilizing lab capabilities. The scope may include wafer and unit level, front-end modules and back-end/far back-end modules. Responsibilities may include but not be limited to: • Conducting hands-on analysis by effectively utilizing lab techniques, from sample prep micro-cleaver, ion mill etcher, mechanical polish to SEM/EDX, Dual beam FIB, TEM techniques to characterize Si fabricated structures at nanometer scales and integrated circuit device to improve process, performance and reliability; and to identify physical failure mode toward the root-cause identification. • Conducting hands-on data collection with various lab equipment’s, and assisting engineers to implement materials characterization techniques to determine fundamental thin film material structure/properties and to collaborate with process development engineers across functional areas and organizations to improve process performance and reliability. • Supporting and sustaining lab equipment. Ensuring that lab analytical capabilities needed to support advanced transistor and interconnect technology and/or product development are in place. Cooperating with other lab areas beyond local MA/FA (Failure Analysis) labs to achieve
Job Details: Job Description: This is a central requisition for all Ocotillo Technology Fabrication (OTF) functional areas. Successful candidates will be aligned to the areas that match best with factory needs. Join Intel and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. Our high-volume manufacturing facility in Chandler, Arizona is looking for amazing talent. Join and help us create the next generation of technologies that will shape the future for decades to come. The Ocotillo Technology Fabrication (OTF) Module Engineer role is multifaceted. The ideal candidate will have a passion for instrumentation and equipment with the goal of developing a robust manufacturable process module. This is a central requisition for all functional areas: Litho, Wet Etch, Dry Etch, Diffusion, Implant, Planar and Thin Films. Successful candidates will be aligned to the areas that match best with factory needs. As an OTF Module Engineer you will play an important role in the OTF engineering team. You will be responsible for owning all aspects of one or more of the factory's 300mm toolsets. Your sustaining responsibilities will include the safety and cleanliness of your area and ensuring Copy Exactly for your toolset. You will also be expected to review the relevant control charts and tool output daily and ensure your toolset and layers remain excursion free. You will be responsible for delivering Model of Record (MOR) availability and achieving 100 percent matching for all relevant operations. For new technology start-ups, you will be responsible for tool installations, conversions, and qualifications; and sustained matching performance. You will be expected to drive continuous improvement in the he
Job Details: Job Description: This position is in the Silicon and Platform Engineering, Platform and Experience Architecture, PXA team. This team is responsible for defining experience driven client platforms that delight customers and drive business success. This role is for the Platform Architecture Manager and leader of the Platform Workflow and Competitive Analysis team which exists to translate outside-in insights into platform requirements that define winning client PC experiences. Under a single-umbrella of leadership, PWCAs responsibilities are focused on integrating UX research, ecosystem engagement, competitive analysis, UX workflow development, and data collection into a single operating model that improves PXA's ability to make fast, evidence-based architecture and roadmap decisions. PWCA integrates diverse functions and expertise to uncover insights and translate a data-backed vision into actionable recommendations for complex technology and product roadmap decisions. Its leader must build a cohesive team, foster a strong culture, and establish a decision-making framework that aligns diverse projects and expertise in an open-ended environment requiring long-term, multidisciplinary research and analysis. The qualifications below reflect the experience and capabilities needed to succeed in this role. Experience Experienced managing 10-20 person teams with varied deep areas of expertise Intuitively grasps the unique timelines of IP, SOC, and Platform development and the key moments of intercepting different inputs into the development cycles Proven ability to apply user experience research methods and lead the collection, synthesis, and management of insights from users, customers, and ecosystem partners to inform platform and roadmap decisions Proven experience leading competitive analysis acro
Job Details: Job Description: Intel is looking for highly motivated individuals with strong technical background and capabilities to sustain, ramp, and transfer all technology nodes in Arizona. They will drive rapid continuous improvements in safety, quality, yield, reliability, cost, process stability/capability, and productivity while maintaining rigorous quality control. The role of a Process Integration and Yield Engineer is to deliver high-quality analytical insights that influences / directs the factory resources to minimize defects, control process parameters, and improve overall factory yields. All improvements and sustaining work is done in close collaboration and partnership with the process to improve the capability of the tools and processes. Responsibilities may include, but are not limited to: Performing detailed data analysis using various statistical/data mining tools to identify the root cause of defect and yield issues. Identifying exclusionary or baseline sources of defects or yield impacts and recommending/leading corrective actions/fixes. Lead/participate continuous improvement projects on products and processes for improved performance. Provide expertise on process flow segments. Lead/participate in multi-area problem solving teams to provide expertise to troubleshoot complex yield problems. The ideal candidate should exhibit the following behavioral traits: Solid analytical skills and a passion for data analysis and problem solving. Organizational skills with attention to detail. Excellent interpersonal skills with the ability to work with people at all levels. Communication and presentation skills to influence a wide variety of groups at all levels. Demonstrate excellent teamwork and leadership skills, demonstrated pro
Job Details: Job Description: This is a central requisition for all Ocotillo Technology Fabrication (OTF) functional areas. Successful candidates will be aligned to the areas that match best with factory needs. Join Intel and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. Our high-volume manufacturing facility in Chandler, Arizona is looking for amazing talent. Join and help us create the next generation of technologies that will shape the future for decades to come. The Ocotillo Technology Fabrication (OTF) Module Engineer role is multifaceted. The ideal candidate will have a passion for instrumentation and equipment with the goal of developing a robust manufacturable process module. This is a central requisition for all functional areas: Litho, Wet Etch, Dry Etch, Diffusion, Implant, Planar and Thin Films. Successful candidates will be aligned to the areas that match best with factory needs. As an OTF Module Engineer you will play an important role in the OTF engineering team. You will be responsible for owning all aspects of one or more of the factory's 300mm toolsets. Your sustaining responsibilities will include the safety and cleanliness of your area and ensuring Copy Exactly for your toolset. You will also be expected to review the relevant control charts and tool output daily and ensure your toolset and layers remain excursion free. You will be responsible for delivering Model of Record (MOR) availability and achieving 100 percent matching for all relevant operations. For new technology start-ups, you will be responsible for tool installations, conversions, and qualifications; and sustained matching performance. You will be expected to drive continuous improvement in the health and matching of your to
AI Research Engineer/Scientist — US, California, Santa Clara. Apply via Workday.
Job Overview : Seeking Technical Electronic Intelligence (TechELINT) Analyst. Become a member of a highly accomplished ELINT team providing direct support to geographically dispersed USAF Wing and Squadron-level organizations. Perform interpretive pulse-level and P-Cubed analysis of ELINT data, in-depth radar and weapons systems studies, and cutting-edge modeling and simulation efforts. The TechELINT analyst will leverage their aviation, Electronic Warfare experience, and critical-thinking prowess to develop tactics and techniques to counter emerging threats. The analyst will also work and coordinate with DoD entities and agencies to facilitate cutting-edge product development to ensure client capabilities meet current and future objectives. The analyst must possess an in-depth understanding of the key factors in aircraft survivability and combat mission planning to ensure client objectives are met. Primary Responsibilities : Support the collection, documentation, and post-test analysis of ELINT to evaluate programming effectiveness. Use specialized tools to ingest intel data and program ELINT, ensuring integration with EW systems. Work with a team of engineers to collaborate on ELINT products and ensure proper programming in alignment with mission objectives. Design procedures to analyze testing results, ensuring accurate validation and effectiveness of systems. Utilize the latest intel databases to perform detailed analysis and research, identifying potential threats and solutions. Basic Qualifications : Bachelor's degree (or 2-4 additional years of experience) in Intelligence or Information Operations and minimum of 8 years ofTechnical Signals Analysis experience. Experience with intel tools such as ASPEN, WILLOW, MARTES, THRESHER, and GALE. Former Military Experience in Technical Signals Analysis. Active TOP SECRET clearanc
About the Team Security is at the foundation of OpenAI’s mission to ensure that artificial general intelligence benefits all of humanity. The Security team protects OpenAI’s technology, people, and products. We are technical in what we build but are operational in how we do our work, and are committed to supporting all products and research at OpenAI. Our Security team tenets include: prioritizing for impact, enabling researchers, preparing for future transformative technologies, and engaging a robust security culture. About the Role Trusted Computing and Cryptography is a core security team at OpenAI focused on deploying high-performance cryptography at scale, secure key management, and trusted hardware enclaves—from boot measurements to GPU confidential computation. As a Hardware Platform Security Architect, you’ll own hardware platform security at OpenAI. In this role, you will: Co-Architect Secure Silicon: Collaborate with cross-functional silicon teams (Silicon Design, DV, FW) and silicon partners (silicon test facilities, foundries) to develop secure silicon that meets the end-to-end system requirements. Co-Architect Secure Hardware: Collaborate with hardware vendors and cross-functional teams (kernel, compiler, infra) to design secure hardware that meets performance and security needs. Co-Architect Secure Systems: Architect and deploy systems using TPM2, Secure Boot, Nitro Enclaves, Intel SGX, AMD-SEV, and other secure hardware technologies. Drive Innovation: Engage with internal and external partners to align hardware innovations with OpenAI’s trusted computing and cryptographic requirements. You might thrive in this role if you have: 10+ years of industry experience in hardware security or hardware–software co-design. Proven expertise in deploying secure hardware systems at scale and integrating secure hardware primitives. Strong coding skills in Rust and/or C/C++, with proficiency in Python. Proven ability to collaborate across teams, architect solutions,
About the Team The Stargate team is responsible for building the physical infrastructure that powers large-scale AI systems. We design and deliver next-generation data centers optimized for dense compute clusters, advanced networking, and rapidly evolving hardware platforms. This work sits at the intersection of hardware engineering, systems architecture, and infrastructure execution—translating cutting-edge compute roadmaps into scalable, production-ready environments. Our teams partner across silicon vendors, server and storage OEMs, networking teams, and data center engineering organizations to bring new capacity online quickly, reliably, and at global scale. About the Role We are seeking a CPU & Storage Technical Lead to define and drive the server compute and storage architecture strategy for Stargate infrastructure. In this role, you will own technical direction across CPU platforms, memory configurations, local and disaggregated storage systems, and their integration into large-scale AI clusters. You will evaluate vendor roadmaps, lead platform tradeoff decisions, and ensure compute and storage systems are optimized for training, inference, and supporting services. You will work cross-functionally with hardware engineering, performance modeling, networking, supply chain, and deployment teams, as well as external partners such as AMD, Intel, OEMs, ODMs, and storage vendors. This is a highly strategic role for someone who can operate deeply at the component level while also driving long-range infrastructure decisions. Key Responsibilities Own CPU and storage technical strategy for Stargate compute infrastructure across current and future generations. Evaluate CPU platforms across performance, efficiency, memory bandwidth, PCIe topology, cost, and roadmap alignment. Define storage architectures for AI environments, including boot media, local NVMe, shared storage, caching tiers, metadata services, and high-performance data pipelines. Drive server platform de
1743 - This position is in Austin, Texas. Position Summary We are seeking an experienced Board-Level Hardware Validation Engineer to define and execute the validation and verification of complex electronic systems throughout the product lifecycle. This role is responsible for defining validation strategies, developing test plans, executing hands-on testing, analyzing failures, and working directly with ODM partners to ensure products meet performance, reliability, quality, and compliance requirements before mass production. The ideal candidate combines strong electrical engineering fundamentals with practical lab expertise and is comfortable personally performing validation activities while coordinating with cross-functional teams and manufacturing partners. Key Responsibilities Validation Strategy & Planning Define comprehensive board-level and inter-board validation plans based on product requirements, design specifications, and customer use cases. Develop validation methodologies covering functional, electrical, thermal, power, signal integrity, reliability, and stress testing. Establish test coverage, acceptance criteria, qualification requirements, and release gates. Review hardware architecture, schematics, component specifications, and interface topologies to identify validation risks early in the design cycle. Define incremental validation and regression coverage for component substitutions, design changes, and firmware updates. Hands-On Validation Execution Develop, automate, and execute validation tests on prototype and production-intent hardware. Perform board bring-up, functional verification, electrical characterization, and system-level integration testing. Validate communication interfaces, control signals, and timing requirements. Verify power sequencing, reset behavior, leakage current, and recovery across operating states. Execute temperature and voltage corner testing against approved operating limits. Use oscilloscopes, logic an
We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Omnicare is a leading provider of pharmacy services to long-term care facilities nationwide, supporting skilled nursing facilities, assisted living communities, and other institutional care settings. Following the sale of Omnicare by CVS Health, this role will support Omnicare and its continued operations as an independent, standalone organization. Candidates should be aware that this role will not remain within CVS Health following the transaction. The individual hired into this role will be employed by Omnicare and will contribute to shaping the future of our organization during this exciting period of growth and transformation. Health is everything. At CVS Health, we are committed to increasing patient access to care, lowering costs and improving the quality of care. Millions of times a day, we’re helping people on their path to better health— from advising patients on their prescriptions to helping them manage their chronic and specialty conditions. Because we’re present in so many moments, big and small, we have an active, supportive role in shaping the future of health care. Pharmacy Technicians are at the forefront of our purpose as they deliver compassionate care to our millions of patients every day. Come join our team of dedicated and caring Pharmacy Technicians who demonstrate our core values of Accountability, Caring, Collaboration,Innovation and Integ
Mid-Level or Senior Aerospace Systems Safety Engineer Company: The Boeing Company The Boeing Defense Air Dominance Division Systems Safety & Mission Assurance organization is looking for an Aerospace Systems Safety Engineer to join our team in Hazelwood, MO . Our teams are currently hiring for a broad range of experience levels including Experienced (Level 3) or Senior (Level 4) Aircraft Safety Engineers. A successful candidate will perform system software safety engineering work on a Proprietary Air Dominance program, drive hazard analyses, demonstrate compliance to MIL‑STD‑882E and other standards, and influence system architecture to reduce safety risk. The selected candidate will provide technical guidance and perform critical Software System Safety Engineering work. In addition to working with System Safety personnel, the individual will work extensively with design, development, and test to incorporate robust safety features and reduce project safety risk. Primary responsibilities: Analyzes the integration of complex airplane systems and their corresponding airplane-level effects, failure indications, and flight crew actions as part of a system of systems analysis Documents safety analyses, hazard mitigation, validation, and verification activities in compliance with relevant customer and regulatory safety standards such as MIL-STD-882E, MIL-HDBK-516C, AC-17-01, DO-178C, and DO-254. Demonstrates safety hazard risk mitigation and control methods to the customer and regulators Identifies safety issue systemic root causes and recommends corrective actions using industry best practices Collaborates with internal and external stakeholders to define, validate, and inte
The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. NVIDIA’s Silicon Co-Design Group is hiring a Chip Lead to serve as the technical lead for one of our most consequential silicon programs! This is not project management, and it is not a senior IC role. You are the person the program partners with on its hardest technical questions — when the right answer is not obvious, and when leadership needs a single technical perspective to align on direction. You are accountable for the technical integrity of the chip end-to-end. You guide co-design feature integration, help resolve the toughest multi-functional bugs, and serve as the project-specific custodian of the qualification playbook. The program runs cleaner because you are on it! What you’ll be doing: You will partner across design, validation, software, and manufacturing to keep the program’s technical narrative clear and on track. Day to day, you will: Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs. Co-lead program-level feature integration from chip to system, surfacing inter-function dependencies and guiding them to resolution. Help resolve the program’s hardest multi-functional bugs by translating ambiguous, multi-team symptoms into root-cause closure on areas such as HBM, power and thermal, high-speed I/O, and packaging. Steward the qualification playbook. When the playbook does not fit a situation, guide the mitigations and capture the lessons as reusable methodology for other SSG programs. Shape the program’s technical narrative by surfacing key risks, trade
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