Macro Analyst in United States

ABOUT PROPRIETARY RESEARCH On our proprietary research team—Market Intelligence— you will uncover insights about markets and the broader economy through deep compliant fundamental research and applying data science and engineering techniques to alternative data sets. In partnership with our investment professionals and Compliance team, our team of analysts, data scientists and engineers work together to produce compliant research and build tools that inform our firm’s investments. We look for other bright, motivated, and collaborative people to join our team and grow with us—a majority of the leaders in our group were promoted from within. WHAT YOU’LL DO As a Macro Analyst, Market Intelligence covering the US, you will work with alternative data to gather macroeconomic context and identify insights relevant to rates and FX markets. You will then partner with our team of data scientists and engineers to develop analyses that you deliver as synthesized insights to our investment professionals to help aid in their research processes. The work is ever evolving, affording opportunities to tackle new challenges alongside research teammates from diverse backgrounds. Specifically, you will: Analyze and interpret alternative data from multiple sources and develop subject-matter expertise on the key themes and KPIs that drive the markets within your assigned coverage Produce research for internal consumption by our investment professionals across a variety of channels, including written reports, verbal communication, data feeds, and visualizations Interact directly with our investment professionals to learn the macro investment process from them and help drive more informed investment decisions Collaborate with our proprietary research teams including Data Sourcing, Data Science, and Data Engineering, as well as Compliance, to source, evaluate, and draw value from new and existing data assets to produce actionable research for investment professionals WHAT’S REQUIRED &nb

US Equity Strategy Strategist Citi Research has an opening for an Equity Research Analyst to join its US Equity Strategy team. This is a demanding role requiring exceptional analytic skills along with the ability to work independently as well as part of a small team. The individual will take ownership of several processes critical to our published work. You will produce high-impact analysis of equity markets and investment themes incorporated in the advice which Citi delivers to both internal and external clients worldwide. In this role, we expect you will develop into a subject matter expert on US equity markets. This is an opportunity to make a direct and measurable contribution to our research product and be an integral part in developing our US equity market calls and insight. Responsibilities Build, maintain, and enhance financial databases and models that support ongoing and bespoke research needs. Assess macro and micro economic forces at work and incorporate into our market views. Analyze global equity markets and financial trends to produce timely, well-reasoned investment insights that inform client decisions and support Citi's broader research output. Author high-quality research reports and thematic pieces that clearly communicate Citi's investment views to external clients and internal stakeholders. Originate and develop analysis of US investment themes, contributing to US Equity Strategy product Deliver tailored analysis and data-driven responses to requests from investors and Citi colleagues, ensuring accuracy and relevance to their specific needs. Collaborate closely with Citi Research professionals across regions and disciplines to ensure a consistent, globally informed perspective in all published work. Uphold the highest standards of risk awareness and professio

Job Description We are looking to hire an experienced strategist to join Citi Equity Trading Strategy (CETS) team in New York with a focus on thematic investing. The team is responsible for providing market commentary on the global equity markets, including tactical market analysis. CETS combines macro, equity and derivatives viewpoints to make directional and relative value trading calls alongside medium-term thematic views. The candidate will be a key contributor to, and communicator of, views to Citi’s trading platform, institutional clients and the Citi Private Bank. Additionally, the US CETS Strategist will partner with the US and global CETS and research teams. Key Responsibilities: Contribute to building and executing a fundamentally based framework for thematic investment. Primarily for custom baskets, but also including sectors, ETFs and related products Coverage of US equity market, including top-down analysis of valuation, earnings, options markets, sector recommendations and trade ideas Thought leadership for US equity trading & sales Generate formal client recognition for Citi’s US equity strategy product via client votes and external poll rankings <span style="color

We are now looking for a Senior SRAM Engineer within our Full Custom Memory (FCM) team! The FCM team designs specialized RAM implementations across NVIDIAs wide array of processing chips. Be it high speed, low power, multiport, we engage closely with processor architecture teams to build custom solutions across the entire NVIDIA silicon portfolio. Are you interested in designing circuits for the next generation of AI chips? Join a team of dedicated engineers developing the custom SRAM circuits that help power these chips. What you'll be doing: Design best-in-class SRAM circuits using state-of-the-art technology processes Optimize circuits for performance, area, and power Collaborate with mask designers to craft high quality and dense pitch-matched layout Verify functionality, electrical integrity, and robustness Improve/develop flows and methodologies to streamline design automation, data collection, and analysis to ensure working silicon What we need to see: BS/MS/PhD (or equivalent experience) in Electrical or Computer Engineering Minimum 12 years of circuit design experience Strong understanding of SRAM and memory design techniques and macro/block development Ways to stand out from the crowd: Self-motivation, attention to detail, clear data analysis and presentation skills Familiarity with industry tools such as Cadence Virtuoso for schematic and layout, SPICE simulators, waveform viewers Background with developing and using various flows and methodologies, in

Job Details: Job Description: As a Material Analysis (MA) Technician, you will be part of a Technology Development (TD) and High-Volume Manufacturing (HVM) lab responsible for performing material analysis and failure analysis in support of Intel's silicon process development and high-volume production. You will work on developing imaging, composition analysis and sample preparation techniques, and best-known methods (BKMs) to improve lab analysis quality, efficiency and output. You will directly interface with TD and HVM fab customers and quality/reliability engineers to develop solutions to problems by utilizing lab capabilities. The scope may include wafer and unit level, front-end modules and back-end/far back-end modules. Responsibilities may include but not be limited to: • Conducting hands-on analysis by effectively utilizing lab techniques, from sample prep micro-cleaver, ion mill etcher, mechanical polish to SEM/EDX, Dual beam FIB, TEM techniques to characterize Si fabricated structures at nanometer scales and integrated circuit device to improve process, performance and reliability; and to identify physical failure mode toward the root-cause identification. • Conducting hands-on data collection with various lab equipment’s, and assisting engineers to implement materials characterization techniques to determine fundamental thin film material structure/properties and to collaborate with process development engineers across functional areas and organizations to improve process performance and reliability. • Supporting and sustaining lab equipment. Ensuring that lab analytical capabilities needed to support advanced transistor and interconnect technology and/or product development are in place. Cooperating with other lab areas beyond local MA/FA (Failure Analysis) labs to achieve

About Mixpanel Mixpanel is the leading product intelligence and analytics platform, trusted by more than 29,000 companies to help understand how people use the products they build. By combining powerful analytics with AI that knows your business, Mixpanel helps teams see what’s working, diagnose what’s not, and decide what to build next. Learn more at mixpanel.com . About the Role Mixpanel's website is the front door to our product and our biggest driver of pipeline — it's the first real experience most prospects have with us. We design, build, and ship it ourselves in Framer, treating it as a living product surface rather than a set of static pages. We're looking for an Interactive Web Designer who lives and breathes this work — someone energized by building, not just designing and handing off. You'll report to our Brand Design Leader, partnering closely with our Staff Interactive Designer and Website Manager, and working cross-functionally with Marketing and other teams to turn strategy into shipped web experiences. The work directly shapes how prospects understand, trust, and convert on Mixpanel — from product storytelling to improving conversion paths. This is a hands-on-role: you should be as comfortable building in Framer as sketching a layout in Figma. Webflow experience translates well — different platform, same muscle of designing and building in one motion. What You'll Do Design and build end-to-end experiences and iterations Design and build pages and components directly in Framer, not just hand off static designs for someone else to implement Bring interaction, motion, and detail to web experiences — micro-interactions, transitions, scroll behavior — that make the site feel considered rather than templated Build and maintain landing pages for campaigns, launches, and regional/ABM needs, working from brand and campaign direction that drives pipeline goals Strengthen our web design system Contribute to and help maintain a component library that lets the te

Leidos is looking for our next TS/SCI-cleared Elastic Search Engineer to join a high-energy team building and deploying a cutting-edge technology stack to support our client’s mission to centralize and standardize Tasking, Collection, Processing, Exploitation and Dissemination (TCPED) of Open Source Intelligence (OSINT) across the DoD and IC enterprise. We integrate off the shelf and newly development software to sustain and enhance the TCPED platform. We leverage cloud-based computing, artificial intelligence (Al), machine learning (ML) and cross-domain transfer systems to provide cutting edge data exploitation, enrichment, triage, and analytics capabilities to Defense and Intelligence Community members. DTP advances the state of the art in mission-focused big data analytics tools and micro-service development spanning the breadth of Agile sprints to multiyear research and development cycles. As an Elastic Search Engineer, you’ll be a member of our platform engineering team and help develop, deploy and maintain nosql databases as foundational elements of our microservice eco-system using a Kubernetes as foundational platform. You’ll also support the adoption of GitOps best practices across cross-functional engineering teams. In this fast-paced environment, you’ll collaborate closely with systems engineering, architecture, development, security, operations, and integrations teams. Work is conducted on-site at our client location in Bethesda, MD. Key Responsibilities Include: Deploy, triage, debug, and maintain production class databases like Elasticsearch and Redis Design and support database configuration management strategies across air-gapped network fabrics Partner with Systems Engineers to architect solutions for new capabilities Contribute to operational monitoring capabilities to provide proactive system notifications Contribute technical input to engineering documentati

Leidos is looking for our next TS/SCI-cleared Elastic Search Engineer to join a high-energy team building and deploying a cutting-edge technology stack to support our client’s mission to centralize and standardize Tasking, Collection, Processing, Exploitation and Dissemination (TCPED) of Open Source Intelligence (OSINT) across the DoD and IC enterprise. We integrate off the shelf and newly development software to sustain and enhance the TCPED platform. We leverage cloud-based computing, artificial intelligence (Al), machine learning (ML) and cross-domain transfer systems to provide cutting edge data exploitation, enrichment, triage, and analytics capabilities to Defense and Intelligence Community members. DTP advances the state of the art in mission-focused big data analytics tools and micro-service development spanning the breadth of Agile sprints to multiyear research and development cycles. As an Elastic Search Engineer, you’ll be a member of our platform engineering team and help develop, deploy and maintain nosql databases as foundational elements of our microservice eco-system using a Kubernetes as foundational platform. You’ll also support the adoption of GitOps best practices across cross-functional engineering teams. In this fast-paced environment, you’ll collaborate closely with systems engineering, architecture, development, security, operations, and integrations teams. Work is conducted on-site at our client location in Bethesda, MD. Key Responsibilities Include: Deploy, triage, debug, and maintain production class databases like Elasticsearch and Redis Design and support database configuration management strategies across air-gapped network fabrics Partner with Systems Engineers to architect solutions for new capabilities Contribute to operational monitoring capabilities to provide proactive system notifications Contribute technical input to engineering document

NVIDIA is seeking a world-class computer architect to contribute to the development of future high-performance computing systems, with a focus on enhancing the power-constrained performance of the hardware. Ideal candidates will have a strong track record of understanding and analyzing memory systems architecture to improve performance per watt (perf/W) and performance per millimeter (perf/mm). A broad perspective across the field of computer architecture and depth in the area of power, performance, and area (PPA) analysis is highly desirable. NVIDIA has pioneered programmable GPUs and the CUDA language and is a world leader in high-performance computing technology, with aggressive plans for future processors. This position offers the opportunity to have a real impact in a fast-moving, technology-focused company. What you will be doing: Develop innovative high-performance processor and system architectures, focusing on the memory system and energy efficiency. Develop architecture and micro-architecture features to improve the state-of-the-art in GPU memory systems, optimizing along the axes of perf/W, perf/mm, and perf/$. Develop and enhance architecture prototype models for power and noise analysis. Participate in performance and power simulation of features to analyze, define, and improve energy per byte. Analyze benchmarks, application workloads, and performance/power simulation and emulation results to identify areas for architecture optimizations. Debug power, performance, and functional issues with high-level models, RTL simulation and emulation, silicon, and systems. Collaborate with outside partners on system infrastructure. What we want to see: 10&#43; yrs of experience in CPU/GPU architecture, memory systems design with a focus on energy efficiency in the system. Bachelor

At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification Engineer - GPU means working on modern technology powering consumer graphics and AI applications. This position is ideal for those passionate about technology and eager to impact computing’s future. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs. You will be responsible for verifying the ASIC build, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent. Understand the design and implementation of your unit/cluster/chip, define the verification scope, develop the verification infrastructure, and verify the correctness of the design. Collaborate with architects, designers, and pre- and post-silicon verification teams to accomplish your task. What we need to see: Bachelor's Degree in EE, CS, or CE or equivalent experience. 5&#43; years of relevant experience. Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, Indago, GDB). Expertise in System Verilog or similar HVL. Strong debugging and analytical skills. Perl and C/C&#43;&#43; programming language experience desirable. Strong communication skills and the ability & desire to work as a great teammate are huge pluses. Experience in crafting test bench environments for unit and system level verification. #LI-Hybrid Your base salary will be det

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Firmware Engineer BIOS/UEFI Description - The Firmware Engineer is responsible for ensuring that embedded firmware meets the highest standards of quality, robustness, and long‑term reliability. This role works closely with firmware developers, hardware engineers, architecture teams, QA, and cross‑functional partners to define quality metrics, validate system behavior, improve defect detection, and build processes that prevent regressions. Responsibilities Develop, execute, and maintain comprehensive firmware test plans, including functional, regression, stress, corner-case, and long-duration reliability tests. • • • Evaluates the firmware architecture, design and development plus testing methodologies to create strategy and implement methods to bring increased quality and reliability to the firmware. Reviews firmware code and test plans including functional, regression, stress, corner-case and long-duration reliability tests. Perform root-cause analysis for firmware defects, drive containment, corrective actions, and verification of fixes. Create and manage quality dashboards, KPI, failure rates, and reliability metrics. Evaluate failure modes exposed during design, development, manufacturing and field use; propose design or process improvements to prevent recurrence. Works with product architects, firmware teams, product managers and provides critical guidance, system-level debugging and troubleshooting to various teams, as a Subject Matter Expert. Reviews and evaluates designs and project activities for compliance with systems design and development guidelines and standards; provides tangible feedback to improve product quality and mitigate failure risk. Create and manage quality dashboards , KPIs, failure rates, and reliability metrics. Validate firmware integration with hardware, BIOS/UEFI, EC, micro

About the Role The Engineering Acceleration team builds and operates the foundational systems that engineers use to build, test, and ship ChatGPT, the API, and OpenAI's infrastructure. We are looking for an engineer to help evolve OpenAI's build and continuous integration systems for a fast-growing engineering organization. This role sits at the intersection of developer productivity, build systems, distributed infrastructure, and software quality. You will work on the systems that determine how quickly and confidently engineers can move: Bazel-based builds, Buildkite pipelines, test selection, remote caching and execution, CI observability, and tooling that helps engineers understand and fix failures quickly. Our mission is to make OpenAI one of the most productive engineering organizations in the world while preserving a high bar for correctness, reliability, and safety. The best version of this work is invisible when it succeeds: builds are fast, tests are trusted, CI failures are understandable, and engineers can focus on shipping useful systems instead of fighting infrastructure. In This Role, You Will Own and evolve Bazel-based build and test workflows across a large, polyglot monorepo. Design and maintain Starlark rules, macros, toolchains, and integrations that make builds reproducible, hermetic, and easy for product teams to adopt. Improve CI performance and reliability across Buildkite pipelines, including queue time, build time, cache hit rates, test sharding, retry behavior, and flake isolation. Build systems that reduce unnecessary CI work through affected-target detection, dependency graph analysis, test selection, caching, batching, and smarter scheduling. Improve local development workflows so engineers can reproduce CI behavior, debug build failures, and iterate quickly without learning every detail of the build stack. Operate and optimize build infrastructure across Docker/OCI images, Kubernetes-based runners, cloud resources, and remote cache/exec

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs You will be responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks What we need to see: Bachelors Degree in EE, CS or CE or equivalent experience 2&#43; years of relevant experience Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, GDB) Experience crafting test bench environments for unit and system level verification Strong background in System Verilog or similar HVL Expertise with C/C&#43;&#43; programmin

High Performance Workstation Business Development Manager- AMD Description - Sales and Technical Consultant, High-Performance Workstation Segment We are seeking a customer-facing AI and Acquisition subject matter expert role on the HPI Advanced Compute Solutions (ACS) sales team and will focus on growing HP’s Z high-performance workstation Total Addressable Market (TAM) within the AI PC market. This individual will be responsible for working with customers and partners in support of attracting new customers and growth in HP’s high performance compute solutions . The role analyzes market competition, gathers customer feedback, and shares insights with internal teams for improvement. The ideal candidate will possess a breadth of abilities and skills, including client hardware knowledge, AI and machine learning applications and solutions, strong marketing and presentation skills, solid understanding of customers’ business and decision makers, and strong team leadership to drive growth with an emphasis on Advanced Micro Devices (AMD) platforms with customers and partners. Most importantly, the role offers the opportunity to be a business leader in support of the sales teams nationally - contributing to the strategy, setting direction, and achieving success in AMD and HP. The role requires someone to be self-driven, capable of operating autonomously through ambiguity, and constantly striving for excellence. THE PERSON: We seek an individual with exceptional technical & business knowledge and familiarity with AI trends in the PC market. This individual should be comfortable working: Dynamic environment and have experience with PC client and AI hardware, software and systems. Work independently within a core team is important, and you will rely upon your excellent communication and relat