Nvidia Manager in United States

NVIDIA has been redefining computer graphics, desktop gaming, and enhanced computing capabilities for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As a NVIDIAN, you will work on problems that sit at the boundary of architecture, silicon, firmware, software, and production, where strong judgment matters as much as technical depth. We're the Silicon Design for Productization (DFP) Team, within the broader Silicon Co-Design Group, and we turn power and thermal design into executable productization methodology. Power and thermal are among the most complicated problems we work on at NVIDIA because they sit at the intersection of architecture, workload behavior, silicon variation, firmware policy, platform constraints, and product goals. Small decisions here have an outsized impact on performance, efficiency, reliability, bring-up speed, and ultimately what the product can deliver in the field. We define how features move from concepts to bring-up, characterization, validation, and release. In this role, you will help us build that bridge. We're looking for an engineer who reasons from first principles, flourishes with ownership in a fast-paced environment, and uses AI with sound judgment. What you’ll be doing: Lead the effort across multi-functional teams to keep the program’s power and thermal productization strategy clear, executable, and on track. Create methodology and silicon test plan based controller designs and architecture, including characterization process, debug tools, fuse/firmware settings and lab requirements. Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure. Steward the Power and Thermal playbook when the existing productization methodology

NVIDIA silicon runs the world's AI infrastructure. The frequency it delivers across every voltage, process corner, and workload is not assumed. It is measured, correlated, and validated. This role does that work. The Silicon Co-Design Group is where architecture intent becomes silicon reality. We own the boundary between what was designed and what was built, and we are the team that knows the difference. When a program ships at frequency and at quality, this team is a reason why. You will be the person who follows through between simulation and silicon. When the model is wrong, a frequency corner that doesn't hold, a Vmin that walks, a critical path that timing analysis missed, you find out why, and your data is what the rest of the program acts on. Architecture, design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers, work like experimentalists, and reason like data scientists. If that is you, read on. What you'll be doing: Own silicon speed characterization from first power-on through production sign-off, covering frequency, Vmin, Vmax, and timing margins across the full PVT space. Close the correlation gap. Tie pre-silicon timing analysis and critical path predictions to measured silicon, quantify where the model diverges from reality, and produce analysis that architecture and design can act on with confidence. Trace failures to their source, whether a microarchitectural bottleneck, a critical path that doesn't close under voltage, a clocking issue, or a process corner the model didn't anticipate, and drive the resolution. Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing difficulty. Know where AI accelerates real work and whe

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs You will be responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks What we need to see: Bachelors Degree in EE, CS or CE or equivalent experience 2+ years of relevant experience Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, GDB) Experience crafting test bench environments for unit and system level verification Strong background in System Verilog or similar HVL Expertise with C/C++ programmin

SCG sits at the crossroads of design, architecture, marketing, and productization—owning the journey from the architecture stage through final product definition across Gaming, Datacenter, Automotive, and Embedded markets. As a System Verification CoDesign Engineer, you will work on system-level speed features, develop the verification collaterals and automation infrastructure to characterize and validate them, and lead debug of the complex silicon issues that stand between a program and on-time shipment. This is a hands-on role for an engineer who combines deep technical craft with the drive to compress cycle time using modern tooling—including AI—without losing rigor. What You’ll Be Doing: Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features and deliver industry-defining products. Understand system level behavior and speed reliability margins, bounding box constraints and identify solutions that optimize margins . Translate hardware features and architectural requirements into verification techniques that achieve full coverage across testing flows. Perform closed loop validation by correlat ing silicon behavior against timing simulation and design expectations; provide actionable feedback to improve future designs. Define, prototype, and refine pre- and post-silicon bring-up flows to ensure

NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. Perform substrate breakout patterns for ASIC packages. Optimize package pinout incorporating system level trade-offs of pins assignment. Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite. Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance. Develop symbols and CAD library databases using Cadence APD design tools Develop methodologies to improve layout productivity What we need to see: Hold a B.S. Electrical Engineering or equivalent experience 5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus Proven experience in substrate layout of wire bond and flip chip packages, preferred Significant background with Cadence AP

We at NVIDIA seek an Senior Developer Relations, Automated Synthetic Chemistry Science Lead who can coordinate science streams. This role exists at the crossroads of experimental science, optimization, analytical characterization, AI modeling, laboratory automation, and data infrastructure. It demands a practitioner with a background in research who can lead interdisciplinary science teams and accelerate experimentation without compromising scientific quality. What you'll be doing: Coordinate the operating plan across research priorities, technical execution, and program achievements. Convert research objectives into experimental priorities, parameter-space development, campaign planning, and success criteria. Lead research initiatives encompassing synthetic chemistry, catalysis, process chemistry, machine learning, automated systems, and data processing. Build standardized experimental traces capturing successful and unsuccessful outcomes, metadata, quality-control signals, analytical summaries. Guide AI systems for feasibility assessment, outcome prediction, optimization, scope exploration, and campaign orchestration. Integrate automated experimentation, analytical data streams, data curation, model retraining, and campaign decisions into a closed-loop operating model. Establish science-stream governance: build reviews, decision logs, risk and dependency tracking, quality thresholds, and paths for addressing blocking issues. Prepare recurring workstream readouts for program leadership, including scientific progress, critical decisions, cross-team dependencies, resource needs, and unresolved risks. What we need to see: PhD (or equivalent experience) with 10+ years of hands-on experience in experimental science, chemical engineering, material science, robotics, a

We are seeking a highly skilled and hard-working Senior Test Developer / test engineer to join our multifaceted Enterprise Software QA team. This role offers an outstanding opportunity to leave your mark on the design, construction, optimization and testing of large-scale infrastructure for various foundational NVIDIA unified cloud services and data center offerings. If you are a dedicated engineer with strong expertise in cloud infrastructure and distributed systems and want to apply your skills with AI tools, this role could fit you perfectly. You will thrive in an exciting, innovative environment. What you'll be doing: Work with development teams on test plans for all layers of SW stack for cloud infrastructure, execution, reviews, failure analysis and assessing overall quality and risk. Work with customer PMs on software issues including technical feedback from OEMs and CSPs. Develop key benchmarks to track execution and deploy process improvements to improve efficiency Leverage AI skills to expedite the test scope, test plan, execution and automation workflows. Lead NVIDIA Cloud and Data Center bring up activities which will involve validation, reporting, working with engineering to debug issues, providing design input at times, adding coverage in different areas. Design, develop and maintain CI/CD pipelines for continuous testing in cloud environments when needed. Perform performance, scalability, and reliability testing of cloud services. Implement and maintain test environments in cloud platforms such as AWS, Azure, or Google Cloud. Supervise the infrastructure to alert on significant events, ensuring the highest level of system performance and reliability. Work with various different partner teams to ensure availability of clusters to test on and take the lead in resolve all issues. Working with tea

We are now looking for a dynamic business leader to grow NVIDIA's Host Networking business for AI infrastructure with AI Labs and Hyperscalers! This leader will drive strategic direction, customer engagement, and multi-year growth for networking products such as NVIDIA DPUs, SuperNICs, and their associated software and ecosystem. Success in this role will be measured by the level of adoption and integration of our Host Networking products with our end customers' workflows and workloads. Success is contingent upon building trust with executives, architects, product leaders, and platform teams across NVIDIA and our largest customers. This leader will lead the go-to-market motion, connecting customer AI factory needs to NVIDIA's networking portfolio and aligning product, sales, engineering, architecture, marketing, and partner teams to secure design wins and scale deployments. What you'll be doing: Identify, develop and close strategic design wins for DPU and SuperNIC with top AI labs and Cloud Service Providers! Build and implement the segment sales growth strategy for host networking across hyperscaler and frontier model AI labs building large scale AI infrastructure. Define customer-specific DPU and SuperNIC value propositions and deployment motions, and lead a matrixed team across product, architects, engineering, sales and marketing teams. Promote NVIDIA host networking products externally and internally, positioning their value for AI workloads and other infrastructure products from NVIDIA, in a collection of use-cases in Networking, Security and Storage. Build a robust opportunity pipeline with segment sales and account teams, including account mapping, customer requirements, proof points, executive engagement, and partner alignment. Track and drive quarterly business reporting, forecast accuracy, design-win progress, roadmap asks, and

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s leading inference accelerator. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people around the globe. Their mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of inference accelerator You will be responsible for verification of the ASIC design, architecture, reference models and micro-architecture using advanced verification methodologies Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verifi

Our work at NVIDIA is dedicated towards a computing model focused on visual and AI computing. For two decades, NVIDIA has pioneered visual computing, the art and science of computer graphics, with our invention of the GPU. The GPU has also shown to be spectacularly effective at solving some of the most complex problems in computer science. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots and self-driving cars that can perceive and understand the world. We are looking to grow our company and teams with the smartest people in the world and there has never been a more exciting time to join our team! The AI Infrastructure Product Design team creates software used by engineers and researchers to prepare data, run complex workflows, and understand results. This internship offers ownership of a defined product problem from early research through a tested design and implementation handoff. Designers on this team often move between Figma and working HTML prototypes, and may hand off HTML directly to engineering. This work calls for a high standard of visual and interaction design alongside technical fluency. The role is a good fit for someone who enjoys making technically complex systems easier to understand and who uses large language models and software agents thoughtfully as part of their design and prototyping process. What you will be doing: Own a focused design project for an internal AI infrastructure product, from understanding the problem through a validated design and implementation handoff. Interview engineers and researchers, map their workflows, and turn the findings into clear product requirements, user flows, and interaction models. Create precise, implementation-ready interface designs and interactive prototypes in Figma and HTML/CSS, with careful attention to typography, hierarchy, spacing, visual consistency, interactio

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Our team builds AI-driven software systems for Circuit Design: combining automation algorithms, DL models and agentic workflows to accelerate end-to-end design automation. Come join this integral team in our Circuit Solutions Group! What you'll be doing: Work within a multi-functional team on various projects involving Pre-silicon and Post Silicon custom circuit design and related data, Circuit/Layout Optimization and Spice correlation Research and implement techniques on frontier solutions of electronic design automation. Build and innovate agentic AI solution for VLSI design problem. Responsible for analyzing the problem or datasets, raise and validate hypotheses, design and build models and algorithm until they reach the desired QOR. What we need to see: MS (or equivalent experience) with 3+ years’ experience or PhD with 1+ years’ experience in Electrical/Computer Engineering degree Experience in the following fields is a strict requirement for this role: Combinatorial Optimization, Agentic AI and large language models, Machine Learning for Chip Design & EDA Experience in Algorithms/Data Structures/

NVIDIA DGX Cloud is an AI Factory designed to power the next generation of AI and industrial-scale breakthroughs. As a Principal Engineer for Security Architecture, within our Security Engineering organization, you will own a core security domain of the AI factory: the architecture, the paved road that delivers it, and much of the code underneath. You will hold the security design bar across DGX Cloud from inside the teams doing the building, and this is a founding seat on a new team. Security Engineering is a new organization at DGX Cloud, accountable for the security outcome of the platform, and Security Architecture is the function inside it that holds the design bar. Security here is fleet horizontal and stack vertical, so your work will cross every DGX Cloud engineering organization: you will embed with the teams building GPU clusters, control planes, and services, join their designs as a participant rather than an approver, and leave behind systems in which an entire class of risk is no longer possible. There is no architecture review board here and no approval queue. You are a senior IC with deep security domain knowledge, and the security bar holds because you helped set it and then helped ship it. What You Will Be Doing: Own a Security Domain End to End: Take architectural ownership of a core domain of DGX Cloud security, from the design through the system running in production. That could be tenant and GPU workload isolation, workload identity, infrastructure and network, supply-chain provenance, hardened baselines and patching, or deploy-time policy and admission control. Embed with the Teams Building It: Join the design early, write the code, and help land it. The posture is not "you did this wrong." It is "here are the considerations we need to meet, I will help, let's go to work." Build Paved Roads, Not

Own the end-to-end execution that takes NVIDIA DRIVE Autonomous Driving Software (NDAS) from product definition to production deployment across major OEM vehicle lines. We are seeking an accomplished engineering execution leader to lead adaptation, integration, validation, and production readiness of NVIDIA Autonomous driving solution (NDAS) for strategic automotive OEMs. You will work between NVIDIA product and engineering teams and the OEM's vehicle, software, systems, and validation groups. The role involves converting an agreed feature set into a deliverable vehicle program. This entails clarifying requirements, coordinating interfaces and responsibilities, setting the engineering plan, building consistent productization workflows, and managing issue resolution. You will influence teams such as systems engineering, autonomous-driving development, platform software, functional safety, cybersecurity, quality, validation, release, and customer engineering. What You'll Be Doing: Lead NDAS execution with major OEMs across the full program lifecycle — from feature definition and technical alignment through vehicle integration, validation, launch, and production ramp — owning the coordinated engineering plan per vehicle line, including requirements, architecture, adaptation scope, achievements, staffing, validation strategy, release criteria, and production-readiness gates. Translate OEM vehicle requirements and use cases into clear commitments for NVIDIA teams, while ensuring OEM partners understand product capabilities, constraints, assumptions, and the work required on their side; build scalable, repeatable workflows for adapting NDAS to specific OEM platforms, vehicle architectures, sensor configurations, compute platforms, networks, and development processes. Drive multi-functional implementation across autonomous-driving features, systems, platform software, vehicle integratio

NVIDIA Research is seeking extraordinary networking innovators to join our NVResearch team. As a research intern on this team, you will contribute to the development of future high-performance networking and computing systems. We are seeking a balanced background of research excellence in building systems and a deep understanding and broad perspective across the fields of computer architecture and communication systems for distributed computation. NVIDIA has pioneered programmable GPUs and the CUDA language, and this visionary Research team will take those technologies to the next level with its creative ideas and new inventions. This position offers you the opportunity to have a real impact while working with some of the most creative and forward-thinking people in the world who are here at this dynamic, technology-focused company. What you'll be doing: Develop algorithms and design hardware and software, extending the state of the art in computing, networking, and other technology areas surrounding NVIDIA's business. Invent new techniques, technologies, methodologies, processes, and devices, to enable new products or types of products. Deliverable results include prototypes, patents, and publications. Contribute to research that informs NVIDIA's technology direction 5-10 years out. Work focuses on long-horizon problems rather than products currently shipping or in development, except as to how they can be extended and improved. Projects can include but are not limited to: optimizing communication stacks for AI training and inference, designing network protocols and congestion control, co-designing AI systems across software and hardware, developing circuits and microarchitecture for network controllers and switches, and architecting networks built on optical switching and silicon photonics. What we need to see: Pursuing a

NVIDIA is seeking a Senior System Architect: Heterogeneous EDA Systems to solve a complex challenge in accelerated computing: Failure Attribution at Scale. As EDA or equivalent experience workloads scale across thousands of heterogeneous nodes, a single failure can cause massive resource waste. We need an engineer to develop and build an automated framework. This framework will ingest telemetry from CPU and GPU clusters to identify the root cause of job failures in real-time. It will distinguish between hardware faults, infrastructure instability, and software defects. What you'll be doing: Architect Failure Attribution Frameworks: Build a scalable "flight recorder" for EDA jobs that captures high-fidelity state across the CPU, GPU, and Fabric at the moment of failure. Build automated diagnostics that correlate GPU XID errors, PCIe bus failures, and CUDA memory exceptions. Connect these errors with system-level events such as OOM kills or NUMA-related hangs. Distributed Logging & Tracing: Implement low-overhead tracing mechanisms (using tracing tools or custom agents) that provide access to job execution across multi-node Slurm or Kubernetes clusters. Root Cause Automation: Develop heuristics and models based on machine learning to classify failures as "Hardware Fault," "Software Bug," or "Environment Issue." This reduces the Mean Time to Identify (MTTI) for R&D teams. Resiliency Engineering: Work closely with hardware and infrastructure teams to define "signals of impending failure," enabling proactive job migration or check-pointing before a crash occurs. What we need to see: Distributed Systems Mastery: BS, MS, or PhD in Computer Science or Electrical Engineering (or equivalent experience) with 6+ years in systems programming. Experience building automated