Packaging Research And Development Engineer in United States

Packaging Research and Development Engineer — US, Arizona, Phoenix. Apply via Workday.

Job Details: Job Description: As a Packaging Module Development Engineer, you will play a pivotal role in the development and optimization of Intel's assembly media and collaterals. Your daily work will involve designing innovative solutions to improve media and collateral reliability, manufacturability, and cost efficiency. Your contributions will directly support Intel's cutting-edge assembly packaging technology roadmap, driving advancements in semiconductor manufacturing processes. Business Group You will be part of Intel Corporation's Media Development organization, a team dedicated to advancing packaging technologies and manufacturing processes. This group operates at the forefront of innovation, enabling high-performance products and driving Intel's leadership in the semiconductor industry. By joining this collaborative environment, you will contribute to Intel's broader goals of delivering transformative technology solutions. Key Responsibilities Develop and optimize media and collaterals to meet quality, reliability, cost, yield, and productivity targets. Design and implement new media and collateral solutions, leveraging statistical methods like Design of Experiments (DOE) and Statistical Process Control (SPC). Conduct evaluations of media and collaterals under simulated field conditions, including tests for heat, humidity, temperature cycling, and dynamic forces. Lead initiatives to identify and mitigate media and collateral quality and reliability risks, utilizing innovative tools and methods. Provide technical consultation on media and collateral challenges and deliver solutions that align with operational and technology milestones. Document technical improvements and innovations through research papers and presentations. <p styl

We take play seriously. We’re looking for curious adventurers ready to find their party, fueled by imagination and drive to build what’s never been built before. At Hasbro and Wizards of the Coast, you’ll collaborate with passionate teams to reimagine our iconic brands and create experiences that spark joy, connection, and community through the magic of play. This is your chance to shape legendary play that lasts a lifetime. Ready to shape the future of play? At Hasbro, we entertain and connect generations through storytelling and play. We’re looking for a curious, analytical, and driven Associate Brand Manager to help lead iconic brands — translating consumer and shopper insight into line plans and products kids ask for by name. You’ll work alongside designers, engineers, franchise managers, and licensees to bring new play experiences to life across global markets, partnering closely with regional marketing, demand planning, packaging, and sourcing teams. You’ll be the voice of the consumer throughout — using research and competitive analysis to shape strategy and translating data into stories that move the business. The Preschool & Fashion Team works on brands like Peppa, Potato Head, Baby Alive and Furby! Effective from the date that Hasbro opens its new Boston location, this position will be on-site Tuesday-Thursday at Hasbro's new HQ location in Boston, MA. In the interim, this position will be onsite Tuesday-Thursday at Hasbro's HQ in Pawtucket, RI or at Hasbro's temporary location in Boston, MA. A Day in the Life as an Associate Brand Manager: Business Management Analysis on POS, share, and inventory tracking (Circana or equivalent); forecast inputs P&L stewardship at the item and line level — cost, margin, pricing, and promotional plans Business reviews, retailer line-review content, and the annual brand planning cycle Detailed work in P2M Development System and dashboards Product Development Line plan and range architecture: what to m

Job Details: Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Life at Intel: https://jobs.intel.com/en/life-at-intel As a Yield Development Engineer, you will be at the forefront of advancing Intel's cutting-edge process technologies within our Logic Technology Development (LTD) organization. This pivotal role involves identifying root cause yield limiters and driving solutions that enhance manufacturability and yield across technology nodes. You will work within a dynamic, fast-paced environment to ensure the successful introduction of new products, process improvements, and robust methodologies to meet manufacturing goals. Your expertise will directly contribute to Intel's ability to deliver world-class semiconductor solutions and advance the future of computing. About Intel Foundry At Intel, the Foundry Technology Development (TD) unit is the driving force behind Moore's Law, enabling us to create groundbreaking technology that enriches lives globally. With over 15,000 dedicated employees, Foundry TD spearheads innovative research, develops next-generation processes and packaging technologies, and manages high-volume manufacturing in state-of-the-art facilities. Within Intel Foundry TD, our Logic Technology Development (LTD) organization is at the forefront of creating and refining each process technology node, paving the way for tomorrow's computing solutions. Your responsibilities as a Product Yield Development Eng

Who are we? Cohere is the leading security-first enterprise AI company. We build cutting-edge foundation AI models and end-to-end products that are designed to solve real-world business problems. We’re training and deploying frontier models for enterprises who are building AI systems. We believe that our work is instrumental to the widespread adoption of AI and we are looking for folks that want to be part of that. We obsess over what we build. Each one of us is responsible for contributing to increasing the capabilities of our models and the value they drive for our customers. Cohere is a team of researchers, engineers, designers, and more, who are all passionate about their craft. We are a global technology company headquartered in Toronto with key offices in London, New York City, San Francisco, Montreal, Paris, Berlin and Seoul. Join us! The Strategy & Business Operations team’s mission is to support decision making on critical C-level topics and act as a force-multiplier for functional priorities across the organization. We are looking for a BizOps Lead to join the team, reporting to the Head of BizOps, focused on strategy, corporate development, and cross-functional projects. In this intermediate level individual contributor role, you may: Influence strategic decision-making by collaborating with and building consensus among leaders across the organization, including product, GTM, and research and engineering Optimize pricing and packaging, ensuring that the company's offerings are both attractive to customers and profitable Build financial models and analyses to evaluate new and existing opportunities Contribute to corporate development activities: fundraising, strategic partnerships, investor relations, M&A, etc. Conduct market and competitive analysis to anticipate and respond to emerging trends and to identify new opportunities for innovation and growth This role is a good match if you: Have 3-4 years of top tier investment banking / investing expe

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Packaging Signal/Power Integrity (SI/PI) Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for modeling and simulation of various packaging solutions from silicon redistribution layers to IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Modeling and simulation of packaging hardware including redistribution layers (e.g., interposers, RDLs), IC substrates, and silicon testchip routing - Work closely with stakeholders to meet design requirements - requirements come from both theory and hardware teams. In some pathfinding projects, you will be asked to participate in creating requirements and novel packaging hardware. - System-level modelling and simulation; end-to-end simulations to ensure designs meet system-level requirements - Deliver and disseminate design milestones to stakeholders - Communicate designs in pr

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Packaging Modeling Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for thermal modeling and simulation of various packaging solutions from silicon redistribution layers to IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Thermal modeling and simulation of packaging hardware to understand how heat flows from silicon test chips through various heat spreader hardware - Manage the overall integration of the packaging hardware and enable co-design between relevant stakeholders - Work closely with mechanical designers to define heat spreaders for optimal performance - Deliver and disseminate design milestones to stakeholders - Communicate designs in presentations and relevant documentation - Stay current with the latest developments in packaging technology and design techniques by attending conferences and rea

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Interposer Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for physical design and integration of advanced packaging interposers within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Physical design and integration of interposers used within advanced packaging for quantum computing - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Design validation and verification; including DRC and LVS - Deliver and disseminate design milestones to stakeholders - Communicate designs in presentations and relevant documentation - Stay current with the latest developments in packaging technology and design techniques by attending conferences and reading papers As

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum IC Substrate Package Layout Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for design of large form factor IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Design of IC substrates using Siemens Xpedition IC package design software - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Deliver and disseminate design milestones to stakeholders - Design validation and verification; including DRC and LVS - Advanced packaging design integration (2.5D and 3D) with IC substrate - Tapeout of designs with substrate suppliers in collaboration with Intel substrate teams - Communicate designs in presentations and relevant documentation - Stay curre

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a Senior Actuator Design and Integration Engineer to lead the development of custom electromechanical actuators for advanced robotic systems. You will own actuator development from early architecture and concept generation through prototype validation and system integration, partnering closely with mechanical, electrical, controls, firmware, reliability, and manufacturing teams. This role focuses on the design, integration, and validation of precision electromechanical systems, including motors, transmissions, sensing, structural components, and thermal architectures. You will help drive actuator development across the full engineering lifecycle while establishing scalable design, test, and integration practices for future robotic platforms. This role is based in San Francisco, CA, and requires in-person presence 4 days a week. In this role, you will Lead the architecture, design, and integration of custom robotic actuators, including motors, transmissions, sensing, thermal systems, structural components, and packaging. Define actuator requirements and system-level trade studies around torque density, bandwidth, efficiency, thermal performance, backdrivability, inertia, reliability, manufacturability, and cost. Design precision electromechanical assemblies with strong attention to tolerances, alignment, load paths, thermal expansion, sealing, wear, and serviceability. Drive actuator integration into robotic systems, partnering closely with controls, firmware, electrical, and robotics software teams to optimize closed-loop pe

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a Mechanical Design Engineer to lead the development of motor mechanical designs and prototype hardware for advanced robotic systems. You will own stator and rotor mechanical development from early concepts and detailed design through hands-on builds and prototype validation, partnering closely with electromagnetic, electrical, test, and manufacturing teams. This role focuses on the design, integration, and validation of motor components and prototype processes, including laminations, stack assemblies, bobbins, winding interfaces, and fixtures. You will help drive motor development from initial design through repeatable low-volume builds while establishing the tooling, work instructions, and validation practices needed for future robotic platforms. This role is based in San Francisco, CA, and requires in-person presence 4 days a week. In this role, you will Own stator and rotor mechanical designs and released CAD and drawings, including geometry, interfaces, fits, tolerances, retention, assembly access, and mechanical validation. Develop laminations, stack assembly methods, bobbins, and winding interfaces that control alignment, insulation, conductor placement, and end-turn packaging. Design, fabricate, and debug fixtures for winding, stacking, assembly, alignment, and inspection. Build and troubleshoot prototypes. Use measurements, defects, rework, and assembly effort to improve designs and processes. Establish low-volume prototype production with equipment, build sequences, work instructions, revision control, traceability

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) department at Micron Technology is at the forefront of innovation, driving the advancement of memory and storage Interconnects and Packaging solutions that transform how the world uses information. Our team is dedicated to developing innovative processes and technologies that enable the creation of next-generation semiconductor products which drive the AI revolution. Position Overview: As a Staff Process Engineer in Advanced Packaging CMP team, you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. This position requires communication and collaboration with associates both within the region and internationally. Strict adherence to Micron Intellectual Property Protection policy is vital. This role will also extensively collaborate with vendors to develop processes that meet integration requirements. Responsibilities: Perform fundamental research, consumables development, and hardware evaluation, as well as test processes for novel applications Initiate and manage experiments to widen process margins and evaluate man

Who We Are Notion is the collaborative AI workspace where teams and agents think together . We're building one place where your knowledge, projects, meetings, and AI tools live side by side, so work is faster, clearer, and less fragmented. Millions of individuals, small teams, and large companies run their work on Notion. Notinos (our employees) are customer zero in bringing this future of work to life. We care about craft, building things that last, and the belief that great work is still fundamentally human. Our goal isn’t to ship the next feature. Each and every team of Notinos is working to set the standard for how humans work together in the AI era. From building a business’s system of record to making and managing AI agents to automating away the busy work, we care deeply about giving our customers more time for their life’s work. About the Role: We’re seeking an experienced User Researcher to shape growth-related product decisions by delivering insights that fuel AI experiences. This role blends traditional growth research, such as adoption, monetization, and pricing and packaging, with fast-evolving AI features like Notion Agent and Chat that permeate experiences like onboarding and Workspace creation. It requires a unique mix of user research expertise, strategic foresight, and technical fluency in AI and AI product development. This role can be based in either San Francisco or New York City. We work from our offices on Mondays, Tuesdays and Thursdays (our Anchor Days) because we do our best thinking and building together in person. We’re looking for someone who’s excited to work alongside the team during those days. What You'll Achieve: Design and execute studies that evaluate how people experience Notion with AI in the loop, including how users discover, trust, and get value from AI, and identify barriers to adoption and willingness to pay. Run mixed-methods research (qual + quant), including interviews, concept testing, prototype/usability testing, diary

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology and amazing people. Today, we're harnessing the boundless possibilities of AI to build the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Accomplishing unprecedented goals calls for imagination, inventiveness, and exceptional talent from around the world. As a NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Join our team and discover how you can build a lasting impact on the world. NVIDIA designs the silicon behind AI, accelerated computing, and graphics. Power and thermal architecture decisions sit behind every watt of performance and every degree of thermal headroom! We are the Silicon Co-Design Group (SCG). We are hiring a Principal Architect to scout the research and industry landscape, identify emerging system-level co-design ideas in power and thermal, and drive them across teams into product differentiation across NVIDIA's roadmap. This role shapes system, platform, and datacenter feature/behavior, and partners with teams across Nvidia. SCG scope spans across architecture, design, software, operations, platforms, and productization. What you'll be doing: Architect next-generation system, platform, and datacenter-level power and thermal co-design solutions. Scan internal research, academia, standards bodies, and silicon, memory, packaging, and platform partners for what is emerging. Build the product differentiation case for each candidate idea, performance, power, reliability, schedule, cost, and brainstorm what is worth pursuing. Lead end-to-end co-design from concept to product. Drive alignment across architecture, VLSI, softw

About the Team OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team builds next-generation AI-native silicon and systems while working closely with software, research, and manufacturing partners to co-design hardware tightly integrated with AI models. In addition to delivering systems for OpenAI’s supercomputing infrastructure, the team develops the tools, methodologies, and strategic partnerships needed to accelerate hardware innovation. About the Role We’re seeking an experienced Hardware Strategic Sourcing Manager to own sourcing strategy and supplier partnerships for fiber and optical interconnect components across OpenAI’s next-generation AI infrastructure. Reporting to the Head of Partnerships & Strategic Sourcing, you will lead sourcing across fiber cable assemblies, internal optical harnesses, fiber shuffles, optical backplane assemblies, connectorized and standalone passive optical assemblies, fiber-array units (FAUs), fiber-to-chip and coupling interfaces, detachable connectors, optical routing, and assigned optical packaging, assembly, and test services. You will work closely with electrical engineering, optical engineering, systems engineering, mechanical and packaging engineering, quality, rack integration, data-center deployment,manufacturing, supply chain, finance, legal, and program management teams to translate demanding bandwidth, signal integrity, reliability, and scale requirements into resilient supplier partnerships and scalable commercial strategies. Your work will directly support the performance, reliability, manufacturability, and scale of the high-speed optical connectivity required for OpenAI’s next-generation AI systems. In this role, you will: Develop and execute a comprehensive sourcing strategy for fiber and optical interconnect components supporting high-bandwidth AI systems and infrastructure. Own sourcing across optical fiber cable assembli