Pre Sales Systems Engineer in United States

Become a part of our caring community The Care Management Support Assistant contributes to administration of care management. Provides non-clinical support to the assessment and evaluation of members' needs and requirements to achieve and/or maintain optimal wellness state by guiding members/families toward and facilitate interaction with resources appropriate for the care and wellbeing of members. The Care Management Support Assistant performs basic administrative/clerical/operational/customer support/computational tasks. Typically works on routine and patterned assignments. The Care Management Support Assistant will review inbound referrals and correspondence for processing, fulfilment or resolution utilizing all appropriate software systems and resources. Screen physician’s orders and documentation to identify that all qualifying medical documentation and required information is included. When necessary, request additional applicable information from referring entity. Perform verification of benefits coverage and eligibility for services per Health Plan contract. Review referral data matching it against specified medical terms and diagnoses or procedure codes and follow established procedures for approving request or referring request for further review. Provide referral management education to members and providers regarding medical benefits, referral status and prior authorizations. Communicate with patient to confirm demographics and explain the details of the services/care requested. Coordinate the timely delivery of care and services with providers. Also communicate with referring entities, providers, and members regarding final referral determination while maintaining detailed documentation to record patient, physician, referral source and provider interactions and communications. Work with Pre-Authorization, Utilization Management, Billing, Pharmacy, and Home Care r

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro-architecture using formal verification tools, define the verification scope, and ensure correctness. You will employ sophisticated formal techniques to acquire sufficiently bounded proofs while working with architects, designers, and pre- & post-silicon verification teams to accomplish your tasks. You will efficiently complete the formal verification effort for the entire project cycle, delivering high-quality results on schedule, and clearly conveying those results to the team. What you will be doing: Identify key behaviors for verification to write clear testplans for sophisticated designs. Implement testplans using the latest formal techniques, including the development of environment assumptions, assertions, and cover properties. Develop abstraction models to overcome complexity challenges and acquire full proofs, or bounded proofs with sufficient coverage. Drive formal tools to realize their best performance. Debug RTL to identify causes of failure scenarios. Contribute to flow and script development

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As a NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. NVIDIA Silicon Codesign Group is seeking a versatile engineer to join the HW bring-up methodology team. The SCG team is uniquely positioned to have an end-to-end view of the product development cycle - from early architecture definition, through bringup, to product release. What will you be doing: Led end-to-end planning and on-time execution of Nvidia's new chip bringup effort, from pre-silicon through production deployment. Coordinate multi-functional teams across Architecture, Build, Validation, DFT, SW, System, and Operations to drive shared bringup achievements. Improve cross-team communication, work, and handoffs. Develop and standardize methodologies, processes, and workflows for silicon bringup, creating reusable checklists and playbooks. Drive scheduling, equipment, and material logistics to support ambitious NPI and production schedules. Lead post-action reviews and convert learnings into concrete process improvements for future silicon and solution bringups. Contribute to post-silicon learnings that feed back into architecture, design, and pre-silicon

NVIDIA silicon runs the world's AI infrastructure. The frequency it delivers across every voltage, process corner, and workload is not assumed. It is measured, correlated, and validated. This role does that work. The Silicon Co-Design Group is where architecture intent becomes silicon reality. We own the boundary between what was designed and what was built, and we are the team that knows the difference. When a program ships at frequency and at quality, this team is a reason why. You will be the person who follows through between simulation and silicon. When the model is wrong, a frequency corner that doesn't hold, a Vmin that walks, a critical path that timing analysis missed, you find out why, and your data is what the rest of the program acts on. Architecture, design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers, work like experimentalists, and reason like data scientists. If that is you, read on. What you'll be doing: Own silicon speed characterization from first power-on through production sign-off, covering frequency, Vmin, Vmax, and timing margins across the full PVT space. Close the correlation gap. Tie pre-silicon timing analysis and critical path predictions to measured silicon, quantify where the model diverges from reality, and produce analysis that architecture and design can act on with confidence. Trace failures to their source, whether a microarchitectural bottleneck, a critical path that doesn't close under voltage, a clocking issue, or a process corner the model didn't anticipate, and drive the resolution. Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing difficulty. Know where AI accelerates real work and whe

NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs You will be responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks What we need to see: Bachelors Degree in EE, CS or CE or equivalent experience 2+ years of relevant experience Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, GDB) Experience crafting test bench environments for unit and system level verification Strong background in System Verilog or similar HVL Expertise with C/C++ programmin

SCG sits at the crossroads of design, architecture, marketing, and productization—owning the journey from the architecture stage through final product definition across Gaming, Datacenter, Automotive, and Embedded markets. As a System Verification CoDesign Engineer, you will work on system-level speed features, develop the verification collaterals and automation infrastructure to characterize and validate them, and lead debug of the complex silicon issues that stand between a program and on-time shipment. This is a hands-on role for an engineer who combines deep technical craft with the drive to compress cycle time using modern tooling—including AI—without losing rigor. What You’ll Be Doing: Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features and deliver industry-defining products. Understand system level behavior and speed reliability margins, bounding box constraints and identify solutions that optimize margins . Translate hardware features and architectural requirements into verification techniques that achieve full coverage across testing flows. Perform closed loop validation by correlat ing silicon behavior against timing simulation and design expectations; provide actionable feedback to improve future designs. Define, prototype, and refine pre- and post-silicon bring-up flows to ensure

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Company: Oak Street Health Title: Medical Scribe (Clinical Informatics Specialist) Location: 103 Country Club Dr, Fayetteville, NC 28301 Role Description: At Oak Street Health, Clinical Informatics Specialists (CIS), or Medical Scribes, serve as vital clinical documentation assistants, supporting our primary care providers. Each Scribe is paired with a single provider, joining them in the exam room, during team huddles, and conducting post-visit summaries to ensure accurate, specific, and timely documentation. Our Scribes receive extensive training to become experts in our value-based care model, ICD-10 and CPT coding, electronic medical records, and population health. Their contributions allow our interdisciplinary team to proactively identify and help close care gaps, provide preventative measures for chronic conditions, and provide great patient experiences. This role is designed for individuals seeking significant clinical exposure, particularly those on a pre-med or healthcare administration track. Because providers and patients rely heavily on this partnership, successful candidates should expect a 1 - 2 year commitment. This oppo

We are seeking an accomplished and highly strategic Group Manager, Ad Trafficking & Operations, with a minimum of 10 years of progressive experience in digital ad operations, including significant leadership and team management responsibilities. The ideal candidate will be a seasoned expert in ad serving technologies, particularly Google Campaign Manager 360 (CM360), and will possess a deep understanding of the digital advertising ecosystem. This role requires exceptional leadership skills to manage and mentor a team of Ad Trafficking Coordinators and Managers, drive operational efficiencies, ensure flawless campaign execution, and contribute to the strategic evolution of our ad operations capabilities. Responsibilities: Strategic Leadership & Department Oversight: Develop and implement strategic roadmaps for the Ad Trafficking and Operations department, aligning with overall company objectives and client needs. Lead and manage a group of Ad Trafficking Coordinators and Managers, fostering a high-performance culture, continuous improvement, and professional development. Oversee the entire ad trafficking workflow, from campaign setup to reporting, ensuring adherence to best practices, quality standards, and service level agreements (SLAs). Evaluate and recommend new ad tech solutions, tools, and processes to enhance operational efficiency, accuracy, and scalability. Operational Excellence & Process Optimization: Drive the standardization and optimization of ad trafficking processes, naming conventions, and quality assurance protocols across the group. Implement robust pre-launch and post-launch QA strategies to minimize errors and ensure impeccable campaign execution and data integrity. Champion the adoption of automation and innovative solutions to streamline workflows and reduce manual effort. Establish and monitor key performance indicators (KPIs) for the team, driving accountability and continuous perfo

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s leading inference accelerator. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people around the globe. Their mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of inference accelerator You will be responsible for verification of the ASIC design, architecture, reference models and micro-architecture using advanced verification methodologies Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verifi

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Our team builds AI-driven software systems for Circuit Design: combining automation algorithms, DL models and agentic workflows to accelerate end-to-end design automation. Come join this integral team in our Circuit Solutions Group! What you'll be doing: Work within a multi-functional team on various projects involving Pre-silicon and Post Silicon custom circuit design and related data, Circuit/Layout Optimization and Spice correlation Research and implement techniques on frontier solutions of electronic design automation. Build and innovate agentic AI solution for VLSI design problem. Responsible for analyzing the problem or datasets, raise and validate hypotheses, design and build models and algorithm until they reach the desired QOR. What we need to see: MS (or equivalent experience) with 3+ years’ experience or PhD with 1+ years’ experience in Electrical/Computer Engineering degree Experience in the following fields is a strict requirement for this role: Combinatorial Optimization, Agentic AI and large language models, Machine Learning for Chip Design & EDA Experience in Algorithms/Data Structures/

Senior Relocation Specialist - US Immigration Company: The Boeing Company Boeing’s Global Mobility Services organization is currently seeking Senior Relocation Specialists to join our International Relocation team in Hazelwood, MO ; Mesa, AZ ; Plano, TX or Seattle, WA . These roles will support our U.S. immigration and global relocation programs, ensuring compliance, operational efficiency, and a superior employee experience. These selected candidates will also manage immigration processes related to employee relocations and assignments while partnering closely with HR, Talent Acquisition, Legal, Payroll, and third-party suppliers to manage immigration and relocation processes end to end. This is a high-impact role that requires speed, clarity, timeliness and accuracy to drive compliance and deliver critical support for immigration and mobility services. The successful candidates will serve as a trusted immigration subject matter expert (SME), navigating an evolving U.S. immigration landscape while designing the systems and policies that enable Boeing to build a global talent pipeline while delivering a seamless employee experience. Position Responsibilities: Serve as SME for U.S. immigration programs while providing guidance on visa, work authorization, and immigration compliance matters Manage immigration and relocation cases from initiation through completion. Manage the end-to-end U.S. immigration lifecycle, from offer and pre-hire assessment through visa processing, extensions, renewals, permanent residency, and other applicable immigration matters, including H-1B, O-1, J-1, TN, E-3, L-1, F-1 OPT/STEM, PERM, and LCAs Partner with Talent Acquisition, Human Resources, hi

Cote Korean Steakhouse, located in the Miami Design District, is the carnivorous vision of proprietor Simon Kim that blends together the dining experience of Korean Barbeque together with the hallmarks of a classic American Steakhouse. Cote serves the highest quality USDA Prime beef accompanied by an impeccable 1200+ label wine list and a suite of classic-but-creative cocktails. We are professionals committed to ensuring exceptional hospitality and service to our customers. At COTE, we follow a simple mantra: 🥩 + 🔥 + 🍸 = 😊 Line Cooks are dynamic hospitality professionals responsible for prepping, cooking, and plating delicious dishes by the culinary team and assisting the Chef de Cuisine (CDC) and Sous Chefs with their daily tasks. Their principal goal is to provide the highest quality meals that meet the CDC’s exact specifications, while maintaining clean and orderly kitchen and BOH areas to the highest health and sanitation standards. Line Cooks work with all members of the Back of House team to ensure a smooth continuation of service and play an essential role in contributing to customer happiness and restaurant growth. Essential Job Duties & Responsibilities: Job duties and responsibilities include, but are not limited to the following: Sets up all assigned stations with appropriate mise en place in advance of service. Station and kitchen is clean, stocked, and ready for action. Attends all assigned pre-shift meetings, and puts out dishes for line check according to company standards. Prepares menu items in cooperation with the kitchen team, at the direction of the chefs. Follows all allergy protocols and modifies dishes at the direction of the chefs. Avoids cross contamination by adhering to preparation standards set by the CDC. Ensures that all dishes are prepared according to both quality and timing standards. Actively restocks ingredients at the workstation and meets prep times for smooth delivery while in service. Label

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath. Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis. Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments. Background in microarchitecture definition, design specification, and performance-driven trade-off analysis. What We Need Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU. Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals. Use innovative techniques to optimize power, performance, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to drive infrastructure for performance analysis, correlation and verification. You’ll work on a CPU based on RISC-V ISA, collaborating with core architects and RTL teams to deliver a highly efficient and performant design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Strong problem solver who can identify complex issues, develop practical solutions, and drive them through implementation. Enjoy building tools and improving the infrastructure, workflows, and methodologies that make CPU development more efficient. Skilled in C++ and Python, with experience using industry-standard compilation, simulation, and emulation tools. Experience with verification infrastructure and methodologies along with knowledge of high-performance CPU architecture and microarchitecture. Proficient in debugging RTL and logic across multiple design hierarchies and pre-silicon environments. What We Need Join a team driving improvements in CPU microarchitecture, verifying performance, and correlating results between RTL and the performance mode

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU focused test generator development and verification strategy, shaping how our out-of-order RISC-V CPUs are validated against complex ISA and microarchitectural behavior. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU design verification, test generation, or closely related CPU validation work. You have led development of test generators for x86, ARM, or RISC-V ISA environments. You understand CPU ISA behavior, privileged architecture, and high-performance out-of-order CPU microarchitecture. You are comfortable building tools, stimulus, and automation that scale verification across large CPU programs. You communicate clearly across design, DV, architecture, emulation, and post-silicon teams. What We Need Lead development of CPU core-level test generators for high-performance out-of-order RISC-V cores. Own generator strategy, infrastructure, and methodology for ISA and microarchitectural verification in both pre-silico