Principal Senior Machine Learning Scientist in United States

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Design Engineer in the NVE Design Engineering Core group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products! What’s Encouraged Daily: Serve as a technical authority in the analog /core functional team for NAND projects, participating in pathfinding activities and solving sophisticated technical problems. Collaborate on a rchitect ing NAND Xpath , Ypath , algorithms, waveforms , d rive alignment of design solutions, methodologies, DTCO and cir

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the Principal Engineer position, you will lead technical verification approaches to strengthen DRAM verification quality, standardization, and traceability throughout project families and pillars. You will invent the next generation of intelligent verification workflows and continuously advance scalable verification systems that align with new products, features, evolving design techniques (including RTL-focused flows), and scalable, family-based product development. This role is ideal for someone who excels in uncertain situations, enjoys forging new paths, and wants to impact verification across the DRAM roadmap. Responsibilities Verification Quality and Methodology Governance Define and drive DRAM verification methodology, quality standards, and AI-enabled strategies to improve coverage, traceability, efficiency, and defect prevention. Lead closed-loop silicon learning by identifying verification gaps, incorporating lessons learned into requirements and standard methodologies, and reducing recurring silicon issues. Own and continuously improve the JAMA requirements framework, ensuring alignment, scalability, and adoption across projects and teams. Simplify and optimize verification workflows through automation, AI, and process improvements that reduce cycle time and accelerate debug. Partner across engineering teams to drive methodology decisions, align collaborators, and scale verification approaches. <h2

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Diffusion Process Development Engineer, you will act as a technical leader accountable for FEOL diffusion, annealing, and gate oxidation process advancement for advanced DRAM devices! This position emphasizes gate dielectric scaling, process reliability, and manufacturing preparedness. The ideal candidate blends extensive expertise in diffusion processes, oxidation principles, and device physics with practical experience transitioning technologies from development to production. You will collaborate closely with groups dedicated to process development, device engineering, equipment, and manufacturing to support future technology nodes. This role requires work with AI for productivity. Key Responsibilities Lead the progress of FEOL diffusion, thermal treatment, and gate oxidation operations in advanced DRAM technology. Develop and scale ultra-thin gate dielectrics, balancing electrical performance, reliability, variability, and manufacturability. Drive process development from concept through integration, pilot qualification, and manufacturing transfer. Evaluate, qualify, and optimize diffusion and oxidation equipment platforms and reactor builds. Define and monitor manufacturing metrics, including statistical process control, process capability, defectivity, and variability. Interpret electrical, physical, and materials characterization data to guide development decisions. Partner with external suppliers to develop hardware and processes aligned with future technology

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we build the memory and storage that powers everything from massive data centers to the devices people carry every day. Our DRAM IP Design team shapes the circuits at the heart of these products, carrying innovative designs from concept all the way to silicon. We work across global design, verification, and product teams, and the work we do here helps define where the semiconductor industry goes next! As a Principal Analog Design Engineer, you'll help shape the next generation of Micron's memory products, bringing circuit designs to life and directly influencing their performance, quality, and reliability. You'll partner with design, verification, and product teams around the world, operating with the independence and technical depth expected of a principal engineer. It's a role where your circuit decisions show up in silicon that ships at scale. Responsibilities: Design, optimize, and verify block-level analog and mixed-signal circuits for DRAM Propose, evaluate, and implement new or improved circuit topologies to enhance block PPAC Work with the internal data science team and EDA vendors to leverage agentic AI and AI-assisted design flows for circuit optimization Expand verification coverage to strengthen robustness and mass-production yield Partner with global design groups, guide layout through post-layout simulation, support silicon-to-simulation correlation, and operate independently to define solutions and methods Minimum Qualifications:

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE &#43; 10 years or BSEE &#43; 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary Department Overview The Fab Engineering team supports semiconductor manufacturing by driving process performance, product quality, and operational efficiency. The team partners closely with equipment, quality, and production organizations to enable stable processes, improve yield, and deliver consistent manufacturing outcomes. Join us and make a change! Position Overview As a Fab Engineer, you will own and sustain semiconductor manufacturing processes within the fab. You will solve process issues, analyze performance data, and implement solutions that improve yield, quality, and cycle time. This role plays a direct part in enabling high-volume manufacturing through structured problem solving and multi-functional execution. Responsibilities Own process performance and drive improvements in yield, quality, and cycle time Troubleshoot manufacturing issues using structured methodologies (e.g., root cause analysis, FMEA, SPC, 8D) Analyze process data to identify trends, gaps, and improvement opportunities Define, monitor, and adjust process parameters across semiconductor manufacturing equipment Partner with cross-functional teams to resolve process excursions and implement corrective actions Support qualification and integration of new equipment, materials, and process changes Drive initiatives focused on yield improvement, cost reduction, and productivity Perform defect analysis and long-term investi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development organization, where breakthrough patterning technologies become manufacturing-ready solutions. Our team is shaping the future of memory by evaluating and enabling next-generation lithography technologies, including EUV and High NA EUV. We work closely with technology development, manufacturing, equipment suppliers, and industry partners to drive innovation and deliver scalable solutions for future memory products. As a Lithography Pathfinding Process Development Engineer, you will help define how advanced patterning technologies support Micron’s long-term roadmap. You will lead pathfinding activities, evaluate emerging lithography solutions, and develop implementation strategies that influence future technology decisions. This role is part of Micron’s Technical Leadership Program (TLP), offering the opportunity to grow as a technical leader, mentor others, and drive industry-changing innovation. Responsibilities: Define and lead pathfinding activities for advanced patterning technologies, including EUV and High NA EUV, and identify roadmap applications where they provide value Develop and optimize EUV lithography modules within Technology Development, partnering with process integration and adjacent process teams to meet manufacturing requirements Collaborate with defect inspection teams and mask suppliers to establish inspection and quality strategies for EUV masks Partner with manufacturing sites to align equipment, materials, a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology, Inc. has advanced the world’s most innovative memory and semiconductor technologies. As an HBM Memory Design Engineer within the HBM Architecture Team, you will design, simulate, and optimize digital and analog DRAM circuits for next‑generation high‑bandwidth memory products. You will evaluate block‑level and full‑chip functionality, solve complex challenges in building, and collaborate with a distributed team to deliver highly reliable, industry‑leading HBM solutions. This role provides the opportunity to contribute to groundbreaking DRAM design, TSV‑based 3D integration, and high‑speed mixed‑signal architectures supporting Machine Learning and AI applications. Responsibilities Design and analyze digital, analog, and mixed‑signal circuits for HBM DRAM products. Perform schematic entry, simulation, and optimization of DRAM blocks including data path, ECC, command control, and clocking circuits. Evaluate full‑chip and block‑level functionality and deliver solutions ensuring functional accuracy. Conduct pathfinding and feasibility studies for next‑generation HBM architectures. Optimize circuit timing, area, power, and complexity across high‑speed DRAM designs. Support design floor planning, layout reviews, and cross‑domain integration of memory, logic, and analog circuits. Collaborate with global engineering teams to drive innovation and support vertical integration across design

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Global Facilities Tool Installation team leads the planning, development, construction, and operation of Micron’s worldwide manufacturing network. This team drives major global programs that integrate engineering innovation, sustainability, and operational excellence to enable advanced semiconductor manufacturing. As a Principal Program Manager, you will play a critical role in guiding global Facilities Tool Installation (TI) programs, partnering with multi-functional and international teams, and ensuring execution aligns with best-known methods and strategic objectives. This position is ideal for a highly experienced professional with a strong facilities and greenfield construction background who thrives in complex, fast-paced environments and excels at collaboration, data-driven decision-making, and continuous improvement. Responsibilities Lead U.S. Facilities Tool Installation efforts for new fab startups and greenfield expansions, including planning and development of Tool Install User Requirement Specifications (TI-URS). Partner with Global Procurement and site teams on TI RFPs, supporting contracting strategies, bid evaluations, cost modeling, and execution timelines. Ensure global project readiness by coordinating material planning, labor strategies, construction interfaces, and risk identification/issues. Develop and maintain installation benchmarks to find opportunities for cycle-time reduction and critical path optimization. Define and implement global TI stra

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We’re driving the next wave of memory innovation at Micron, pushing the boundaries of DRAM and enabling future scaling! Our team works at the intersection of science and manufacturing, turning advanced concepts into high-volume solutions that power a data-driven world. As a Principal/ MTS Wet Process Development Engineer, you will lead critical process innovation and integration for next-generation nodes. This role shapes wet process technology direction, influences roadmap decisions, and delivers scalable, manufacturable solutions that enable high-volume success. Key Responsibilities Technical Leadership and Problem Solving - Lead development, optimization, and troubleshooting of advanced wet process applications from Wet cleans and etches, Vapor-phase processes, Strip processes, Bevel etch, to Copper plating. Perform rigorous root cause analysis and implement robust, fab-ready and HVM-compatible solutions. Apply strong fundamentals in fluid dynamics, reaction kinetics, thermodynamics, transport phenomena. Evaluate interactions between upstream and downstream processes to ensure integration and yield success. Technology Development and Road-mapping - Translate device scaling requirements into actionable wet process technology roadmaps. Identify technical gaps and define solutions to meet critical specifications (CSPEC). Drive innovation in chemistry, process architecture, and tooling to support future technology nodes. Contribute to the development

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What’s Encouraged Daily: AI-First Engineering: Deploy AI tools (LLMs, code/RTL generation, spec parsing, waveform interpretation, layout engines) as default practice. Continuously identify automation opportunities and rearchitect workflows—specs, simulations, reviews, hand-offs—to be AI-consumable. Build prompt libraries, agents, and scripts that eliminate recurring manual patterns! AI Leadership: Champion AI adoption by evaluating emerging tools, running pilots, and publishing standard methodologies that measurably reduce cycle time or prove quality! Technical Ownership: Design and verify major IO/datapath blocks (receivers, serializer, clock distribution, equalizers, ZQ calibration, ONFI training, wave pipelines) to meet performance specs, using AI to accelerate exploration, sizing, and verification. Multi-functional Collaboration: Work with integration, design, and Apps teams to define interfaces and evaluate new specifications. Use AI to summarize discussions, reconcile specs, and quantify trade-offs. Mentorship: Document AI-augmented methodologies and teach engineers to work in an AI-first environment—not just which tools to use, but how to rethink engineering with AI. Minimum Qualifications: BS/MS in Electrical Engineering with 8&#43; years IC design experience Hands-on AI tool usage (LLM assistants, coding copilots, agentic workflows, ML-based EDA) with concrete examples of productivity or design impact Experience redesig

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Heterogeneous Integration Group (HIG) is shaping the future of AI and accelerated computing by developing advanced memory solutions! The team focuses on designing and optimizing High Bandwidth Memory (HBM) products for AI/ML, high-performance computing (HPC), and data-centric systems, collaborating across global engineering and product teams to deliver industry-leading performance, power efficiency, and reliability! As a Principal HBM Design Engineer , you will lead cross-functional efforts to drive silicon debug, product quality, and system-level stability for high-volume HBM products . You will own the resolution of complex silicon and system issues, influence design and architectural decisions, and ensure successful deployment across key customer platforms. You will operate at the intersection of design, silicon, and system behavior , providing technical leadership across the full product lifecycle and driving continuous improvement into future HBM generations. Responsibilities Design Ownership: Work on HBM product design and own design health through sustaining phase, driving ECO implementation, verification, and long-term maintainability. Technical Leadership: Define debug strategies, guide cross-functional teams, and serve as a technical authority in HBM sustaining efforts. Silicon & System Debug: Lead root-cause analysis and resolution of complex silicon, system, and customer issues, driving closure across multiple doma

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role is part of the Customer Engineering Technical Leadership function within HIG PSE. The Customer Integration Engineer will focus on technical engagement across product development, system architecture, develop, front-end and back-end process, Package Failure Analysis, Qualification, and Test. The successful candidate will have expertise in one of these subject areas and a strong appetite to learn others on the job. This position emphasizes hands-on technical problem-solving, working with multi-functional groups, and enabling successful integration of advanced HBM products into customer systems. Responsibilities: Apply deep technical knowledge across one or several domains such as product engineering, system engineering, building, front-end/back-end process, PFA, qualification, or test. Support integration of customer requirements into internal design and manufacturing processes. Participate in technical reviews, debug sessions, and failure analysis activities. Work closely with internal teams across build, product engineering, and manufacturing to resolve technical challenges. Assist in yield improvement and qualification efforts tied to customer programs. Minimum Qualifications: Bachelor’s or Master’s degree or equivalent experience in Electrical Engineering, Mechanical Engineering, Materials Science, or related technical field. Hands-on experience in one or more areas: product development, sys

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron Technology is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. In this role, you will be responsible for the full RTL design lifecycle—from architecture and implementation through signoff—while delivering designs that meet aggressive power, performance, and area (PPA) targets. This position is in Boise, Idaho, offering strong opportunities for technical leadership, innovation, and collaboration across global teams. Responsibilities Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff. Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements. Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals. Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows. Minimum Qualifications Master’s degree in Electrical Engineering with 8&#43; years of experience, or Bachelor’s degree with 10&#43; years of pre-silicon RTL design experience. Proven ownership of complex RTL/IP development from micro-architecture definition through handoff to physical design. Strong experience with ASIC low-power design methodologies, including UPF-based power inten

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary This position supports Micron’s DRAM Tester Solutions group, focusing on physical design implementation for processors, controller architectures, and ASICs. The role is responsible for full‑chip and block‑level physical design closure, low‑power implementation, timing, power, and signal integrity signoff, and successful tape‑out across advanced technology nodes. Responsibilities: Lead block‑level and full‑chip physical design including floorplanning, placement, CTS, routing, and tape‑out. Drive timing closure across multiple modes and corners using industry‑standard STA tools. Perform power integrity, IR/EM, and power grid closure to meet signoff requirements. Develop and optimize APR flows, scripts, and methodologies for PPA improvements. Own subsystem or full-chip closure work while coordinating with cross-functional teams. Minimum Qualifications: Bachelor’s degree or Master’s degree or equivalent experience in Electrical Engineering, Electronics, or Computer Architecture. Minimum of 15 years of hands‑on ASIC physical design implementation experience. Proven experience with multiple production tape‑outs in advanced process nodes. Strong expertise in low‑power design techniques including UPF/CPF and multi‑voltage systems. Proficiency in scripting languages such as Tcl, Perl, or Python for flow automation. Preferred Qualifications: Experience with Synopsys and Cadence physical design and ti