Quality System Specialist in United States

Job Details: Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below. Life at Intel The Role and Impact As a SoC Power Thermal Performance Validation and Optimization Engineer, you will play an essential role in ensuring Intel's products achieve optimal power, thermal, and performance benchmarks at the system-on-chip (SoC) level. In this position, you will develop and execute validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges. Your contribution will directly impact Intel's ability to deliver competitive, high-performing products to market. Business Group This role is part of Intel's Data Center Group (DCG), which focuses on designing innovative solutions to power the next generation of computing platforms for data centers. As a member of the PTP PreSi Correlation Solution team, you will contribute to shaping the development and validation processes for cutting-edge technologies, ensuring Intel meets and exceeds industry standards for performance and efficiency. Key Responsibilities: Develop and execute SoC-level power, thermal, and performance validation and

Job Details: Job Description: The Role and Impact As a Manufacturing Quality and Reliability Engineer, you will play a pivotal role in ensuring the flawless production and reliability of Intel products. You will manage the qualification of manufacturing ramps to high volume, specifying inspection and testing mechanisms, and conducting quality assessments to confirm compliance with industry-leading standards. Through your expertise, you will drive continuous process improvement, proactively address quality challenges, and optimize cost and production scalability, contributing to Intel's commitment to delivering groundbreaking innovation. Business group The Quality Systems Organization within Intel Foundry is dedicated to ensuring the excellence and dependability of Intel's manufacturing operations and processes. This team focuses on developing and implementing robust quality systems, supporting Intel's broader mission to deliver world-class technological solutions to customers. By fostering a culture of proactive improvement, the group plays a critical role in advancing Intel's manufacturing capabilities. Key Responsibilities - Own the qualification of manufacturing ramps to high volume, ensuring products and processes meet quality and reliability standards. - Develop inspection and testing mechanisms and conduct audits to assess compliance with established quality benchmarks. - Lead continuous improvement initiatives to enhance quality systems and foster a culture of proactive quality management. - Manage excursion events, change control processes, and supplier audits while driving supplier performance improvements. - Represent the quality and reliability function in product engineering and development forums, offering recommendations to enhance system, process, and product reliability. - Develop systems for early detection and containment of excursions and con

The Engineering Lead Analyst – SonarQube & Code Quality Engineering is a senior-level engineering role responsible for leading static code analysis, automated code quality governance, security vulnerability remediation, and AI-augmented developer enablement across enterprise software delivery pipelines. In this role, you will champion software reliability, maintainability, clean-coding standards, and automated quality gates. You will partner with development teams, system architects, and platform engineering to integrate and manage enterprise-scale code quality platforms (such as SonarQube) both on-premises and in cloud/SaaS environments. Additionally, you will drive modern engineering practices by embedding Behavior-Driven Development (BDD) within your own software delivery and leveraging Agentic AI workers and Model Context Protocol (MCP) architectures to optimize developer experience, streamline code governance, and boost engineering velocity. Key Responsibilities 1. Code Quality & Static Analysis Platform Ownership Lead the architecture, deployment, administration, and continuous enhancement of enterprise Static Application Security Testing (SAST) and Code Quality platforms (e.g., SonarQube , DeepSource, Codacy, Semgrep). Configure, calibrate, and enforce automated Quality Gates, code rulesets, technical debt calculation models, and code-coverage baselines across multi-language enterprise repositories. Oversee version upgrades, patching, high availability, and operational maintenance for on-premises and SaaS/cloud-hosted code quality infrastructure. 2. CI/CD & Pipeline Integration <li style=

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology—and amazing people. We are seeking a Senior Silicon and System Product Lead to influence, innovate and take our next generation products to the market. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers an unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working and creative individual to lead the products all the way from market analysis to delivering the features on the final product. What you'll be doing: Drive product performance and power targets, trade-off features/configurations and provide innovative solutions to complex silicon and system level problems. Evaluate new market segments and use cases; translate market requirements to engineering problem statements and metrics. Innovate Performance, power, yield and quality optimizations and features for the world’s fastest power-shipping products in the GPU and SoC market segments spanning gaming, automotive, datacenter and DL/AI. Develop methodologies and requirements for multi-functional teams to drive silicon and system product features to production. Incorporate productization feedback to improve the next generation. Lead the team for feature requirements and schedule from architecture to silicon phase of projects. Work alongside system architects, designers, marketing teams, chip and board designers, software/firmware engineers, HW/S

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As a NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Silicon Co-Design Group (SCG) is a wide-ranging, multi-functional, integral team at NVIDIA. We sit at the crossroads of design, architecture, marketing, operations, and productization. Our contributions span from the arch stage and extend to defining final products. We architect innovative solutions for Datacenter, Server, Gaming, Robotics, Automotive, and Embedded markets. We are fast-paced, dynamic, share a sense of humor, and collaborate extensively to push the boundaries of what is possible. We do all of this with an eye on making groundbreaking, impactful market disruptions! We are seeking an experienced Senior Manager to lead Product Co-Design and Verification in areas of Speed, Reliability and Power Compliance. You will oversee speed/timing/reliability system design, Simulation-to-Silicon power/speed verification, features for product compliance and test chip development crating future product roadmaps. The ideal candidate will have deep technical expertise in semiconductor/VLSI design and a background in translating product requirements into design and vice versa. This is a highly visible, multi-functional role to produce outstanding products that ship at SOL and meet the high NVIDIA quality we demand and customers expect. <p

This is where your work makes a difference. At Baxter, we believe every person—regardless of who they are or where they are from—deserves a chance to live a healthy life. It was our founding belief in 1931 and continues to be our guiding principle. We are redefining healthcare delivery to make a greater impact today, tomorrow, and beyond. Our Baxter colleagues are united by our Mission to Save and Sustain Lives. Together, our community is driven by a culture of courage, trust, and collaboration. Every individual is empowered to take ownership and make a meaningful impact. We strive for efficient and effective operations, and we hold each other accountable for delivering exceptional results. Here, you will find more than just a job—you will find purpose and pride. Summary: Leads the Quality Engineering function responsible for independent oversight of the site validation program and governance of the plant data integrity program. Sets strategy, standards, risk tolerance, and performance expectations; ensures effective QA partnership with Engineering, Facilities, Operations, CSV, laboratories, and system owners; and represents the QA oversight of these programs to site leadership and regulatory agencies. The manager ensures accountable owners execute validation and remediation work while Quality Engineering personnel maintain independent review, approval, escalation, and governance. Essential Duties and Responsibilities: Establish and maintain the site strategy, governance model, procedures, and decision rights for independent QA oversight of validation and plant-level data integrity. Lead, develop, and performance-manage the Quality Engineering team; assign oversight based on project ri

Hyliion is committed to creating innovative solutions that enable clean, flexible and affordable electricity production. The Company’s primary focus is to develop distributed power generators that can operate on various fuel sources to future-proof against an ever-changing energy economy. Job Purpose The Advanced Engineer, Power System Controls plays a key role in the design, development, and implementation of control software for Hyliion’s Karno Power Module. This position focuses on systems involving combustion, thermal management, pressure regulation, high-voltage, and power management. The engineer will be responsible for developing and validating control algorithms, tuning system parameters, and analyzing data to ensure performance meets engineering specifications. Additional responsibilities include preparing technical documentation, supporting root cause analysis, and ensuring timely, high-quality software delivery. The role requires cross-functional collaboration and occasional travel to support system testing and troubleshooting. Duties and Responsibilities Design, develop, and implement high-quality control software for Hyliion’s Karno Power Module, which includes combustion, thermal, pressure, high-voltage and power management systems. Define and conduct tests to verify software and tune control parameters to meet key performance indicators. Prepare reports and technical documentation related to system performance, control strategies, and compliance. Process and analyze data to verify software against engineering specifications, support root cause analysis and for optimizing performance. Ensure on time delivery with quality. Assist product team in defining customer requirements and generate corresponding engineering specifications. Qualifications Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions. Qualifications include: Education, Experience and Cert

About the Team The Systems Integration team is responsible for building the infrastructure, tooling, and validation systems that ensure our device software is reliable, testable, and ready to ship. We design and maintain automated test frameworks, hardware-in-the-loop labs, and release pipelines that keep quality signals trustworthy and enable rapid, safe product launches. Our work spans developer tools, automation, systems integration, and cross-team collaboration to ensure every release meets the highest standards. About the Role As a Software Engineer, Quality and Developer Tools , you will build and own the systems that validate our device software—from test frameworks and regression infrastructure to hardware-in-the-loop labs and release gates. You’ll design the tooling and automation that keep quality signals trustworthy, integrate them into CI/CD, and make it easy for engineers and QA vendor technicians to execute reliable, repeatable workflows. We’re looking for engineers with deep experience in software quality, automation, developer tooling, and hardware-software integration who thrive on building scalable, reliable systems for validation and release readiness. This role is based in San Francisco, CA. We use a hybrid work model of four days in the office per week and offer relocation assistance to new employees. In this role, you will: Test infrastructure & frameworks: Design, implement, and maintain a unified test framework for device software across unit, integration, system, and end-to-end testing, with reproducible runs and integrations with GitHub, Linear, and Slack. CI/CD integration & releases: Integrate test suites with Buildkite, enforce promotion criteria for staging and production, auto-file regressions, and publish traceable artifacts and release notes. Hardware-in-the-loop lab design & orchestration: Plan and bring up racks, power and networking systems, and orchestration for device testing; support automated flashing, provisioning

NVIDIA is seeking a strong technology leader to manage our Server Software Technical Program Management (TPM) team. This role is at the cross-section of execution and strategy, leading a team of Senior TPMs who drive the firmware and system software for NVIDIA's next-generation server platforms like DGX, MGX, and HGX. These platforms bring together the full power of NVIDIA GPUs, NVLink, InfiniBand networking, Grace CPUs, and our optimized AI/HPC software stack. This deep technical leadership role focused on the Software Development Processes that brings new server hardware to life. What you'll be doing: Lead a team of TPMs driving the technical software and firmware execution for NVIDIA's NPI (New Product Introduction) and sustaining engineering teams. Drive the end-to-end SDLC for low-level server components, including firmware (BMC, UEFI/BIOS), drivers, and system management software, ensuring alignment with hardware schedules. Collaborate closely with NVIDIA product management and hardware engineering teams to define release plans and program objectives. Build a strong connection and feedback loop between sustaining and NPI engineering teams to improve product quality and development velocity. Lead process improvement initiatives and help propagate SDLC standards across multiple engineering and TPM organizations. You will have the opportunity to interact with diverse technical groups, spanning all organizational levels. What we need to see: Bachelor of Science (or equivalent experience) or Master of Science degree in Computer Science, Electrical Engineering, or related field. 12&#43; overall years of experience developing and leading complex low-level or system software projects. and 7&#43; years of experience in a people management role. Deep understanding of system a

NVIDIA’s Silicon Co-Design Group is the team that gets every GPU, SoC, and CPU silicon program from first power-on to high-volume production. We are hiring a Senior Manager to lead our Test, Manufacturability, Reliability & Quality (TMRQ) organization. This is not a coordination role . Your work decides if a product can be built at scale and trusted in the field. These include production test development (SLT, BLT), control run flow, system reliability stress (HTOL), platform- and board-level manufacturing issue closure, and field diagnostic test development. You lead a team of individual contributors and a first-line manager at the layer where silicon, platform, and software collide with manufacturing reality. Decisions you make show up in yield curves, production ramp , and customer escapes. You are the leader the program turns to when a build is stuck, a control run is fallout-heavy, or a field return points back at silicon . The exceptional hire also uses AI deliberately — with demonstrated workflow impact and the judgment to know where it compresses real work and where it introduces risk. What you will be doing: Keep programs moving. Own the technical execution and velocity of SLT, BLT, Board/Chip/Rack CR, and system reliability stress (HTOL) across every GPU, SoC, and CPU silicon program. Close the hardest multi-functional failures. Resolve Vmin and binning escapes, performance shortfalls, and power anomalies by driving root-cause across design, methodology, DFT, ATE, package, software/firmware, and manufacturing — and own the WARs and productized fixes through to confirmation. Give leadership the clarity to act. Convert raw integration signals — CR fallout, BLT/SLT yield, SHTOL/CHTOL data, RMA trends, customer escalations — into decision-ready options that enable executive leadership to act with confidence on POR, QS/PS gates, a

At Vanta, our mission is to help businesses earn and prove trust. We believe that security should be monitored and verified continuously, and we empower companies to practice better security and prove it with ease. Vanta has a kind and talented team, and while some have prior security experience, many have been successful at Vanta without it. As the Senior Product Manager, Design Systems at Vanta, you'll own the product strategy and roadmap for how every team builds Vanta's interface. Your mission is to build the horizontal tooling that lets product, engineering, and design teams create consistent, high-quality user experiences faster, so they can spend more of their time on their customers. To be successful, you’ll need to have a high level of product taste and be able to set and hold the line for high quality and easy to use products. All while working closely with your engineering and design manager partners. You'll be part of Vanta's Platform organization, which builds the foundational primitives and craft layer the rest of the product is built on. This is the first dedicated Design Systems PM role at Vanta, so you'll help shape the function itself, not just the roadmap. It's a high-autonomy, highly cross-functional role at the center of how Vanta looks, feels, and scales. What you’ll do as a Senior Product Manager, Design Systems at Vanta: Own the vision and roadmap for the frontend, spanning the design system and the front-end platform, and ladder durable platform investments to company initiatives so design and engineering can focus on customers. Evolve our design system from a broad component library into smaller, composable building blocks with consistent APIs, including making components first-class for AI and LLM-driven experiences. Drive accessibility and internationalization programs to their committed milestones, including global-scale localization and meeting accessibility standards. Partner with our AI team to enable the agentic patterns product team

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Product Architecture Group partners across fabs, test, module, and system teams worldwide to deliver high-performance memory products. We work across geographies and functions to solve complex technical challenges, drive product innovation, and enable industry-leading DRAM solutions. Our team values collaboration, continuous learning, and making a measurable impact through engineering excellence. As a New College Graduate DRAM Yield & Quality Engineer, you will play a key role in monitoring and improving the health of Micron’s server DRAM products. Working with experienced engineers and cross-functional teams around the globe, you will analyze product and manufacturing data, investigate technical issues, and contribute to strategies that improve yield, quality, and performance throughout the product lifecycle. This is a highly visible role with direct impact on customer success and product reliability. Responsibilities Analyze silicon parametric, test, and manufacturing data to identify trends, resolve product issues, and support root cause investigations. Contribute to yield and quality improvement initiatives across new product introduction (NPI), qualification, ramp, and high-volume manufacturing. Collaborate with fab, test, module, quality, and operations teams to drive execution of product health objectives. Develop and maintain automation solutions to improve engineering efficiency, data analysis, and reporting. Apply AI, Agentic AI, and Generative AI tools to en

About Us: AI needs a new infrastructure layer. We're building it at Modal. Every era of computing brought new workloads that previous infrastructure couldn't support: mainframes, databases, and the cloud. Each time, the company that rebuilt the layer underneath defined the decade. AI is no different, except it touches everything instead of one slice, and the window to build the layer underneath it is open right now. Our customers include category-defining companies like Lovable , Ramp , Cognition, DoorDash, and Suno. They rely on Modal for instant GPU access, sub-second container starts, and native storage, so it's simple to serve low-latency inference, fine-tune models, and access production-ready sandboxes at scale. We recently raised a $355M Series C at a $4.65B valuation, led by General Catalyst and Redpoint Ventures. We've crossed $300M+ ARR and grown fivefold since September. Our team includes creators of popular open-source projects (e.g., Seaborn , Luig i ), academic researchers, international olympiad medalists, and experienced engineering and product leaders with decades of experience. The Role: We are looking for strong engineers with experience in making ML systems performant at scale. If you are interested in contributing to open-source projects and Modal’s container runtime to push language and diffusion models towards higher throughput and lower latency, we’d love to hear from you! Requirements: 5+ years of experience writing high-quality, high-performance code. Experience working with torch, high-level ML frameworks, and inference engines (vLLM or TensorRT). Familiarity with Nvidia GPU architecture and CUDA. Experience with ML performance engineering (tell us a story about boosting GPU performance — debugging SM occupancy issues, rewriting an algorithm to be compute-bound, eliminating host overhead, etc). Nice-to-have: familiarity with low-level operating system foundations (Linux kernel, file systems, containers, etc).

What you’ll do Be the generalist EE for the scanner system: integration, bring-up, debugging, and making the electrical side of the device reliable and serviceable. Own ultrasound experimentations that feeds the image reconstruction team Design and execute experiment setups for transducer characterization (element sensitivity, bandwidth, cross-talk mapping, beam profile measurements) and ex vivo / phantom clinical testing. Acquire, process, and analyze RF and baseband signals for data quality assessment and benchmarking. Design simple boards and adapters as needed (monitoring, power/safety, interface/conditioning), and take them from prototype through a stable revision. Prototype quickly, then harden what works: wiring/harnessing, grounding, safety interlocks, and reliable integration across subsystems. Own practical test setups and documentation (fixtures, scripts, procedures) that make experiments repeatable and results comparable over time. What we’re looking for Strong hands-on EE background with experience building, debugging, and iterating on real systems in the lab. Solid understanding of signal processing fundamentals — knows what to measure, how to condition and digitize it, and how to evaluate signal quality in the context of an imaging system (SNR, bandwidth, dynamic range, artifacts). Comfortable spanning system integration + occasional design work (schematics/layout reviews or light PCB design) in a fast-moving environment. Ability to work at the boundary between hardware and algorithms: measure reality, communicate constraints, and help close gaps vs simulation. High agency and practicality: able to set up experiments, get trustworthy data, and unblock others on a lean team. Useful experience Analog/mixed-signal, or high-speed data capture experience; strong instincts for instrumentation and noise/debugging. Ultrasound or acoustic sensor handling: hydrophone calibration and field mapping, transducer impedance characterization, element-level sensitivity

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a software engineer to help build the design methodology, software abstractions, and infrastructure that enable a small silicon team to develop complex chips rapidly and with high confidence. You will turn evolving architecture and design needs into reusable tools and workflows that improve iteration speed, quality, and then apply those tools to help construct world-class silicon. You’ll work closely across architecture, design, verification, performance modeling, and systems software. This role is well suited for an engineer who enjoys building high quality software and is motivated by the challenge of improving velocity and quality of the silicon development process. In this role, you will: Develop and scale design methodologies for rapid first-party chip development and apply them to construct complex custom chips Create abstractions that allow hardware structures, configurations, experiments, and results to be represented consistently across tools. Automate high-value engineering workflows and improve their reproducibility, observability, testability, and ease of use. Partner with architects, RTL designers, verification engineers, compiler engineers, and systems software engineers to gather requirements and then implement solutions. Use methodology and tooling to identify design risks early, accelerate iteration, and improve confidence in performance and implementation tradeoffs. Contribute across multiple aspects of software and hardware