Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are at the heart of advanced DRAM node development, driving innovations from concept to high-volume production. Our team partners closely across Technology Development, Design, Quality, and Manufacturing to bring innovative memory technologies to life. If you’re excited about translating breakthrough ideas into real-world impact, you’ll find this work both challenging and rewarding. As a High Volume Manufacturing (HVM) Node Development Product Engineer, you will play a central role in introducing new DRAM nodes into production at the ID1 fab. This role connects development to manufacturing—owning yield ramp, cost efficiency, and quality improvements. You’ll collaborate cross-functionally to solve complex problems, improve product performance, and ensure successful technology transfer at scale. Responsibilities: Lead new node startup, qualification, yield ramp, and production readiness Guide development teams on process integration using deep technical insight Analyze yield data and electrical failures to drive measurable improvements Partner with Design, TD, Quality, and Test teams to resolve yield and performance issues Use statistical tools and lab analysis to identify root causes and optimize processes Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field Familiarity with DRAM architecture, operation, testing, and process integration Understanding of CMOS fundamentals and
Jobs in United States
Solution Engineering in United States
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Explore current solution engineering jobs across United States. Filter by work mode, employment type, experience, department, date posted and distance.
Job Details: Job Description: The Role and Impact We are seeking a Module Engineer to play a pivotal role in advancing Intel's high-volume manufacturing capabilities. In this position, you will oversee critical equipment and processes that enable the production of cutting-edge integrated circuits, driving innovation in device miniaturization and semiconductor excellence. Your expertise will directly impact production efficiency, quality, and yield, ensuring Intel maintains its leadership in the semiconductor industry. Business Group Join Intel Corporation's Engineering team, which is dedicated to enabling the rapid advancements of semiconductor manufacturing technologies. This group supports Intel's broader mission of delivering world-class technology solutions by optimizing manufacturing processes, ensuring high-quality outputs, and transferring technology globally. As part of this team, you will collaborate across regions to shape the future of semiconductor innovation. Key Responsibilities - Operate and optimize high-volume manufacturing equipment and processes to maintain control over critical dimensions and defectivity. - Conduct tests and measurements to evaluate equipment and process performance, recommending and implementing modifications to improve productivity and quality. - Execute maintenance, repair, and upgrades for assigned equipment and modules to ensure consistent operational excellence. - Lead continuous improvement initiatives focused on enhancing safety, productivity, cost efficiency, and yield. - Develop and implement excursion prevention systems to detect and address discrepant materials or activities in equipment and processes. - Facilitate technology transfer to global manufacturing sites through training, audits, and documentation to ensure consistent processing across locations. - Oversee installation, conversion, and qualification of
We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary: As a Senior Software Development Engineer at Aetna, you will play a critical leadership role in the design, development, and continuous enhancement of enterprise-scale Provider Applications. You will drive technical solutions for complex business problems, ensure application stability, and lead cross-functional initiatives as a Project Owner. This role requires a balance of hands-on engineering expertise, technical leadership, and delivery ownership, including overseeing vendor/contractor teams, ensuring alignment with enterprise architecture, and delivering high-impact solutions that improve provider data systems and operational efficiency. Required Qualifications: 5+ years of hands-on application development experience with Python and Google Cloud Platform (GCP) 2+ years of experience leading or contributing to large-scale application development initiatives Preferred Qualifications: Experience working in Agile/SCRUM environments Proven experience in project/program management, including planning, execution tracking, and delivery management Strong organizational, leadership, and planning skills with the ability to manage multiple priorities Experience working with distributed teams and cross-functional stakeholders Prior exposure to
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are transforming how the world uses information to enrich life for all. Within our DRAM organization, we develop next-generation memory technologies in an industry-leading 300mm R&D environment, bringing together expertise across process development, design, modeling, characterization, reliability, and manufacturing. Our team works collaboratively to advance memory scaling while improving performance and manufacturability. As a Process Integration Engineer, you will help enable state-of-the-art DRAM technologies and solve complex integration, device, yield, and circuit challenges. You will work closely with cross-functional engineering teams to optimize process flows, improve yield and margin, and translate technical data into solutions that enable future generations of memory technology. Responsibilities: Lead technology integration activities to enable manufacturability of advanced DRAM technologies Partner with process development, product engineering, design, yield, mask, and probe teams to resolve yield, performance, reliability, and margin challenges Design and implement R&D fab experiments and optimize process flows to meet product and technology requirements Analyze inline, defect, parametric
Senior Systems Engineer (Flight Crew Operations Integrator) Company: The Boeing Company Boeing Defense, Space & Security (BDS) is seeking a Senior Systems Engineer (Level 5) to support the Phantom Works organization in Hazelwood, MO . The successful candidates will develop equipment and escape/crew station system integration concepts and other design methods to provide and coordinate product definition for Integrated Product Teams, various engineering functions, production operations, qualification/flight testing, suppliers and external customers throughout the product lifecycle. Position Responsibilities Applies an interdisciplinary, collaborative approach to lead activities to plan, design, develop and verify complex lifecycle balanced system of systems and system solutions. Leads others to evaluate customer/operational needs to define system performance requirements, integrate technical parameters and assure compatibility of all physical, functional and program interfaces. Leads analyses to optimize total system of systems and/or system architecture. Leads analyses for affordability, safety, reliability, maintainability, testability, human systems integration, survivability, vulnerability, susceptibility, system security, regulatory, certification, product assurance and other specialties quality factors into a preferred configuration to ensure mission success. Leads, develops, maintains and identifies improvements the planning, organization, implementation and monitoring of requirements management processes, tools, risk, issues, opportunity management and technology readiness assessment processes. Travel may be required up to 10% of the time; Domestically and/or interna
About Energy CX: Energy CX is redefining the energy brokerage industry as the fastest-growing player in the US. By bringing cutting-edge technology, advanced analytics, and innovative solutions, we are disrupting a space that has operated in the dark for too long. Why Energy CX? Entrepreneurial and ambitious culture with a great team oriented environment Fastest growing energy broker in the country One of the fastest growing companies in Chicago Recognized by Fortune and Great Places to work US Named on Inc 5000’s list of America’s fastest growing companies Compensation Year 1 Expected Earnings → $115,000 to $200,000. The expected salary range above may vary based on qualifications and experience. Title: Senior Product Manager, Customer Platform About this Job We're looking for a Senior Product Manager to own our customer-facing energy purchasing and tracking platform during a critical high-growth phase. You'll define and drive the vision for turning that platform into an interactive, data-rich experience — think Bloomberg Terminal or Robinhood — that gives clients real-time visibility and control over their energy purchasing decisions. This is a flagship customer-facing bet, and you'll be the senior product voice shaping it end to end. What You'll Do Own the product roadmap and vision for the customer-facing platform, translating energy purchasing and tracking into an interactive, real-time interface Partner with Engineering, Design, and Quantitative Strategy to define data visualizations, live pricing displays, and interactive tools that make complex energy market data intuitive for clients Gather requirements directly from clients, Sales, and Customer Success to identify what drives engagement and decision-making on the platform Write detailed product requirements and specs, and work closely with engineering to ship features that measurably improve client engagement and retention Define and track success metrics (engagement, retention, feature a
C$100K – C$500K/yr
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are BS in Electrical or Computer Engineering (or equivalent experience) with 5+ years in Physical Design CAD methodology at advanced nodes. Proven track record improving PPA and/or runtime on high-performance, low-power taped-out designs. Hands-on with industry-standard EDA tools (e.g., Fusion Compiler) across synthesis, P&R, STA, signoff, and hierarchical flows. Strong Python/Tcl and data skills, with interest or experience in ML frameworks (PyTorch, TensorFlow), and the ability to drive complex projects independent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU core-level testbench development and verification, shaping how our out-of-order RISC-V CPUs behave in silicon. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU verification, CPU testbench development, or closely related digital design. You have deep hands-on experience building and owning CPU core-level testbenches, not just using existing environments. You know high-performance out-of-order CPU microarchitecture in depth. You are comfortable developing testbench infrastructure in CVM methodology, with UVM experience as a strong plus. You work comfortably across RTL, waveforms, logs, regressions, and cross-functional debug with design, DV, emulation, and post-silicon teams. You are comfortable using AI-assisted verification workflows to improve debug, stimulus creation, and coverage analysis, while applying strong engineering judgment to validate results. What We Need Lead hands-on CPU core-level testbench development for hi
$100K – $500K/yr
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy and execution for next-generation RISC-V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon validation. The ideal candidate has verified complex out-of-order, speculative, superscalar CPUs and can define scalable methodology across simulation, formal verification, emulation, FPGA, and silicon bring-up. This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have deep experience verifying high-performance superscalar CPUs, ideally including out-of-order and speculative processors. You have strong knowledge of RISC-V architecture, including ISA compliance, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior. You are highly proficient in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and advanced debug methodologies. You have hands-on experience with CPU refere
C$100K – C$500K/yr
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll lead physical verification closure (DRC, LVS, ERC, etc.), debug issues using standard industry PV tools, and collaborate across RTL, PD, CAD, and packaging teams to achieve successful tapeouts. If you thrive in a fast-paced environment and enjoy solving complex challenges in cutting-edge silicon, we’d love to hear from you. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned engineer with a strong background in CPU/IP/SoC physical verification and tapeout closure. A hands-on problem solver who excels at debugging and driving signoff through complex verification flows. A collaborative team player who works effectively across RTL, PD, CAD, and foundry interfaces. A mentor and technical leader passionate about building efficient, manufacturable silicon. What We Need BS/MS in Electrical/Electronics Engineering (or related) with 7–14 years of hands-on CPU/IP/SoC physical verif
We are looking for a disciplined and dynamic, Lead System Engineer – compute blade and rack Validation to join our growing compute rack validation team. As a diligent leader in Systems Engineering, you will drive multiple aspects of validation throughout the life cycle of the program. In this high visibility position, you will be part of a leading team to innovate and improve system bring-up and enablement abilities, as well as silicon and system validation to deliver the highest quality, industry leading technologies to market. Your technical leadership skills, validation and debug expertise will be necessary towards product development, definition, root cause and resolution. Your agility and collaborative approach will be essential to work within System Validation & other engineering teams (System Architects, SoC and Rack FW etc). The technical leader will be driving keys areas of system validation including leading first silicon & system bring-up (nodes and rack level systems) - rack level systems and blades will be based of ARM server architecture. Candidate will be immersed in challenging system enablement work, system validation (end-to-end) methodology, tests development and execution as well as triage/debug of critical issues to meet critical program milestones at POR quality. The candidate will also be a key contributor to state-of-the-art HW and lab capabilities for Grapchore’s system engineering. The candidate should be able to work in a global environment while maintaining a synergetic culture. Primary Responsibilities: Lead the systemenablement (including first silicon and other FW components) to ensure system capabilities are brought up as per plan of record and system architecture spec. Drive organization wide methodology for Firmware integration and best known configuration (HW/FW/SW) usage model by leading the release of deployment ready solutions. Develop key methodologies, lab HW and system SW capabilit
About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives, spanning AI research specialists, silicon designers, software engineers and systems architects. Job Summary We are looking for an experienced Principal Engineer to join our System Management team and help lead the development of critical interfaces used by internal and external customers to manage system state. You will provide technical leadership within assigned areas of System Management, guide architecture and implementation choices, mentor engineers and translate broader technical direction into effective execution. This is a hands-on engineering role for someone who can lead complex technical work, improve reliability and operational readiness, and collaborate effectively across multiple engineering disciplines. The Team The System Management team sits within the Software Platform group and helps build Graphcore products into large-scale AI solutions for our customers. The team is responsible for developing the interfaces between hardware, AI software and frameworks, as well as providing interfaces for public and private cloud environments. This includes system management capabilities that abstract complex hardware administration and enable reliable deployment and operation at scale. As one of the first teams to work with new hardware and software, we regularly solve complex system-level problems
Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debug compl
Staff -Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debu
About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a Senior Principal Network Engineer to help design, deploy, and optimize next‑generation AI data center networks. AI training and inference workloads require extremely high bandwidth, deterministic low latency, and zero‑packet‑loss networking environments. In this role, you will partner closely with the Network Architecture Lead to design and scale high‑performance computing (HPC) network fabrics supporting GPU clusters. You will work across hardware, networking, and AI application layers to ensure Graphcore’s large‑scale AI infrastructure operates at peak performance. The ideal candidate brings deep experience operating hyperscale or HPC data center networks and has expertise in high‑speed Ethernet fabrics, RDMA technologies, advanced automation, and telemetry systems. The Team The Data Center Network Engineering team designs and operates the high‑performance network fabrics that power Graphcore’s AI compute platforms. The team collaborates closely with hardware engineering, AI researchers, and infrastructure teams to build scalable networking environments optimized for distributed training and infe
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