Ai Knowledge Analyst in India

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will lead our Bangalore-based CPU Core Design Verification team, driving both the technical strategy and the people leadership behind verification of our high-performance, out-of-order RISC-V CPUs. You will manage a team of core-level verification engineers, partner closely with our Santa Clara and Austin sites, and own delivery of core verification from architecture definition through tapeout readiness. This role is hybrid based out of Bangalore, India, with regular collaboration across our globally distributed CPU organization. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 15+ years of CPU/DV experience, including 7+ years leading verification teams, with strong hands-on expertise in high-performance, out-of-order CPU verification. Deep microarchitecture & verification expertise, including ISA, RTL, UVM/CVM, testbench development, regressions, coverage, and complex debug. Strong people and technical leadership, with experience hiring, mentoring, developing engineers, and setting verification strategy and methodology across teams. Highly

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced and motivated System IP RTL Design Lead to drive the definition and implementation of complex datacenter class IP for our next-generation semiconductor products. The ideal candidate possesses a deep understanding of System IP and SoC architecture, IP integration challenges, and is adept at leading a design team to deliver high-quality, scalable IP solutions. This role requires strong hands-on technical leadership, excellent communication skills, and a proven track record in the successful delivery of silicon IP. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned IP / SoC design leader with 20+ yrs of strong expertise in complex SoC architectures, high-speed protocols, and large-scale IP integration. Skilled in RTL design and debug (Verilog/SystemVerilog) with hands-on experience using industry-standard tools for simulation, synthesis, lint, CDC, and power analysis on high-frequency designs. Experienced in driving microarchitecture decisions, authoring design specifications, and performing complex PPA trade-off optimizations. A proactive problem so

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers.You will own CPU core‑level verification, shaping how our out‑of‑order RISC‑V CPUs behave in silicon. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU verification or closely related digital design. You know high‑performance out‑of‑order CPU microarchitecture in depth. You work comfortably with RTL, waveforms, logs, and complex debug scenarios. You communicate clearly across design, DV, emulation, and post‑silicon teams. What We Need Plan and drive functional verification for CPU core features and complex microarchitectural scenarios. Develop UVM, assembly, and C/C++ based stimulus, functional models, and coverage for ISA, RISC-V extensions, and un-core components. Debug simulation and emulation regressions using RTL understanding, waveforms, and logs to identify and resolve issues efficiently. Build and enhance coverage models, testbenches, and debug infrastructure to improve verification quality and coverage closure. Collaborate with design, validation, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building the future of AI compute, and this role will build the talent pipeline that makes it possible. As an Early Talent Recruiter, you will own university and early-career recruiting for your site, shaping which schools we invest in, building relationships with students and faculty, and leading intern, co-op, and new-grad hiring from first outreach through accepted offer. You will not simply run an existing campus calendar. You will decide where to focus, raise the quality of the funnel, and build the recruiting motion that our growing hardware and software teams need. This role is hybrid, based out of Tokyo, Japan, Bangalore, India, or New Taipei City, Taiwan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have owned a full campus recruiting cycle, including school selection, university partnerships, sourcing, screening, interview coordination, offer management, and closing. You use judgment and influence to partner with hiring managers, challenge assumptions when needed, and hold a clear hiring bar without relying on authority. You work from funnel data and can connect measures such as applications, conversions

OUR MISSION At Redwood Software we unleash human potential. We empower our customers with lights-out automation for their mission-critical business processes. Redwood Software is the leader in full stack automation for mission-critical business processes. With the first SaaS-based composable automation platform specifically built for ERP, we believe in the transformative power of automation. Our unparalleled solutions empower organizations to orchestrate, manage and monitor their workflows across any application, service or server – in the cloud or on premise – with confidence and control. CORE VALUES One Team. One Redwood Make Your Own Weather Obsess over Customer Success Work the Problem Be Curious Own the Outcome Respect Each Other YOUR IMPACT Redwood is seeking an experienced and highly motivated Workday Transformation Analyst, with 5-7 years of experience to join our dynamic team. This role will be crucial in driving our Finance Transformation initiatives, with a strong focus on Workday optimization and integrations. The ideal candidate will possess deep technical expertise in Workday and a proven track record of successfully implementing and optimizing Workday solutions in a transformation context. This role will be on-site in our Hyderabad office an expected to work 3:00pm - 12:00am IST (4:30am - 1:30pm CST). We will assess moving to a hybrid requirement after the first 90 days of employment. Manage multiple cross-functional projects in the Finance and Accounting Organization through all phases of the project lifecycle, from planning and implementation to testing and training. Collaborate with functional leaders and project stakeholders to ensure successful project execution. Identify and mitigate operational and technical risks that may impact project success. Ensure data integrity and accuracy within Workday and integrated systems. Support the functionality of various systems with

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The physical design team sits within the wider silicon design team which includes RTL, verification and DFT. Our work also involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create high-quality RTL and building the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g. TSMC). We are looking to hire high-quality silicon physical design engineers to join our team. The successful candidate will support the team with achieving our goals and creating the right engineering solutions. We are a collaborative team and good communication is essential, as is the ability to adapt and learn. For the successful candidate we offer an open, honest and collaborative environment working on leading-edge designs at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to ta ke ownership of their designs and problem solutions. You will be part of a team that looks for improvements to everything we do: our designs, our flows, our methodologies, our infrastructure. Responsibilities and Duties Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, focusing on achieving robust, high-performance and power-efficient designs

Job Summary Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms. The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust memory subsystem functionality, performance and reliability. The successful candidate will take ownership of significant validation activities, contribute to debug and root-cause analysis efforts, and help improve validation methodologies, automation and infrastructure. The Team The Memory Validation team sits within the Validation organisation and is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products. The team supports DDR and HBM validation activities throughout the product lifecycle, from first silicon through production readiness. Engineers work closely with architecture, RTL, firmware, characterization, systems and platform teams to ensure memory technologies meet functionality, performance, reliability and performance objectives. Responsibilities and Duties Execute validation and bring-up activities for DDR and HBM memory subsystems Verify memory bring-up software, firmware and scripts against defined project requirements Debug firmware, hardware and system-level issues and contribute to root-cause analysis activities Analyse system logs, validation data and characterization results to identify failures and performance issues Perform PHY characterization and analog-level analysis during stress testing and validation activities Develop and execute functional, stress, performance and corner-case validation tests Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation Char

Silicon Physical Design Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The physical design team sits within the wider silicon design team which includes RTL, verification and DFT. Our work also involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create high-quality RTL and building the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g. TSMC). We are looking to hire high-quality silicon physical design engineers to join our team. The successful candidate will support the team with achieving our goals and creating the right engineering solutions. We are a collaborative team and good communication is essential, as is the ability to adapt and learn. For the successful candidate we offer an open, honest and collaborative environment working on leading-edge designs at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to ta ke ownership of their designs and problem solutions. You will be part of a team that looks for improvements to everything we do: our designs, our flows, our methodologies, our infrastructure. Responsibilities and Duties Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, fo

Opportunity Overview: This is a hands-on, detail-oriented role embedded within our Clinical Operations and Commercial organizations. The right candidate brings sharp analytical instincts, a bias for action, and the ability to deliver reliable financial support at a pace that keeps up with a fast-moving commercial business. What you’ll do: Review and, where needed, build capacity models for Clinical Operations staff — ensuring headcount aligns with patient volume, operational targets, and cost objectives Update and maintain gross margin workbooks on a monthly basis, incorporating actuals with precision and producing variance commentary that drives decision-making Own headcount management reporting across Clinical Ops and Commercial teams, providing leadership with timely, accurate views of staffing costs vs. plan Analyze the cost impact of process and product improvements, translating operational changes into clear financial outcomes and recommendations Support budget and forecast preparation for both functions — partnering with Operations and Commercial leaders to build credible, data-backed plans Utilize Adaptive Insights (Workday Adaptive Planning) to manage planning cycles, scenario modeling, and financial reporting with efficiency and accuracy Apply AI-powered analytics tools to automate routine tasks, surface insights faster, and continuously elevate the quality of financial outputs This role rewards people who care deeply about the quality and timeliness of their work and who bring a collaborative, ownership-driven mindset to everything they do. Strong attention to detail — gross margin workbooks and capacity models are foundational to how we run the business, and getting them right matters Fast turnaround — leadership relies on timely analysis to make decisions; the expectation is responsive, not reactive Strong partnership instincts — you work closely with Operations and Commercial leaders and must earn their trust through consistent, high-quality support Av

Location This is a hybrid role based out of our Gurugram office; 3 days in the office, 2 days remote. About Us Sauce Labs is the world’s largest full-lifecycle, test automation platform, and the company behind Selenium. Trusted by 80% of the world’s top ten largest financial institutions and over 300,000 enterprise users, Sauce Labs provides the only AI platform capable of turning business intent into autonomous testing and quality assurance. With a proprietary dataset of 8.7 billion test runs, Sauce Labs empowers the Fortune 2000 to bridge the gap between AI-driven code generation and enterprise-grade software quality. Learn more at http://saucelabs.com . Release Assurance at the Speed of AI | Meet the new Sauce Labs The Role We are seeking a proactive and detail-oriented HR Ops Manager to drive operational excellence and manage core employee lifecycle processes in our India office. In this role, you will be responsible for end-to-end Onboarding and Off-boarding, leading the Internal Committee for PoSH compliance, ensuring Indian statutory compliance, and supporting HRBP activities. Responsibilities 1. Onboarding & Offboarding Lifecycle Onboarding: Own the entire new-hire experience from offer acceptance to day 30/60/90 integration - ensuring document verification, background checks (BGV), system access, and orientation. Offboarding: Manage seamless exit processes, including resignation handling, exit interviews, asset clearance coordination, full & final (F&F) settlement coordination, and exit analytics. Continuously refine onboarding and offboarding workflows to improve candidate experience and operational efficiency. 2. PoSH Committee Management & Employee Relations Serve as the primary lead/Presiding Officer/member for the Prevention of Sexual Harassment (PoSH) Internal Committee (IC) . Ensure 100% compliance with the Indian PoSH Act, including organizing mandatory awareness sessions, annual filing, and managing IC meetings. Handle s

Opportunity Overview: We are looking for a Senior Clinical Configuration Analyst to play a key role in the technical configuration of platform requirements for Cohere’s Platform-as-a-Service (PaaS) clients. Reporting into our Senior Manager, PaaS Value Delivery, you will be part of a small, fast-paced team working directly with client-facing team members to understand and deliver key clinical configurations that are integral to helping new and existing clients meet their prior authorization automation goals. Ultimately, the work you do will have a direct impact on the growth of the company and our ability to assist more patients at a time in their healthcare journey when they need help most. What you’ll do: Ensure thorough understanding of client’s technical requirements to facilitate seamless configuration of platform requirements during new client implementations Test configurability of new product functionality, or enhanced existing functionality, built to accommodate custom client requirements Define test scenarios and success criteria for all new and existing client platform configurations Execute on configuration of platform requirements in accordance with project timelines and client expectations Triage and resolve technical issues, during end-to-end testing or post-implementation, in a timely manner to ensure client satisfaction Serve as a technical SME for client-facing analysts during each stage of the customer lifecycle: providing education and answers to questions around configurability of client platform requirements; occasionally interfacing directly with clients to address issues Collaborate with Product, Development, Design, and Engineering to scope, develop, and implement internal configuration management tools that will help scale configuration work Required Qualifications: Must-haves 3-6 years of professional experience in a Configuration Management role; Bachelor’s degree in Computer Science, Systems Engineering, or related field Problem-Solving

About Us: Sauce Labs is the world’s largest full-lifecycle, test automation platform, and the company behind Selenium. Trusted by 80% of the world’s top ten largest financial institutions and over 300,000 enterprise users, Sauce Labs provides the only AI platform capable of turning business intent into autonomous testing and quality assurance. With a proprietary dataset of 8.7 billion test runs, Sauce Labs empowers the Fortune 2000 to bridge the gap between AI-driven code generation and enterprise-grade software quality. Learn more at saucelabs.com . Location: This is a hybrid role based out of our Gurugram office. To balance collaboration and flexibility, we work from the office 3 days a week (Tuesday - Thursday) and from home the remaining days (Monday & Friday). The Role: As a Senior Product Manager at Sauce Labs, you will be responsible for driving the vision, strategy, and execution of key products within our portfolio. This role will be leading developer-tooling for AI-native product portfolio , working closely with teams and customers across multiple regions. You will lead cross-functional teams to deliver best-in-class solutions that meet customer needs and support the company's overall strategy. You’ll be a key decision-maker in shaping product direction from new concepts to aligning pricing packaging, partners approach, and will mentor and guide other product managers. Responsibilities: Product Vision & Strategy: Define and communicate the product vision and long-term strategy to stakeholders and team members. Lead market and competitive analysis to identify opportunities for innovation and growth. Align product strategy with overall business goals, ensuring product efforts drive revenue and customer satisfaction. Be able to lead overall ROI analysis for new product initiatives including pricing and packaging Experience working with partners and 3rd party developer ecosystem Product Roadmap Ownership: Develop and manage the product roadmap, balanci

Opportunity Overview: We’re looking for a Manager, Platform Engineering that can lead and grow a high-performing engineering team focused on Developer Experience, DevOps, SRE, and Quality. You will own the systems and processes that enable teams to build, test, release, and operate software with high velocity and reliability, driving engineering efficiency and operational excellence across the organization. What you’ll do: Lead a fast-paced, autonomous team of engineers focused on platform engineering, developer experience, DevOps, SRE, and quality engineering Own and drive the internal developer platform strategy and roadmap, improving how engineering teams build, test, deploy, and operate services Create transparency into engineering efficiency and system health through meaningful metrics across delivery, reliability, and quality Enable teams to move faster by improving CI CD pipelines, environments, tooling, and overall developer workflows Provide technical leadership across platform, infrastructure, and reliability, helping teams build scalable and resilient systems Ensure strong engineering practices across release processes, testing, quality, reliability, and security Define and enforce release guardrails, validation standards, and rollback mechanisms to improve production safety Improve environment stability and consistency across development, QA, and pre production environments Drive test strategy and automation maturity to improve overall product quality and confidence in releases Define and implement observability, monitoring, and alerting standards across systems Improve incident detection, response, and RCA practices, ensuring learnings translate into platform and system improvements Drive cloud infrastructure best practices across AWS, containers, and infrastructure as code Foster a culture of ownership, reliability, and continuous improvement within the team Provide innovative solutions for attracting, developing, and retaining top engineering talent I

Opportunity Overview: We are seeking a Technical, Hands-on Manager to lead a team in building AI-driven healthcare enterprise applications . In this role, you will combine strong people leadership with deep technical expertise to guide the development of scalable, data-intensive solutions that drive meaningful business impact. As a leader who is still technically involved , you will mentor and manage data scientists and analysts while having the ability to guide the team through evaluating, selecting, and implementing the right models , paired with an understanding of end to end workflow and ensure the delivery of scalable AI solutions . This position requires excellent communication and collaboration skills as you partner closely with internal stakeholders and cross‑functional engineering, product, and clinical teams . In our fast-paced environment, adaptability is key—your ability to reprioritize quickly and lead your team through evolving business needs will ensure maximum impact What you’ll do: Lead, mentor, and develop a high‑performing team of Data Scientists and ML Engineers, ensuring strong execution and continuous skill advancement. Contribute to event‑driven architecture design and implementation, enabling asynchronous processing and large‑scale system integration. Work seamlessly across functions—partnering with Data Scientists on model tuning, experimentation, and prompt design; collaborating with Product and Software Engineering to embed AI/ML into user-facing applications; engaging with DevOps/Platform Engineering on environment setup, CI/CD, monitoring, and reliability; and working with Data Engineering on pipeline design and ingestion strategies. Provide technical leadership in the effective use of AWS services such as Lambda, EC2, EMR, S3, Athena, Batch, Textract, Comprehend, Bedrock. Drive the implementation of project scope definition, effort estimation, and planning in close coordination with cross-functional teams. Conduct code reviews, pr