Salary not disclosed
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Role overview
Job description
Job Summary Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms. The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust memory subsystem functionality, performance and reliability. The successful candidate will take ownership of significant validation activities, contribute to debug and root-cause analysis efforts, and help improve validation methodologies, automation and infrastructure. The Team The Memory Validation team sits within the Validation organisation and is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and plat
…About this listing
- Source: Graphcore's official careers site (via Greenhouse) · last confirmed on the source 2 Nov 2026
- Posted 17 Jun 2026
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What they are looking for
Skills & requirements
Department · Post Silicon Validation
Hiring company
Graphcore
Graphcore has built a new type of processor for machine intelligence to accelerate machine learning and AI applications for a world of intelligent machines
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