Hardware Operations Engineer in Bengaluru

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Join the Exa team and lead the charge in redefining enterprise storage by unifying block, file, and object protocols across hybrid-cloud environments. You will combine deep technical expertise in distributed systems with hands-on people leadership to guide architectural decisions and mentor high-impact engineers. This is a unique opportunity to build new engineering teams from the ground up and drive industry-leading innovation alongside Product and Architecture partners. Your work will directly impact how customers consume, scale, and operate mission-critical storage infrastructure. WHAT YOU'LL DO Drive End-to-End System Architecture: Lead the architectural evolution and end-to-end delivery of high-performance, resilient storage systems from initial design concepts to high-quality shipped products. Optimize for Modern Data Workloads: Design and implement robust algorithms and concurrent platform solutions engineered for modern data pipelines, AI infrastructure, distributed computing, and enterprise analytics. Resolve Complex System Engineering Challenges: Apply deep root-cause analysis and system-level insight to solve multi-threaded, high-concurrency performance and reliability issues across Linux platform internals. Cross-Functional Ownership & Leadership: Collaborate across product management, validation, and support teams to align technical roadmaps, establish architectural standards, and drive ent

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Overview We are looking for a strong software and platform engineer to join our Production Engineering team in Bangalore as an individual contributor in FA ProductionEng APJ. This role will help build and operate internal platforms that improve how we provision, observe, govern, and troubleshoot engineering infrastructure at scale. The fleet management use cases that give teams a single place to understand and operate the test infrastructure. If you enjoy building internal platforms that remove friction, improve visibility, and make engineering teams faster and more effective, this role is for you. Why This Role Is Unique This is not a typical application development role.You will work on internal platforms that directly shape how engineering teams consume and manage shared infrastructure. The role spans platform engineering, workflow automation, observability, API-driven services, and infrastructure lifecycle management. The right candidate will work on systems such as: Self-serviceability workflows and lease-based testbed governance. Developer Platform dashboards and APIs used for triage, visibility, and product trend observation. Testbed and workflow orchestration across fleet management domains. Impact This role is a high-leverage engineering investment. The work will improve how engineering teams provision testbeds, understand failures, operate shared infrastructure, and move faster with less friction. Better

Toradex is a global company strongly focused on engineering & technology. We’re powered by a diverse & uniquely gifted workforce. We pursue the best people to propel our innovative vision of embedded computing and IoT. If you’re interested in being a driving force at an agile technology company, engineering clever computing solutions & helping other companies bring their products to life, we should talk. About the Role We are looking for a technically strong and customer-focused Field Applications Engineer (FAE) to join our team in India. The ideal candidate will act as a key technical interface between customers, sales, and internal engineering teams, supporting customers throughout the complete product development lifecycle—from initial requirements gathering and solution definition through development, validation, and delivery. The role requires a strong combination of embedded hardware and software knowledge, customer-facing skills, problem-solving ability, and business awareness. The successful candidate will work closely with customers to understand their technical challenges, recommend suitable solutions, and help drive successful adoption of our products and technologies in the Indian market. Key Responsibilities Take technical ownership of customer-driven projects, supporting the complete development lifecycle from requirements gathering and solution definition through development, validation, and delivery. Act as the primary technical interface between customers, sales teams, and internal engineering/development teams to ensure successful project execution. Work closely with customers in India to provide hardware and software design support, technical guidance, and application-level assistance based on their specific requirements. Understand customer applications and system requirements and recommend appropriate products, technologies, and system architectures. Support customers during product evaluation, prototyping, development, testing, and

We are seeking a Front-End Integration Engineer for the NIC Silicon group. Join our team at NVIDIA's Networking business unit and be part of the innovative build and implementation of the next generation Network Adapter Silicon chips. Contribute to the development of powerful communication devices. What You'll Be Doing: Own and maintain Continuous Integration pipelines. Monitor, complete, and fix daily and nightly CI flows in front-end build areas. These include Lint, Synthesis, Equivalence Checking and Simulation. Automate EDA Flows: Build, develop, and maintain robust automation scripts using Python, Tcl scripting, and Shell to integrate EDA tools (Synopsys, Cadence) into automated build pipelines. Manage Perforce Integration: Maintain multi-IP branch/stream strategies, manage workspace specs, complete hardware build drops, and handle release labels/tags in Perforce (Helix Core). Support Engineering Teams: Act as the primary point of contact for RTL and verification engineers to debug flow crashes, bottlenecks, environment setups, and CI failure reports. Enforce Quality Gates: Implement automated check-in and change list triggers to run sanity checks, linting, and style enforcement before code is committed to main streams. Optimize Infrastructure: Monitor compute farm resources (LSF) and storage usage to reduce pipeline runtime and improve overall execution efficiency. What We Need to See: Experience: 2+ years of hands-on industry experience in ASIC/SoC front-end integration, CAD, or EDA flow automation. Education: Bachelor’s degree or Master’s degree or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Perforce Expertise: Strong hands-on experience managing Perforce (P4 / Helix Core) streams, workspace specs, c

Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk. Description We are seeking a ServiceNow ITAM Developer to join our ServiceNow Platform Team. This role is a key driver in our mission to manage the full lifecycle, compliance, and financial impact of our global technology footprint. You will serve as the technical SME for Software Asset Management (SAM) and Hardware Asset Management (HAM), ensuring our platform delivers an accurate, real-time view of asset visibility and cloud consumption. This is a highly collaborative and integrated role. You will work closely with our SAM Managers to translate complex asset management business processes into technical solutions that identify and capture cost-saving opportunities. You will manage a sophisticated ecosystem that connects financial data from Workday and NetSuite, procurement data from Coupa, and endpoint data from JAMF and Intune. Your expertise will bridge the gap between technical data modeling and strategic business outcomes. Responsibilities Lead technical delivery for ServiceNow SAM and HAM, focusing on the Content Library, Normalization engines, and Reconciliation processes. Partner with business stakeholders to analyze asset management business processes and implement automated workflows that drive license reclamation and cost-avoidance strategies. Oversee and troubleshoot complex integrations with core systems, including Coupa, Okta, JAMF, and Intune, ensuring data flow is consistent and accurate. Build, configure, and maintain integrations with SaaS

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Job Summary Reporting to the Memory Validation leadership team, the Senior Silicon DDR/HBM Validation Engineer will be responsible for the bring-up, validation, characterization and debug of advanced memory subsystems used in next-generation AI compute platforms. The role will focus on DDR and HBM technologies, working closely with silicon design, firmware, characterization, platform and systems teams to ensure robust memory subsystem functionality, performance and reliability. The successful candidate will take ownership of significant validation activities, contribute to debug and root-cause analysis efforts, and help improve validation methodologies, automation and infrastructure. The Team The Memory Validation team sits within the Validation organisation and is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products. The team supports DDR and HBM validation activities throughout the product lifecycle, from first silicon through production readiness. Engineers work closely with architecture, RTL, firmware, characterization, systems and platform teams to ensure memory technologies meet functionality, performance, reliability and performance objectives. Responsibilities and Duties Execute validation and bring-up activities for DDR and HBM memory subsystems Verify memory bring-up software, firmware and scripts against defined project requirements Debug firmware, hardware and system-level issues and contribute to root-cause analysis activities Analyse system logs, validation data and characterization results to identify failures and performance issues Perform PHY characterization and analog-level analysis during stress testing and validation activities Develop and execute functional, stress, performance and corner-case validation tests Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation Char

Job Details: Job Description: We are seeking an experienced Analog Design and Infrastructure DA Manager to lead the development, deployment, and governance of analog/mixed-signal design environments and CAD infrastructure. This role owns EDA tool ecosystems, PDK integration, compute infrastructure, design data governance, and tapeout manifest management to ensure high productivity, reproducibility, and audit readiness across silicon programs..The ideal candidate combines deep analog/mixed-signal design flow and e-test structure development expertise with strong infrastructure leadership and disciplined configuration/data management practices. Key Responsibilities-1. Analog Design Environment and Flow Management-Own and maintain analog and mixed-signal design flows using platforms such as Virtuoso ,Develop and maintain schematic, layout, verification, and extraction flows (LVS, DRC).Support simulation environments including HSPICE, Corner analysis.Drive automation and methodology improvements to reduce turnaround time and increase design robustness. 2. Infrastructure and Compute Management Oversee Linux-based DA infrastructure including compute farms, storage systems, and license servers (FlexLM). Manage LSF/grid environments and job scheduling systems. Ensure scalability, system monitoring, high availability, and performance optimization. Partner with IT on hardware lifecycle planning, cloud integration, and disaster recovery. Maintain secure, access-controlled design environments aligned with IP protection policies. 3. Design Data, Manifest and Configuration Management Design Data Governance Manage large-scale analog design libraries, hierarchical database structures, and technology libraries. Define backup, archival, and retention policies for tapeout-critical data. Implement data integrity validation and corruption prevention controls. Oversee distributed stor

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! As a Formal Verification Engineer at NVIDIA, you will be responsible for formally verifying complex designs. NVIDIA has developed a strong functional formal verification methodology that not only enables hardware design and verification engineers to use lightweight FV tools and techniques successfully but also allows FV engineers to use advanced property proving techniques on complex and/or critical RTL logic. The job involves very close interaction with the design team, architecture team, with other validation teams, and with NVIDIA's internal FV R&D group that develops functional verification tools using formal verification technology. What you'll be doing: You will help decide on the best applications of formal verification techniques to various parts of the design. Review functional and micro-architectural specifications, define the scope for formal verification, and create high-quality formal verification testplans to sign-off on the corresponding design implementation. Build formal verification testbenches, code assertions and constraints, and apply abstra