Solution Engineering in Bengaluru

MongoDB is always developing and innovating — not only in our technology, but also in our sales go-to-market strategy. Our sales leadership is committed to building the best salesforce in technology. This means, inspiring and enabling success for everyone on the team. We not only equip you to be successful and close deals, but we want your feedback and input on how we can continue to “ Think Big and Go Far .” As a crucial part of the Sales team at MongoDB, you will have access to a lucrative market and learn how to sell from some of the most successful sales leaders in the software industry. We are looking to speak to candidates who are based in Gurugram for our hybrid working model. What you’ll be doing Sales strategy and execution: Develop and implement strategic sales plan to achieve revenue goals in the Public Sector with strong focus in State Government Relationship management: Build and maintain strong, long-term relationships with key Government Stakeholders - Senior Government Officials, Consultants, GSIs and Partners Business development: Identify new opportunities, generate leads, and pursue new government clients while also expanding business with existing ones Tender and proposal management: Work closely with Government Departments to make sure MongoDB is part of Tech Stack in tenders. Also to Monitor and respond to government tenders, RFPs, and RFQs, coordinating with internal teams to ensure timely and accurate proposal submissions Sales cycle management: Lead the sales process from lead generation and qualification through to contract negotiation and closure Performance and reporting: Set sales targets, monitor sales performance metrics, analyse market trends, and provide regular reports on activities and forecasts to senior management Internal collaboration: Work with internal teams, such as solution architects and delivery teams, to ensure seamless execution from contract award to delivery Internal Development: Participate in our sales enablement tr

Android Framework Engineer Description - Job Summary • This role is responsible for designing, developing, testing, and maintaining software applications that cater to specific user needs or business requirements. The role plans, executes, and monitors software development projects, ensuring they are delivered on time, within budget, and according to quality standards. The role identifies potential risks and challenges in software projects and implement strategies to mitigate these risks for successful project outcomes. Responsibilities • Oversees the software application development projects and team of junior developers. • Allocates resources to complete programming projects, and designing detailed plans to ensure applications are functioning properly. • Provides technical support for the development and implementation of applications dealing with complex high-performance computing systems. • Defines and documents product requirements, user stories, and epics and works closely with the agile team to execute on the product backlog. • Leads multiple project teams of other software applications engineers and internal and outsourced development partners responsible for all stages of design and development for complex products and platforms, including solution design, analysis, coding, testing, and integration. • Manages and expands relationships with internal and outsourced development partners on software applications design and development. • Reviews and evaluates designs and project activities for compliance with applications design and development guidelines and standards; provides tangible feedback to improve product quality and mitigate failure risk. • Provides domain-specific expertise and overall software applications leadership and perspective to cross-organization projects, programs, and activities. • Drives inno

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Senior Solutions Architect on GitLab's India team, you'll be a trusted advisor to prospects, customers, and partners across India. You'll help them understand how GitLab's AI-powered DevSecOps platform addresses technical requirements and business goals across the software development lifecycle. This role supports Commercial and Enterprise segments in India's Southern Region. Experience with Global Capability Centers (GCCs), Digital Native organizations, and startups is highly valued given the accounts you'll support. You'll partner closely with Account Executives and cross-functional teams to own te

About the Role Sigmoid is looking to onboard a Senior Leader to anchor our CPG Supply Chain Analytics practice in Bengaluru. In this role, you will drive strategic initiatives, foster innovation, and provide visionary leadership to our Supply Chain Analytics practice. Roles and Responsibilities Leading and overseeing our Supply Chain Analytics Practice development, setting strategic direction and driving business growth. Develop and execute a comprehensive strategy to expand our presence in the industry practice, identifying market opportunities and driving revenue growth. Collaborate with sales, marketing, and business development teams to develop go-to-market strategies, identify key clients, and drive new business opportunities. Facilitate the development of advanced analytics (AI/ML) and data modeling to optimize decisions. Knowledge Management: Author or contribute to articles and Intellectual Capital that advance the quality of client service and oversee practice-level knowledge management activities to lead and propagate a knowledge management culture within management consulting services. Partner with clients to understand their business challenges and opportunities, providing strategic guidance and innovative solutions. Drive thought leadership initiatives, representing our company at industry events, conferences, and forums. Qualifications Bachelor’s Degree (BE/BTech - CS) from Tier I/II universities like IITs/NITs and MBA from top-tier B-schools (IIM) preferred. 8-12 years of experience in consulting and implementing Data & Analytic solutions for large CPG customers. Direct front-office consulting experience with strategic customer leadership is a must. Strong leadership and management skills, with the ability to inspire and motivate teams to achieve excellence. Excellent communication and interpersonal skills, with the ability to build and maintain relationships with clients and stakeholders. Strategic mindset, with the ability to think critic

For over 20 years, Smartsheet has empowered teams to manage work seamlessly and scale solutions smarter. Now, in our most ambitious chapter yet, we are uniting human teams with AI agents. By orchestrating the work agents do best, automating manual tasks and uncovering insights at scale, we create the space for people to focus on what truly matters: judgment, creativity, and big thinking. That is magic at work, and it’s what we show up for every day. Job Description/ Responsibilities: Designing, developing and maintaining stable and reliable AI/ML Ops platforms / pipelines Minimum experience of 4-6 Years required in AI ML Ops Model Deployment: Package and deploy AI/ML services to production, ensuring they are reproducible and interpretable CI/CD Pipeline Development: Design and implement automated CI/CD (Continuous Integration/Continuous Deployment) pipelines to accelerate model deployment using tools Infrastructure Management: Provision and optimize infrastructure for training and serving, utilizing Docker, Kubernetes, or serverless platforms Monitoring & Observability : Implement post-deployment monitoring for model performance, data drift, and latency using tools. Experience in Monte Carlo is preferable Automation: Automate retraining and data pipeline workflows to ensure models stay accurate over time. Manage the deployment of foundation models, fine-tuning workflows, and Retrieval-Augmented Generation (RAG) stacks (Vector DBs, Knowledge Graph. Experience with AWS Bedrock is preferable Resource Optimization: Manage GPU/CPU utilization to minimize cloud costs while maintaining low-latency inference for users Collaboration: Work closely with data scientists, data engineers, and software engineers to bridge the gap between model development and production. Version Control & Governance: Manage versioning for data, code, and models using tools like MLflow. Security & Compliance: Implementing data security measures, ensuring compliance with data governance

Responsibilities of L&D role Design and develop learning solutions and programs applying adult learning principles and systematic instructional design Employ project management skills and tools to manage multiple projects from analysis through delivery concurrently Conduct needs analysis to identify key tasks/skills to target in the curriculum and perform post implementation evaluation on key performance and business metrics Ability to facilitate high quality learner focused programs, which have informative content and engaging learning techniques. Collaborate effectively across the L&D team to roll-out scalable training solutions around functional and managerial capability building Be responsible for effectiveness, business impact and employee experience of learning programs @ Myntra Manage formal and information communications for L&D team interventions to drive awareness, adoption and attendance Evaluate effectiveness of Training interventions through appropriate frameworks and metrics

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly skilled and motivated Senior Design Verification Engineer to join our team. In this role, you will be responsible for the end-to-end verification of our IOMMU (Input/Output Memory Management Unit) IP. You will play a critical role in ensuring the functional correctness and performance of the design, taking ownership of the verification process right from the initial specification understanding down to final coverage closure. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have hands-on experience in ASIC or SoC verification using SystemVerilog and UVM. You enjoy debugging complex design and verification issues and working closely with cross-functional teams. You’re comfortable building verification environments from scratch and driving coverage closure. You have familiarity with standard bus protocols and modern verification tools. What We Need Experience owning block or subsystem-level verification from test planning to sign-off. Strong understanding of constrained-random verification, coverage analysis, and regression debugging. Familiarity with proto

Account Manager Government Description - Job Summary • This role is responsible for developing and maintaining strategic relationships with partners while tailoring solutions to meet specific customer needs. The role provides partners with complex information about the organization’s offerings while collaborating with them to ensure long-term business success. The role drives sales growth through account planning and risk assessment, while mentoring junior team members. Responsibilities • Acts as the expert to the partner for complex information regarding the organization’s products, services, promotions, and configurations. • Develops and maintains account plans to promote sales growth in adherence to legal procedures and requirements. • Builds strategic relationships with the partner to ensure long-term business opportunities for the organization. • Partners and transforms potential leads into joint sales activities; creates, fills, and manages the funnel for deals with partners while achieving and/or exceeding quotas. • Promotes and incorporates the organization’s offerings to become a key part of the partner’s business and solutions. • Collaborates with partners to tailor solutions that address specific customer needs, including customization of products and services to align with client requirements. • Engages in transactional and relationship selling while working with and influencing a team of sales professionals. • Recruits new partners while providing risk assessment and business rationale for the organization’s investments. • Provides strategic guidance and insights to partner business managers and end-user sales teams regarding partners' capabilities, strengths, and market positioning. • Mentors junior team members, sharing insights, and providing guidance to support their professional growth and deve

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ASIC IP STA Engineer (6-10 Years) | DDR PHY / ONFI PHY / IO Expander Location: Bengaluru, India Experience: 6-10 Years Enducational Qualification : BE/B-Tech/M-Tech (EEE, ECE, Micron Electronics, VLSI) Key Requirements Member of the AMS IP Physical Design team , responsible for post-layout STA signoff and timing closure of high-speed interface IPs, with close collaboration across IP Design, SoC Synthesis, and SoC Physical Design teams throughout IP development and SoC integration. 6-10 years of experience in Static Timing Analysis (STA) with a proven track record of 4 &#43; successful tapeouts . Strong hands-on expertise with Cadence Tempus (preferred). In-depth experience in MMMC timing analysis and closure across functional, scan, MBIST, and other DFT modes. Experience working on high-speed Memory Interface IPs such as DDR PHY, ONFI PHY, IO Expander (IOE) , or similar high-performance interface designs. Strong understanding of timing constraints development, validation, and debug , including clocks, generated clocks, timing exceptions, and mode-specific constraints. Experience in Liberty (.lib) and ETM timing model generation, validation, correlation, and quality assessment . <span

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What Makes This Opportunity Unique At Micron, we're not just offering a job; we're presenting a chance to be part of a team that develops the future of memory and storage solutions. As a Staff Engineer, ASIC STA in our Bengaluru office, you will have the opportunity to work with powerful technology and contribute to highly innovative projects. Your work will help us deliver flawless results and uphold our world-class standards! Job Responsibilities Proficient at Synthesis, Static Timing Analysis (STA), and Logic Equivalence Checking (LEC) Ability to understand and integrate new mixed signal complex IPs Expertise in developing constraints and timing models Manage synthesis to timing closure, ensuring all checks for silicon success Experience with hierarchical designs involving high-frequency clocks Proficient with scripting, automation, and EDA tools Proficiency with AI and AI-enabled workflows Solid understanding of low power builds involving multiple power domains Identify and meet requirements for critical paths of multi-GHz builds Collaborate effectively in multi-functional and globally dispersed teams Requirements M.S./M.Tech, BS/BE in Electronics or related field Minimum of 6&#43; years of relevant experience Proven ability to successfully implement complex builds Ambitious and determined to compete at a global level <

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Senior Accounts Payable Analyst to drive accurate, efficient AP operations and solve complex finance challenges. You’ll own AP quality, reconciliations, payments, and month-end activities while partnering across Finance and Procurement. Help us build smarter, scalable AP processes through automation, ERP, and AI-enabled workflows. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 4+ years of Accounts Payable experience, ideally in a shared services/GCC environment, with strong exposure to PO/non-PO invoices, vendor reconciliations, AP aging and payment support. B.Com/BBA/BBM Finance or equivalent; M.Com, MBA Finance, CA Inter or CMA Inter is a plus. Strong attention to detail, ownership, communication skills and a solid understanding of AP controls, GST/TDS, payment terms and audit requirements. What We Need Own day-to-day AP quality control, review invoices and coding, resolve complex exceptions, blocked invoices, PO mismatches and vendor account discrepancies. Support payment proposals, AP aging, vendor reconciliations and month-end close while maintaining strong maker-ch

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will lead our Bangalore-based CPU Core Design Verification team, driving both the technical strategy and the people leadership behind verification of our high-performance, out-of-order RISC-V CPUs. You will manage a team of core-level verification engineers, partner closely with our Santa Clara and Austin sites, and own delivery of core verification from architecture definition through tapeout readiness. This role is hybrid based out of Bangalore, India, with regular collaboration across our globally distributed CPU organization. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 15+ years of CPU/DV experience, including 7+ years leading verification teams, with strong hands-on expertise in high-performance, out-of-order CPU verification. Deep microarchitecture & verification expertise, including ISA, RTL, UVM/CVM, testbench development, regressions, coverage, and complex debug. Strong people and technical leadership, with experience hiring, mentoring, developing engineers, and setting verification strategy and methodology across teams. Highly

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced and motivated System IP RTL Design Lead to drive the definition and implementation of complex datacenter class IP for our next-generation semiconductor products. The ideal candidate possesses a deep understanding of System IP and SoC architecture, IP integration challenges, and is adept at leading a design team to deliver high-quality, scalable IP solutions. This role requires strong hands-on technical leadership, excellent communication skills, and a proven track record in the successful delivery of silicon IP. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned IP / SoC design leader with 20+ yrs of strong expertise in complex SoC architectures, high-speed protocols, and large-scale IP integration. Skilled in RTL design and debug (Verilog/SystemVerilog) with hands-on experience using industry-standard tools for simulation, synthesis, lint, CDC, and power analysis on high-frequency designs. Experienced in driving microarchitecture decisions, authoring design specifications, and performing complex PPA trade-off optimizations. A proactive problem so

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers.You will own CPU core‑level verification, shaping how our out‑of‑order RISC‑V CPUs behave in silicon. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU verification or closely related digital design. You know high‑performance out‑of‑order CPU microarchitecture in depth. You work comfortably with RTL, waveforms, logs, and complex debug scenarios. You communicate clearly across design, DV, emulation, and post‑silicon teams. What We Need Plan and drive functional verification for CPU core features and complex microarchitectural scenarios. Develop UVM, assembly, and C/C++ based stimulus, functional models, and coverage for ISA, RISC-V extensions, and un-core components. Debug simulation and emulation regressions using RTL understanding, waveforms, and logs to identify and resolve issues efficiently. Build and enhance coverage models, testbenches, and debug infrastructure to improve verification quality and coverage closure. Collaborate with design, validation, and