DFT Engineer

Job Description: · Minimum of ten years of hands-on Test Development experience (DFT, EDA tools, etc..) · Solid knowledge & experience in defining test solutions for multi-million gate SOC (Scan & MBIST) with Mixed Signal IPs (PLL, High Speed SERDES, DDR) · Knowledgeable in full SOC design and manufacturing cycle with specialized/direct experience in multiple areas; RTL/Custom Logic design, Synthesis, P&R, STA, Integration, Verification, Characterization and ATE test · Strong understanding of relationships between Hardware, Firmware and Software in FPGA and/or multi-processors SOC. Past experience in leading the team to successful silicon bring-up and problem solving in a complex system · Strong planning, project, and people management skills required. Must have experience developing managers and individual contributors · Experienced hands-on technical manager not afraid to dig into details to provide technical direction • Proven track record of delivering results and meeting quality, cost, and time-to-market objectives · Ability to collaborate with overseas colleagues to define strategy, plan, and execute across the larger, global organization · Stakeholder influencing and people skills must be excellent. · Needs to be able to set aggressive goals and manage risks effectively · Must have a thorough understanding of tool development methodology. · Ability to manage software development tasks associated with specifying, developing, scheduling, and debugging according to current and future tool requirements. · MS or Ph.D. Engineering degree (EE or equivalent) with 3-10 years semiconductor industry experience.