STAFF ENGINEER, ASIC VALIDATION

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Key Responsibilities: Lead first‑silicon bring‑up, board validation, and early silicon debug. Develop and complete detailed electrical characterization plans covering DC, AC, parametric, and functional measurements. Characterize high‑speed interfaces such as DDR/LPDDR, SerDes, MIPI, UFS, or custom Micron PHYs. Perform post‑silicon electrical characterization of ASIC/SoC/Memory products across process, voltage, and temperature (PVT) corners. Conduct lab measurements using equipment such as Oscilloscopes, BERTs, VNAs, Spectrum analyzers, Waveform generators, and support tools. Involve in Board design activities with team to gather and place custom requirements as per Chaz. Perform signal integrity (SI), power integrity (PI), Jitter, Eye‑diagram, and compliance testing. Debug silicon issues related to timing, noise, stability, margin loss, and functional failures. Analyze failures and recommend design, firmware, or test fixes. Develop Python/MATLAB-based automation for measurements, data collection, and analysis. Process large volumes of lab and silicon data to extract trends, margins, and correlations. Generate concise characterization reports with clear conclusions and recommendations. Work closely with design, pre‑silicon verification, product engineering, firmware, test, and systems teams. Correlate post‑silicon results with simulation and pre‑silicon expectations to identify root cau

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ASIC IP STA Engineer (6-10 Years) | DDR PHY / ONFI PHY / IO Expander Location: Bengaluru, India Experience: 6-10 Years Enducational Qualification : BE/B-Tech/M-Tech (EEE, ECE, Micron Electronics, VLSI) Key Requirements Member of the AMS IP Physical Design team , responsible for post-layout STA signoff and timing closure of high-speed interface IPs, with close collaboration across IP Design, SoC Synthesis, and SoC Physical Design teams throughout IP development and SoC integration. 6-10 years of experience in Static Timing Analysis (STA) with a proven track record of 4 &#43; successful tapeouts . Strong hands-on expertise with Cadence Tempus (preferred). In-depth experience in MMMC timing analysis and closure across functional, scan, MBIST, and other DFT modes. Experience working on high-speed Memory Interface IPs such as DDR PHY, ONFI PHY, IO Expander (IOE) , or similar high-performance interface designs. Strong understanding of timing constraints development, validation, and debug , including clocks, generated clocks, timing exceptions, and mode-specific constraints. Experience in Liberty (.lib) and ETM timing model generation, validation, correlation, and quality assessment . <span

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities GenAI System Development: Design, build, and improve GenAI-powered and agentic systems supporting ASIC semiconductor engineering workflows such as code generation, data extraction, analytics, documentation automation, failure triage, root cause analysis, and technical knowledge retrieval. LLM Workflow Engineering: Build, evaluate, and optimize LLM-based workflows, including prompting, developing skills, retrieval-augmented generation (RAG and Graph-RAG), benchmarking, and quality evaluation. Machine Learning Production: Develop and implement machine learning and deep learning models for classification, regression, anomaly detection, failure analysis, and engineering decision support. Cross-Functional Collaboration: Partner with domain experts and cross-functional teams to translate complex engineering problems into scalable AI/ML and analytics solutions. Production Deployment: Support deployment, monitoring, and operationalization of AI/ML solutions in cloud and enterprise environments. Technical Communication: Communicate technical findings, recommendations, and model outcomes clearly to both technical and non-technical stakeholders. Innovation Leadership: Identify and drive high-impact o

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What Makes This Opportunity Unique At Micron, we're not just offering a job; we're presenting a chance to be part of a team that develops the future of memory and storage solutions. As a Staff Engineer, ASIC STA in our Bengaluru office, you will have the opportunity to work with powerful technology and contribute to highly innovative projects. Your work will help us deliver flawless results and uphold our world-class standards! Job Responsibilities Proficient at Synthesis, Static Timing Analysis (STA), and Logic Equivalence Checking (LEC) Ability to understand and integrate new mixed signal complex IPs Expertise in developing constraints and timing models Manage synthesis to timing closure, ensuring all checks for silicon success Experience with hierarchical designs involving high-frequency clocks Proficient with scripting, automation, and EDA tools Proficiency with AI and AI-enabled workflows Solid understanding of low power builds involving multiple power domains Identify and meet requirements for critical paths of multi-GHz builds Collaborate effectively in multi-functional and globally dispersed teams Requirements M.S./M.Tech, BS/BE in Electronics or related field Minimum of 6&#43; years of relevant experience Proven ability to successfully implement complex builds Ambitious and determined to compete at a global level <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job responsibilities: · Create SoC Verification plan and develop C/SV/UVM based SoC verification tests · Develop understanding on SoC Architecture and Test controller Architecture · Develop SV / UVM based testcases for Test controller verification, MBIST verification and Functional vectors generation · Develop SV/UVM monitors to measure performance and improve Verification Environment · Interact with Architecture/Design/Tester teams to identify ASIC test vectors and functional patterns requirement · Develop flows to automate verification environment development and drive team · Involve in Vectors Bring-up activity and support ATE/Tester teams for Functional Characterization Job Qualifications · Bachelors/Masters in Engineering. · Minimum 7&#43; years of SOC/IP Verification based on SV/UVM. Proficient in using AI tools and Methodologies · Good understanding on Test controller / MBIST / DFT architecture · Knowledge of industry standard interfaces, such as PCIE, LPDDR*, ONFI/NAND is desired. · Proven experience in ATE/Functional CHAZ vector enablement in Silicon / Wafers and debug abilities on vectors <p

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Be part of ASIC Design Verification team responsible for verification of IP/Block or Subsystem. Roles & Responsibilities: • To be part of a highly skilled ASIC Team working on latest technologies • Responsible for overall IP/Block and Subsystem verification from Test plan creation, System Verilog/UVM testbench development to Sign-off • Ability to lead and mentor a team of verification engineers • Ensure first pass product through verification coverage and sign-off criteria • Pair with similar domain specialists across other geographical locations on core technical initiatives Minimum Qualifications: • M.S./M.Tech, BS/BE (Electronics) with 10&#43; Years of experience • Should have expertise in IP/Block/Subsystem level verification • Experience with AMBA protocols like AXI/AHB • PCIe/NVMe/DDR protocol knowledge and work experience on DDR/PCIe/NVMe controllers or similar IPs • Proven track record of building Verification Plan, UVM Environment and Test Benches • Experience with RTL debugging, Scoreboard, Assertions, Functional coverage coding and Code Coverage analysis • Sound knowledge of Verilog and System Verilog languages • This position requires good written and verbal communication skills as well a strong commitment and ability to work in cross functional and global teams Preferred Qualifications: • NVMe protocol knowledge and experience with working on NVMe contro