Staff Engineer IP Verification - Digital Design Verification

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skills in planning, area/time estimation, scheduling, and execution to meet project scheduling multiple project environment. Contribute to effective project-management. Effectively communicating with Global engineering teams to assure the success of layout project. Qualification/Requirements 8 to 15 years' experience in analog/custom layout build in advanced CMOS process, in various technology nodes (Planar, FinFET ) Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc., Good understanding of Analog Layout fundamentals (e.cg., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive static device parasitics etc.) Understanding layout effects on the circuit such as speed, capacitance, power and area etc. Ability to understand build constraints and implement high-

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job responsibilities: · Create SoC Verification plan and develop C/SV/UVM based SoC verification tests · Develop understanding on SoC Architecture and Test controller Architecture · Develop SV / UVM based testcases for Test controller verification, MBIST verification and Functional vectors generation · Develop SV/UVM monitors to measure performance and improve Verification Environment · Interact with Architecture/Design/Tester teams to identify ASIC test vectors and functional patterns requirement · Develop flows to automate verification environment development and drive team · Involve in Vectors Bring-up activity and support ATE/Tester teams for Functional Characterization Job Qualifications · Bachelors/Masters in Engineering. · Minimum 7&#43; years of SOC/IP Verification based on SV/UVM. Proficient in using AI tools and Methodologies · Good understanding on Test controller / MBIST / DFT architecture · Knowledge of industry standard interfaces, such as PCIE, LPDDR*, ONFI/NAND is desired. · Proven experience in ATE/Functional CHAZ vector enablement in Silicon / Wafers and debug abilities on vectors <p

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly skilled and motivated Senior Design Verification Engineer to join our team. In this role, you will be responsible for the end-to-end verification of our IOMMU (Input/Output Memory Management Unit) IP. You will play a critical role in ensuring the functional correctness and performance of the design, taking ownership of the verification process right from the initial specification understanding down to final coverage closure. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have hands-on experience in ASIC or SoC verification using SystemVerilog and UVM. You enjoy debugging complex design and verification issues and working closely with cross-functional teams. You’re comfortable building verification environments from scratch and driving coverage closure. You have familiarity with standard bus protocols and modern verification tools. What We Need Experience owning block or subsystem-level verification from test planning to sign-off. Strong understanding of constrained-random verification, coverage analysis, and regression debugging. Familiarity with proto

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Be part of ASIC Design Verification team responsible for verification of IP/Block or Subsystem. Roles & Responsibilities: • To be part of a highly skilled ASIC Team working on latest technologies • Responsible for overall IP/Block and Subsystem verification from Test plan creation, System Verilog/UVM testbench development to Sign-off • Ability to lead and mentor a team of verification engineers • Ensure first pass product through verification coverage and sign-off criteria • Pair with similar domain specialists across other geographical locations on core technical initiatives Minimum Qualifications: • M.S./M.Tech, BS/BE (Electronics) with 10&#43; Years of experience • Should have expertise in IP/Block/Subsystem level verification • Experience with AMBA protocols like AXI/AHB • PCIe/NVMe/DDR protocol knowledge and work experience on DDR/PCIe/NVMe controllers or similar IPs • Proven track record of building Verification Plan, UVM Environment and Test Benches • Experience with RTL debugging, Scoreboard, Assertions, Functional coverage coding and Code Coverage analysis • Sound knowledge of Verilog and System Verilog languages • This position requires good written and verbal communication skills as well a strong commitment and ability to work in cross functional and global teams Preferred Qualifications: • NVMe protocol knowledge and experience with working on NVMe contro

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Duties include, but not limited to: Chipping in to the development of new NAND Flash Memory by assisting with the overall design, layout, and optimization of Memory/Logic circuits Supervising and own the full chip verification activities including planning, tracking, and criteria setting Drive multi-functional team in key features evaluation and recommend decision on architecture Driving innovation into the future Memory generation with dynamic work environment Proven ability to leverage AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies Leverage AI tools to automate the tools and workflow Applying Artificial Intelligence in workflows to improve build efficiency Successful candidates for this position will have: Broad knowledge and experience in IP Verificatipn is preferred Ability to lead multi-functional team in a project environment Good interpersonal skills with the ability to convey complex technical concepts in verbal and written form Proven knowledge of variousverification functionality on full chip level Proven expertise and background in Test Bench development in System Verilog Knowledge in verification methodologies such as UVM Knowledge of circuit simulators such as XA, hspice and/or hsim/Finesim, etc. 6-8 years of proven experience in Verification Degree or equivalent

About Us Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Job Summary Working within the logical design team, the silicon logical design engineer is responsible for a wide range of logical design tasks. The team is responsible for delivering the Microarchitecture and RTL design to implement the chip architecture specification for Graphcore Silicon, working closely with other engineers within the Silicon team. The successful candidate will be responsible for helping the team deliver high quality micro-architecture and RTL for Graphcore chips, working within the logical design team and with the broader Silicon team to ensure we meet the company objectives for Silicon delivery. Responsibilities and Duties Integrate IP and subsystems into top-level SoC designs Develop and maintain build and configuration environments Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level Support verification and physical design teams through clean interface hand-offs Debug and resolve integration-related issues across multiple hierarchies Contribute to the continuous improvement of integration flows and automation Producing high quality microarchitecture and other documentation Ensure good communication between sites to maintain consistent working practises Candidate Profile Essential skills: Logical design experience in relevant industry Experience range 8-12 years in Semiconductor Industry/Product development exposure. Be highly motivated, a self-starter, and a team player Ability to work across teams and debugging issues seen to find root cau