Advance Packaging Process Development Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Build the Future of Memory and AI from India At Micron India , we are helping shape the next generation of memory and storage solutions that power Artificial Intelligence, cloud computing, mobile devices, automotive systems, and data centers worldwide. Join a team of innovators, engineers, and technology leaders working at the forefront of semiconductor design, verification, product development, advanced packaging, data analytics, and manufacturing technology. From pioneering High Bandwidth Memory (HBM) solutions for AI to developing next-generation DRAM and NAND technologies, Micron India plays a critical role in delivering innovations that enable the world's most demanding computing applications. As one of Micron's fastest-growing innovation hubs, our teams collaborate globally to solve complex engineering challenges, accelerate technology development, and transform breakthrough ideas into products used by billions of people around the world. Opportunities Across Micron India Engineering Teams DTPG (Design Technology & Product Group) Design and develop next-generation DRAM, NAND, and emerging memory technologies powering AI, high-performance computing, mobile, and cloud applications. Work across memory architecture, circuit design, layout, verification, characterization, and product engineering to bring cutting-edge semiconductor innovations to market. TD (Technology Development) Drive the future of memory technology

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Intern for Assembly and Test (AT) Materials Category Supplier Management, you will support Micron’s Assembly and Test materials category team in managing critical semiconductor material suppliers, strengthening supply assurance, improving cost competitiveness, and enabling resilient global sourcing strategies. You will learn how category managers analyze market dynamics, supplier performance, cost drivers, risk exposure, and stakeholder requirements across key AT materials categories such as packaging substrates, molding compound, gold wire, die-attached film, solder-balls and other materials used in Assembly packaging. This internship offers hands-on exposure to strategic sourcing, supplier engagement, data analytics, benchmarking, and cross-functional business partnering in a fast-paced global semiconductor supply chain environment. Intern will take opportunity to use and apply AI tools including use of Agents, Agentic AI and Agentic solutions. Key Responsibilities AT Materials Cost, Market & Supplier Analysis Assist in developing cost, market, and supplier analysis for assigned AT materials categories, including price trend tracking, supply-demand outlook, cost drivers, and industry benchmarking. Support collection and synthesis of supplier intelligence, including capacity updates, technology roadmaps, commercial position, risk indicators, and regional supply considerations. Help maintain category dashboards, supplier scorecard

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. Within the HBM organization, this role is part of a highly collaborative team focused on advancing next-generation High Bandwidth Memory (HBM) solutions through deep characterization, modeling, and root-cause analysis. The team partners closely with Design Technology Co-Optimization (DTPCO), Product Engineering, Packaging, Test, Reliability, and Technology Development organizations to drive product innovation and quality. This role is critical to achieving DTPCO objectives by developing a first-principles understanding of HBM cube limitations and validating hypotheses through silicon data and supporting models. The position focuses on custom bench-level characterization of HBM devices under thermal, mechanical, and electrical stress conditions to improve product performance, yield, reliability, and adaptability across future HBM generations. Responsibilities Design, build, debug, and complete custom bench-level test setups, fixtures, and measurement flows using laboratory equipment including power supplies, SMUs, oscilloscopes, thermal systems, handlers, sockets, and probe cards. Perform thermal, mechanical, and electrical characterization of HBM cubes under hot/cold, transient, and forced-temperature conditions, including power-temperature correlation, warpage analysis, stress characterization, tim

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Platform Architecture team defines the electrical, thermal, and power-delivery architectures that enable Micron's next-generation High Bandwidth Memory (HBM) solutions. Working closely with architecture, design, packaging, and technology teams, the organization drives innovation in signaling, power integrity, thermal management, and system optimization to support AI, high-performance computing, and data center applications. As an HBM Platform Architecture Intern, you will contribute to the development of future HBM platforms by evaluating electrical, thermal, and power delivery architectures for advanced memory systems. You will work alongside experienced architects to analyze design trade-offs, develop modeling tools, and investigate solutions that improve performance, power efficiency, reliability, and scalability for next-generation memory products. Responsibilities Perform signaling and timing analysis for on-die and off-die interfaces across multiple system and packaging topologies. Develop and evaluate thermal models to analyze heat transfer, thermal performance, and design trade-offs in advanced memory systems. Analyze power delivery networks (PDNs), including IR-drop, electromigration (EM), power integrity, and power grid optimization for advanced HBM architectures. Develop modeling, simulation, and automation tools to support power delivery, thermal analysis, and architecture evaluation activities. Collaborate with architecture, design, packaging, and technology teams to

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. MTS, Interface Pathfinding Hardware Development Engineer About the Role At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next generation of high-speed interfaces. Micron’s Interface Pathfinding team drives performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. As the Interface Pathfinding Hardware Development Engineer , you will own characterization for a high-speed interface test-chip program: the characterization plan and its success criteria, development of the characterization bench hardware and its automation, the measurement-uncertainty budget, and the correlation report proving the silicon matches the models. You will join a small, senior team spanning analog design, layout, digital design, and verification, working closely with the Chip Lead and the Signal Integrity and Physical Design engineers — driving decisions independently while consulting heavily with other experts across Micron. This is a foundational hire for a growing program. Strong execution early is expected to lead to follow-on projects of increasing scope, team size, and characterization complexity — including an expanding mandate for AI-enabled engineering leadership across the organization. What You’ll Own Characterization Planning • Derive the electr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The Heterogeneous Integration Group (HIG) HBM Architecture team develops next-generation High-Bandwidth Memory (HBM) solutions that power AI, high-performance computing, cloud infrastructure, and advanced networking systems. The team works across architecture, design, verification, packaging, product engineering, and technology development to evaluate innovative memory architectures and deliver scalable, high-performance semiconductor solutions. As an HBM Design Architect, New College Graduate, you will contribute to the evaluation and development of future HBM and DRAM architectures. Working with experienced architects and engineering teams, you will analyze system and block-level design tradeoffs related to performance, power, area, thermal behavior, reliability, and manufacturability. This role provides an opportunity to leverage AI, Large Language Models (LLMs), and data-driven engineering methodologies to accelerate architecture exploration and improve decision-making. Responsibilities Analyze HBM and DRAM architectures using analytic

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal ASIC Design Engineer About the Role At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team drives performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. A core part of that work is silicon-based validation of novel PHY solutions, and we are growing the team to execute. As the Principal ASIC Design Engineer , you will be the primary digital contributor on a deliberately small, senior team — united around the goal of carrying high-speed interface technologies from architecture to tape-out. The team’s analog and chip-level architecture is anchored by a deeply experienced analog custom design engineer; your role is to be the authoritative digital voice — owning RTL design and micro-architecture of the digital blocks, defining timing constraints, supporting verification, and serving as the key interface between the digital design and the analog and layout specialists who will carry the implementation through to silicon. On a test ASIC of this scope, the front-end digital work is the critical path, with contractor and layout support engaged as bandwidth demands warrant. What You’ll Own Digital Block Architecture & RTL Design Own the micro-architecture and RTL implement

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal Signal Integrity Engineer — Interface Pathfinding About the Role At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer , you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption. What You’ll Work On Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces. The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks. Key signal integrity domains include: Intercon

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Technology Package Co-Optimization (DTPCO) organization is seeking a Staff Engineer! Lead the design and development of test vehicles that enable technology learning and risk reduction for future HBM products! This role serves as a key technical contributor within DTPCO, partnering closely with Architecture, Design, Layout, Product Engineering, Reliability, and Advanced Packaging teams to translate emerging product requirements and technology challenges into actionable test vehicle solutions. You will apply expertise in semiconductor design, physical implementation, silicon characterization, and advanced packaging technologies to define test structures, develop validation strategies, and generate data that drives product decisions across future HBM generations. Unlike a traditional product role centered on ownership of product blocks, this position emphasizes enabling learning in development and engineering. It does so by developing representative test vehicles and characterization structures. Key Responsibilities Serve as a technical lead for HBM test vehicle design and structure development within DTPCO. Partner with HBM product, technology and reliability team. Define and implement test structures targeting key learning areas such as package interaction and reliability Drive test vehicle content definition, structure specifications, measurement requirements, and validation objectives. Analyze silicon characterization and qualification results to identify optimization opportunit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Program Planning & Execution Own end‑to‑end program plans for chip design programs from concept → tape‑out → silicon bring‑up . Develop and maintain coordinated schedules, achievements, and critical paths across: Architecture RTL & DV Physical Design CAD / Methodology DFT, AMS, Packaging, and Silicon Validation Drive program reviews, achievement readiness, and stage‑gate decisions. Multi-Functional Leadership Act as the primary interface between Design, Verification, Layout, CAD, Technology, Product Engineering, Manufacturing, and Business teams. Drive alignment across global teams (India, US, Japan, etc.). Resolve cross‑team dependencies , priority conflicts, and execution bottlenecks. Risk, Issue & Transition Coordination Proactively identify schedule, technical, resource, and dependency risks . Drive mitigation and recovery plans for execution gaps. Own change control for scope, schedule, and resource adjustments. Execution Metrics & Reporting Define and track program critical metrics: Schedule health Resource loading Design & verification readiness Tape‑out quality indicators Provide clear, concise executive updates with data‑driven insights.</l

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal Signal Integrity Engineer — Interface Pathfinding About the Role At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer , you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption. What You’ll Work On Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces. The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks. Key signal integrity domains include: Interconnect Modeling — Generating an

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an SoC Physical Design Senior Manager, HBM in the Heterogeneous Integration Group (HIG), you will lead a team of physical design and physical verification engineers responsible for implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tapeout. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Recruit, develop, and mentor a team of physical design engineers delivering HBM base die products. Plan project resourcing requirements and timelines. Prioritize resources across projects and individual assignments to meet aggressive product delivery schedules. Drive physical implementation for SoC blocks and/or top-level including floorplanning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Collaborate with design and integration teams to ensure clean implementation of clocking/reset strategy, power architecture, and SoC integration requirements. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary The DRAM Packaging organization is responsible for developing and delivering advanced memory packaging solutions that enable Micron’s next generation products. The team partners across design, technology development, manufacturing, quality, supply chain, and external ecosystem partners to drive innovation, accelerate product development, and deliver industry-leading packaging technologies that support markets including AI, cloud, mobile, automotive, high-performance computing, and data centers! Position Overview As the Director of DRAM Packaging, you will lead the strategy, development, and execution of advanced packaging solutions across Micron's memory portfolio. You will define technology roadmaps, drive innovation in next-generation packaging architectures, and build a high-performing global engineering organization. This executive leadership role combines technical expertise, business strategy, customer engagement, and digital transformation to accelerate innovation, improve organizational effectiveness, and strengthen Micron’s competitive position. Responsibilities Define and execute long-term DRAM packaging strategies that support future product, technology, and business objectives Lead development and deployment of advanced packaging technologies, including HBM, LPDRAM, DDR, 2.5D/3D integration, heterogeneous integration, chiplets, and next-generation interconnect solutions Drive adoption of AI, machine learning, advanced analytics, and digital engineering

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we're not just designing chips. We're building the physical architecture that powers artificial intelligence, accelerates cloud computing, enables autonomous vehicles, and connects the world through mobile and edge devices. Every breakthrough in AI — from large language models to next-generation data centers — runs on memory. And every bit of that memory lives inside a package that someone like you designs! We're looking for a Senior Package Design Engineer who is passionate about sadvanced semiconductor packaging and ready to lead at the intersection of silicon, system, and scale. This is a high-impact, highly visible role where you'll work across the full product lifecycle — from early-stage co-design with silicon teams all the way to High Volume Manufacturing (HVM). If you thrive where precision meets innovation, where your decisions shape products reaching millions of users worldwide, and where your expertise directly influences how the AI era unfolds — this role is for you! Responsibilites: Lead Co-Design from Silicon to System - Partner with silicon design, Business Units, customers, and package architecture teams to define new product concepts from the earliest stages of chip development - Optimize die floorplans, interconnection schemes, and package architectures — from concept to HVM - Drive trade-off studies and architecture decisions for advanced DRAM products targeting AI/D

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We define ESD and latch-up architecture for next-generation HBM products across advanced nodes and 3D integration. Our team works across device, circuit, and packaging domains to solve reliability challenges that directly impact product quality. We take on complex problems and turn them into scalable solutions that enable high-performance memory! As an SMTS/DMTS HBM ESD/Latch-Up Architect, you will define protection strategies across base die, DRAM stacks, and interconnects. This role shapes product reliability from early architecture through silicon validation. You will work across teams and influence technical direction while solving system-level ESD challenges. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define end-to-end ESD and latch-up architecture across base die, DRAM die, and interconnects Develop protection strategies for high-speed I/O, TSV interfaces, and advanced packaging Establish ESD/LUP standards, rule decks, and signoff criteria Drive correlation between d