Advanced Package Technology Development Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Compute and Memory Business Unit (CMBU), driving the innovation behind Micron's next generation DRAM solutions for AI, data center, and client computing platforms. Our team collaborates across product architecture, design, validation, and system engineering to solve complex challenges in bandwidth, power, reliability, and scalability. Together, we help shape the future of memory technology for the world's most demanding compute environments. As a Product Architecture Engineer focused on Signal Integrity (SI) and Power Integrity (PI), you will define the electrical architecture that enables next-generation DRAM products. This highly visible role combines deep technical expertise with system-level thinking to influence product roadmaps, guide design decisions, and partner with industry-leading ecosystem stakeholders. Your work will help deliver memory solutions that power tomorrow's AI and high-performance computing platforms. Responsibilities: Lead SI/PI architecture pathfinding for next-generation DRAM products across AI, data center, and client platforms Define channel, package, board, and module-level SI/PI requirements and design targets for product development Evaluate DDR and LPDDR electrical performance, including timing, jitter, signal margin, crosstalk, impedance, reflections, and power delivery behavior Develop and apply modeling, simulation, and correlation methodologies using industry-standard EDA tools and validation data Partner across design, validation, package,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design and plan systems and buildings. Provide system designs that ensure safe operations and maintenance. Develop, review, and maintain equipment and component specifications and corporate standards. Ensure material compatibility. Ensure all designs comply with applicable standards, codes, and regulations. Review capacity planning databases (Base Build capacities, POC assignments, and actual field conditions) to support current operations and future projects. Lead periodic system status presentations (system capacity, actual and projected loads, key accomplishments, and issues). Evaluate system and distribution capacity impacts based on requested scenario changes. Lead scope development for facilities infrastructure additions or modifications. Provide project support. Provide Micron specifications and standards to Design Firms and review detailed designs and specifications for new facilities infrastructure installations. Support cost and schedule estimates and provide justification for approval. Supervise and coordinate consultant resources as required. Communicate with Operations, Design, Construction, Procurement, and Manufacturing stakeholders to meet project objectives and deliverables. Review design packages and provide documented comments and feedback. Work with appropriate personnel to resolve issues or implement corrections. Ensure project scope meets requestor needs. Ensure change management procedures are followed. Monitor progress and provide engineering and design support during construction as required. Employer will accept a Master’

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As part of APTD Technology Development Process Integrator, you will be responsible for developing advanced packaging process solution and ensure New Process, New Equipment, New Material and Path finding activities success for all adv pkg products in Micron. To lead/contribute new Technode process readiness and improving the yield, quality and reliability with process characterization and optimization and new materials, machines & technologies introduction. Having understanding of Frontend Process is a plus, packaging requirements, chip package interaction, equipment understanding and process technology in the industry. The ability to enable best technology for New Technode with packaging requirements. You will also be required to drive & collaborate with cross functional teams to resolve process related problems. Ensure smooth transition from new process development, 1st qualification success to small volume production launch Development and Qualification of new packaging process, material, equipment and technology solutions to meet new Technode requirements and schedule Perform CPI NUDD, process TRA, Si characterization, risk mitigation execution and process recipe readiness prior Silicon arrives and ensure 1st pass rate. Qualify new process/technology/equipment/materials Technical capability Identify path finding opportunities for Micron's technology leadership with BIC t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As part of APTD SG Technology Development Process Integrator, you will be responsible for developing advanced packaging process solution and ensure New Process, New Equipment, New Material and Path finding activities success for all adv pkg products in Micron. To lead new Technode process readiness and improving the yield, quality and reliability with process characterization and optimization and new materials, machines & technologies introduction. You will need to have understanding of Frontend Process, packaging requirements, chip package interaction, equipment understanding and process technology in the industry. The ability to enable best technology for New Technode with packaging requirements. You will also be required to drive & collaborate with cross functional teams to resolve process related problems. Ensure smooth transition from new process development, 1st qualification success to small volume production launch Development and Qualification of new packaging process, material, equipment and technology solutions to meet new Technode requirements and schedule Perform CPI NUDD, process TRA, risk mitigation execution and process recipe readiness prior Silicon arrives and ensure 1st pass rate. Qualify new process/technology/equipment/materials Technical capability Identify path finding opportunities for Micron's technology leadership with BIC time to market, continuou

Position: Robot Operator (Glass Cleaning) Location: Bangalore Job Type: Full-Time Department: Operations Role Overview This role involves operating advanced robotic window-cleaning systems at residential, retail, office, and commercial locations. Candidates should be comfortable handling technology, performing basic troubleshooting, ensuring service quality, and interacting professionally with customers. Key Responsibilities • Operate robotic glass and window-cleaning equipment with proper safety procedures. • Perform routine maintenance, inspections, and basic troubleshooting. • Carry out manual touch-up cleaning whenever required. • Ensure high-quality service delivery and customer satisfaction. • Record job updates, customer feedback, and service issues through CRM systems. • Support customer engagement and identify opportunities for additional services. Required Skills & Qualifications • Tech-savvy with the ability to learn robotic operations and mobile applications quickly. • Basic mechanical aptitude and troubleshooting skills. • Good communication skills in English, Hindi, and Kannada. • Physically fit to handle equipment and perform occasional manual cleaning. • Customer-friendly attitude with strong service orientation. • Two-wheeler preferred for local travel (fuel allowance provided). • Prior experience in cleaning services, field operations, appliances, maintenance, or home services is an advantage. What We Offer • Competitive salary package. • Incentives on upselling and cross-selling opportunities. • Performance-based bonuses. • Professional training on robot operations, safety, and customer handling. • Uniforms, equipment, and consumables provided by the company. • Career growth opportunities into Senior Operator, Supervisor, and Technician roles. • Dynamic start-up environment with long-term career development. About the Company A Bangalore-based Robot-as-a-Service (RaaS) start-up delivering innovative automated cleaning solutions across B2B and B2C

The Role We are seeking a highly skilled and hands-on SoC Floorplan Lead to own the physical foundation of our next-generation AI and Data Center SoCs. In this critical role, you will be the bridge between architecture, logic design, and physical design. You will work hand-in-hand with Chip Architects and RTL Leads to influence micro-architecture and ensure the physical implementation achieves best-in-class Power, Performance, and Area (PPA). If you love solving complex spatial puzzles on advanced technology nodes, integrating sensitive analog components, and driving execution in a high-energy start-up environment, this is the role for you. Key Responsibilities Top-Level Floorplanning: Own the SoC-level floorplan from concept to tape-out for high-performance, large-scale AI/Data Center chips on advanced process nodes (e.g., 5nm, 3nm or below). Architecture & RTL Collaboration: Partner closely with Architecture and RTL teams to provide early physical feasibility feedback. Drive block partitioning, shape optimization, and data-flow planning to achieve the absolute best PPA. Bump & Package Co-Design: Lead bump planning and IO ring definition. Work with packaging teams on flip-chip/advanced packaging constraints, ensuring optimal signal escape and power delivery. Custom & Analog Routing: Manage the placement and custom routing strategies for critical Analog/Mixed-Signal (AMS) IPs, high-speed SerDes (PCIe, Ethernet, Memory interfaces), PLLs, and sensitive clock distributions. Power Delivery Network (PDN): Design and analyze the top-level power grid, ensuring robust power delivery for high-current AI workloads while minimizing IR drop. Pin Assignment & Feedthroughs: Manage macro placement, block-level pin assignments, and top-level feedthrough planning to optimize global timing and routing congestion. Methodology Development: Build and maintain scalable Floorplanning workflows and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is seeking an experienced Optical Interconnect Design Architect to define and drive next-generation optical connectivity solutions enabling future memory, AI accelerator, and high-performance computing platforms. This role will lead architecture development, technology pathfinding, feasibility analysis, and ecosystem engagement required to enable scalable optical interconnect solutions. The successful candidate will evaluate emerging photonic technologies, develop optical I/O architectures, guide proof-of-concept implementations, and collaborate with internal and external partners to identify solutions that meet future bandwidth, energy efficiency, thermal, reliability, and manufacturability requirements. The architect will influence Micron's long-term optical interconnect roadmap spanning photonic interposers, silicon photonics, optical memory interfaces, co-packaged optics, optical networking, and advanced heterogeneous integration technologies. Responsibilities will include, but are not limited to: Drive architecture explor

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: • Establish and improve equipment condition and technology. • Upgrade process capability and reduce production cost. • Establish and modify equipment management projects. • Set up process parameters for a variety of semiconductor equipment. • Evaluation, promotion and planning of new equipment / materials. • Abnormal analysis and improvement. • Leverage AI-enabled tools and data-driven insights to improve operational efficiency, accelerate problem-solving, and support continuous improvement initiatives. Qualifications and Skills • Experience in wafer bonding, debonding, coating, lithography, thin film, or advanced packaging processes is preferred. ​ • Establish and improve process condition and technology.​ • Upgrade tool capability and improve product quality.​ • Establish and modify process management projects.​ • Set up process parameters for a variety of semiconductor equipment. ​• Evaluation, promotion and planning of new equipment / materials. ​• Abnormal analysis and improvement.​ • Leveraging AI and data analytics tools to enhance process monitoring, root cause analysis, predictive maintenance, and process optimization for semiconductor manufacturing operations. Requirement:​ • Preferred to have over 3-year of working experiences in production line.​ • Must have process maintain experience.​ • Bachelor degree or

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: • Accountable and sustain for Bond process. • Backup for Debond area process basic maintenance. • Establish and improve process condition and technology. • Upgrade tool capability and improve product quality. • Establish and modify process management projects. • Set up process parameters for a variety of semiconductor equipment. • Evaluation, promotion and planning of new equipment / materials. • Abnormal analysis and improvement. • Leveraging AI and data analytics tools to enhance process monitoring, root cause analysis, predictive maintenance, and process optimization. Qualifications and Skills • Experience in wafer bonding, debonding, coating, lithography, thin film, or advanced packaging processes is preferred. ​ • Establish and improve process condition and technology.​ • Upgrade tool capability and improve product quality.​ • Establish and modify process management projects.​ • Set up process parameters for a variety of semiconductor equipment. ​• Evaluation, promotion and planning of new equipment / materials. ​• Abnormal analysis and improvement.​ • Leveraging AI and data analytics tools to enhance process monitoring, root cause analysis, predictive maintenance, and process optimization for semiconductor manufacturing operations. Requirement:​

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: ​ Accountable and sustain for Bond process. ​ Backup for Debond area process basic maintenance. ​ Establish and improve process condition and technology. ​ Upgrade tool capability and improve product quality. ​ Establish and modify process management projects. ​ Set up process parameters for a variety of semiconductor equipment. ​ Evaluation, promotion and planning of new equipment / materials. ​ Abnormal analysis and improvement. ​ Leveraging AI and data analytics tools to enhance process monitoring, root cause analysis, predictive maintenance, and process optimization for semiconductor manufacturing operations. Requirement: ​ • Preferred to have over 3-year of working experiences in production line. ​ •

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Summary: We are seeking an experienced Fail-Mode Metric Reaction (FMR) Engineer to drive yield analysis, failure mode characterization, and failure mechanisms understanding across test vehicles and advanced packaging products. This role owns the reaction loop between defect signatures observed in the line and the corrective actions taken by process, build, and reliability partners — spanning time-zero defects, internal reliability fails, and customer RMA returns! Job Description: Key Responsibilities: Perform yield analysis for advanced packaging test vehicles and production products, producing clear breakdowns of defect signatures by fail mode, location, layer, and process step. Investigate and root-cause fail modes and fail mechanisms at time-zero, correlating electrical signatures with physical failure analysis findings. Drive reaction plans on internal reliability fails and customer RMAs, translating failure mechanism understanding into containment, corrective, and preventive actions. Partner closely with: APTD Process teams — for process excursion triage and corrective action. APTD FA labs — for physical FA planning, sample prioritization, and interpretation. PSE (Product/Package Silicon Engineering) and TSE (Test/Silicon Engineering) teams — for test coverage, screen enhancement, and product-level dispositioning. Build and maintain data analysis pipelines, dashboards, and automated wor

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Mechanical Simulation Engineer, you will drive thermo-mechanical and multiphysics modeling for advanced semiconductor packaging technologies including HBM, 2.5D, and 3D integration. The role focuses on enabling robust package design through advanced simulation, material characterization, and failure mechanism understanding. You will actively integrate Generative AI, AI Assistant tools, and broader Artificial Intelligence capabilities to optimize modeling workflows, enhance predictive analytics, and automate complex simulations. This includes leveraging AI to improve simulation accuracy, reduce cycle time, and enable advanced modeling capabilities. You will collaborate with cross-functional teams across package architecture, fabrication, and assembly process integration to develop predictive simulation methodologies and influence design decisions. Job Responsibilities: Perform linear and non-linear static analysis for package and material behavior Conduct fatigue, fracture mechanics, and reliability simulations for advanced packages Develop multiphysics models (thermo-mechanical, therm

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a hands-on Manufacturing Engineer to own the manufacturing interface between package design, semiconductor assembly, package test, board assembly, and final product integration. This role is focused on making advanced packages manufacturable and transferable from design engineering into qualified OSAT processes and downstream board/system assembly. You will work closely with Packaging Engineering, Silicon Manufacturing and Test, Quality, Supply Chain, PCB/board design, and external partners such as substrate suppliers, OSATs, test houses, and contract manufacturers. The ideal candidate understands how package decisions—such as package size, substrate construction, bump and ball design, warpage, underfill, materials, and assembly location—affect package yield, package test, PCB footprint and stencil design, SMT assembly, and final product readiness. This role is remote based out of Taiwan but requires close engagement with regional OSATs, foundry/test partners, contract manufacturers, and Tenstorrent engineering teams across multiple time zones. Regular on-site presence at partner factories is expected during qualification, commissioning, build, and ramp activities. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and of

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a Senior Chiplet Physical Design Engineer at Tenstorrent, you will work on a high-profile, cutting-edge program designing and integrating multiple chiplets into a System-in-Package (SiP). You’ll collaborate closely with Tenstorrent experts and leaders across the USA, Japan, and other global sites, as well as external partners, to deliver world-class CPU and AI silicon. In this role, you will own critical aspects of synthesis and place-and-route for high-speed CPU core designs, contributing directly to performance, power, and area outcomes on advanced process nodes. This role is remote, based out of The United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An experienced physical design engineer with at least 10 years of relevant experience, who thrives in complex, multi-stakeholder projects. Detail-driven, with a strong sense of ownership from synthesis through design closure. Comfortable working at advanced nodes (3nm and below) and multi-GHz designs. A collaborative team player who enjoys mentoring others and influencing methodology. Clear communicator who can balance technical depth with schedule and resource constraints. &nbsp

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Job title Senior DFT Engineer Job description We are looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design. Your responsibilities Integrate and verify test features in digital designs for effective manufacturing testing and silicon debug. Key responsibilities include: Building entire chip-level DFT strategies Inserting DFTs, including scan chains, memory BIST, and JTAG Collaborating with RTL, physical design, and verification teams for testability throughout the design flow Scripting and automating DFT flows using industry-standard EDA tools (e.g., Cadence, Synopsys, Siemens) Running and analyzing ATPG and fault coverage reports Supporting silicon bring-up and debug related to test features Knowledge of advanced silicon technologies and methodologies for test coverage optimization Experience with formal verification and signoff of inserted DFT logic Strong communication and collaboration skills for cross-functional teamwork Exp