Ai Agent Product Expert Jobs

About Stripe Stripe is a financial infrastructure platform for businesses. Millions of companies — from the world’s largest enterprises to the most ambitious startups — use Stripe to accept payments, grow their revenue, and accelerate new business opportunities. Our mission is to increase the GDP of the internet, and we have a staggering amount of work ahead. That means you have an unprecedented opportunity to put the global economy within everyone's reach while doing the most important work of your career. About the team Product Sales are deep functional and technical specialists who lead and advise on Stripe's most strategic and complex deals. We have a variety of open roles across the Link organization, including building a new team to focus on banking. This team sits at the intersection of Stripe's highest-leverage growth areas: the Link consumer network, Financial Connections, Optimized Checkout Suite, and alternative payment methods including bank payments and BNPLs. Selling them together is a materially stronger proposition than selling any alone — and this role owns that combined motion across top enterprise segments in key verticals. What you'll do As an Account Executive, Product you'll lead Stripe’s largest, most complex deals for your product area. You will be the go-to expert on the product offering, integration shapes, and competitive landscape. You'll partner closely with core Account Executives, Solutions Architects, Product, Engineering, and Marketing to land and expand across new and existing customers — while shaping how Stripe brings this combined offering to market in the segment. You will be instrumental in leading in depth product discussions and negotiations as well as building and executing against our go to market strategy. You are a top performing salesperson capable of engaging in business-level and technical conversations at multiple levels of the organization, including CEOs, CTOs, and CFOs. You are a strategic thinker capable of

We are a global team of innovators and pioneers dedicated to shaping the future of observability. At New Relic, we build an intelligent platform that empowers companies to thrive in an AI-first world by giving them unparalleled insight into their complex systems. As we continue to expand our global footprint, we're looking for passionate people to join our mission. If you're ready to help the world's best companies optimize their digital applications, we invite you to explore a career with us! Your opportunity As part of our global Customer Adoption organization, the Solutions Consultant leadership team is tasked with ensuring that each and every customer has a wildly successful relationship with us. By engaging with our customers on a technical level throughout their Observability lifecycle, our managers help expand the New Relic customer base by driving increased value for our customers as they scale their technology ambitions! We are seeking a driven leader who will build and evolve our Solutions Consulting team. This critical team is vital for New Relic to achieve our hyperscale goals. As the regional leader for the Solutions Consulting Team, you’ll be one of the primary drivers to increase revenue growth across new logo customers. You will develop a team of Solutions Consultants while working closely with other customer-facing teams (Account Executives, Technical Success Managers, etc) to combine strategy and execution to ensure our customers achieve the maximum value from New Relic. You and your team will work with customers across a wide spectrum of verticals and industries, to help customers solve their business challenges with the New Relic Platform and realize immediate time to value by connecting their success to their business goals. Our goal is to build lifelong advocates for New Relic! This is an opportunity to bring together your skills within DevOps, Architecture, Observability & Service Delivery and most importantly leadership. You will expand y

Figma is growing our team of passionate creatives and builders on a mission to make design accessible to all. Figma’s platform helps teams bring ideas to life—whether you're brainstorming, creating a prototype, translating designs into code, or iterating with AI. From idea to product, Figma empowers teams to streamline workflows, move faster, and work together in real time from anywhere in the world. If you're excited to shape the future of design and collaboration, join us! As a Product Designer at Figma, you will own real impactful projects and take them from ideation to execution. You will work fluidly and collaboratively with the rest of the design team, as well as other functions. Because of this, you should have a broad set of design skills and be motivated to learn. This is a full time role based in one of our San Francisco or New York hubs, with hybrid flexibility. What you'll do at Figma: Own the design from start to finish for impactful features that ship quickly Collaborate with product, research, marketing, and other functions to identify user and business needs Work closely with Engineering to ensure a high-quality implementation Create flows, prototypes, and high-fidelity visuals for your features Help with hiring, mentoring, and establishing a design culture within the company Contribute to the culture and processes of our growing design team Launches from early career designers on our team: Figma Grid Billing Experience Figma Draw We’d love to hear from you if you have: Demonstrated proficiency in visual design and/or interaction design skills Experience shipping projects with strong product strategy and visual design An ability to express ideas through prototyping and code An interest in design tools and design systems Demonstrated ability to come up with novel, simple solutions While it’s not required, it’s an added plus if you also have: An interest in design tools and design systems An aptitude or interest in systems thinking and informatio

Retail Partner Sales Representative Description - Job Summary • This role is responsible for collaborating with partners to transform leads into joint sales activities, tailoring solutions to meet customer needs in our Consumer Personal Systems business. The role builds strong strategic relationships with partners and promotes the organization's offerings fostering long-term business opportunities. The role mentors junior employees and leads training sessions for partners, continuously monitoring their performance to contribute to the team’s success. Responsibilities • Acts as the expert to the partner for complex information regarding the organization’s products, services, promotions, and configurations. • Develops and maintains account plans to promote sales growth in adherence to legal procedures and requirements. • Partners and transforms potential leads into joint sales activities; creates, fills in, and manages the funnel for deals with partners while achieving and/or exceeding quotas. • Collaborates with partners to tailor solutions that address specific customer needs, including customization of products and services to align with client requirements. • Builds strategic relationships with the partner to ensure long-term business opportunities for the organization. • Promotes and incorporates the organization’s offerings to become a key part of the partner’s business and solutions. • Leads training sessions and workshops for partners, educating them on the latest products, services, and industry trends to enhance their sales capabilities. • Monitors partner performance against targets, analyzing data, and providing insights to drive improvements and optimize outcomes. • Mentors junior team members, sharing expertise, providing guidance, and contributing to their professional development. Educatio

NVIDIA’s Silicon Co-Design Group sits at the crossroads of architecture, silicon, systems, and manufacturing, where first-principles thinking and engineering judgment at the highest level translate directly into product outcomes at scale. We are looking for a Principal Performance and Manufacturing Architect who has built the models, defined the specs, and seen them validated through silicon. You have owned the connection between design intent and manufacturing reality, not as a reviewer or a contributor, but as the person who set the methodology and proved it worked. You turn ambiguous physical phenomena into quantified, defensible margin terms. You do not wait for data to confirm your hypothesis; you design the experiment that gets it. You improve how the organization ships products after every program. The exceptional hire also uses AI deliberately — with proven workflow impact and the judgment to know where it compresses real work and where it introduces risk. What you'll be doing: Own the physics, from mechanism to margin. Build first-principles models connecting AVF, defect mechanisms, and DVFS transients to field FIT, system-level yield, and DPPM vs. coverage — calibrated per node and population shift — so every margin term in the V/F curve and P-state table is named, sourced, and defensible. Set the screen that resolves escapes. Specify ATE and SLT voltage, frequency, and timing conditions that capture worst-case transient VF windows — making it unambiguous whether a marginal defect or timing violation is detected or escapes at every manufacturing stage. Make the POR the authoritative source. Author the methodology document for each program and drive alignment across build, product definition, reliability, and test engineering — so every team is making decisions from the same model. Prove the model before produc

The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt mitigation across silicon, package, board, and platform. This role bridges architecture, silicon, and platform — translating product noise targets into shipped specifications, and feeding silicon findings back into the next generation's build. Success in this role requires strong systems thinking and a willingness to accept ambiguity. It also requires the ability to apply AI as a force multiplier while maintaining rigorous engineering judgment. What you'll be doing: Architect voltage-noise mitigation across the full stack — silicon, package, board, platform — and own the codesign trade-offs between them. Co-design noise features with Speed, Power, Reliability, Circuit Design , Power-Arch, ASIC, and platform teams. You're the connective tissue across the codesign web. Work with other team members to define product-level voltage noise targets, drive them to closure, and sign them off at shipment. Build and take ownership of the Sim-to-Si correlation methodology for noise. You know when a model is lying and when silicon is. Model and prototype next-gen noise features — transient sense, droop response, mitigation IP, and codify them so every future program inherits them. Lead show-stopper noise bugs during bringup. The critical issues stop with you. Drive architecture-level codesign tradeoffs across V/F Power Noise Reliability Thermal (Noise-Variation) and (Noise-to-Closure) boundary work, where the highest-leverage innovation lives. What we need to see: BS / MS / PhD in EE, CE, or related (or equivalent experience). 5+ years in silicon power integrity, voltage noise, or PDN. Deep expertise in at least one of

The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. System Integration sits at the intersection of all of them. It is the layer where every architecture, design, software, and manufacturing decision meets reality. When something breaks late in a program, it usually breaks here first. We are hiring a Senior Manager to lead this team in the US and partner closely with teams globally. Your work will sit on the critical path of every NVIDIA silicon program, and the bar you set for system integration is the bar we ship to! The two hardest, highest-leverage problems in this seat: Find critical silicon issues earlier — often before software is production-ready. Left-shifting post-silicon coverage is the highest-value thing System Integration can do. Standing up wide-area testing as a repeatable capability is a core part of the role. Keep programs on milestone when upstream dependencies slip. Validation plans collide with reality every program! The team needs new strategies, not just contingency plans, to keep moving when software, firmware, or methodology slip. You will design and run those strategies. What you’ll be doing: Plan and execute post-silicon feature integration, PVT validation, and wide-area testing across NVIDIA’s GPU, SoC, and CPU programs. Build wide-area and in-system test as a repeatable capability that shifts post-silicon coverage left, so issues surface before we are production-ready. Lead resolution of the most complex system-level issues, RMAs, and HW/SW interaction problems with creative workarounds and focused lab experimentation. Deve

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology and amazing people. Today, we're harnessing the boundless possibilities of AI to build the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Accomplishing unprecedented goals calls for imagination, inventiveness, and exceptional talent from around the world. As a NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Join our team and discover how you can build a lasting impact on the world. NVIDIA's Silicon Co-Design Group (SCG) leads the full product development lifecycle, from early architecture definition through silicon bringup to product release. The ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. This is where ideas become chips, and chips become products that define the state of the art — and we're building that future with some of the most motivated engineers in the industry. We're looking for a Senior Memory Systems Engineer to own HBM and LPDDR integration in sophisticated SoCs. This role covers the full stack, including silicon, package, embedded software, testing, and product development. The engineer will resolve the toughest system-level memory challenges throughout the process, building solutions that hold up at scale. What you'll be doing: HBM & LPDDR System Integration and Bringup: Drive HBM and LPDDR system integration, bringup, characterization, and debug for next-generation SoCs — taking memory subsystems through the full arc from first silicon to production-ready at scale. Full-Stack Memory Closure: <s

NVIDIA’s Silicon Co-Design Group is the team that gets every GPU, SoC, and CPU silicon program from first power-on to high-volume production. We are hiring a Senior Manager to lead our Test, Manufacturability, Reliability & Quality (TMRQ) organization. This is not a coordination role . Your work decides if a product can be built at scale and trusted in the field. These include production test development (SLT, BLT), control run flow, system reliability stress (HTOL), platform- and board-level manufacturing issue closure, and field diagnostic test development. You lead a team of individual contributors and a first-line manager at the layer where silicon, platform, and software collide with manufacturing reality. Decisions you make show up in yield curves, production ramp , and customer escapes. You are the leader the program turns to when a build is stuck, a control run is fallout-heavy, or a field return points back at silicon . The exceptional hire also uses AI deliberately — with demonstrated workflow impact and the judgment to know where it compresses real work and where it introduces risk. What you will be doing: Keep programs moving. Own the technical execution and velocity of SLT, BLT, Board/Chip/Rack CR, and system reliability stress (HTOL) across every GPU, SoC, and CPU silicon program. Close the hardest multi-functional failures. Resolve Vmin and binning escapes, performance shortfalls, and power anomalies by driving root-cause across design, methodology, DFT, ATE, package, software/firmware, and manufacturing — and own the WARs and productized fixes through to confirmation. Give leadership the clarity to act. Convert raw integration signals — CR fallout, BLT/SLT yield, SHTOL/CHTOL data, RMA trends, customer escalations — into decision-ready options that enable executive leadership to act with confidence on POR, QS/PS gates, a

Define the physical limits of what a chip can do, then break them! NVIDIA's Silicon Co-Design Group sits at the crossroads of architecture, silicon, systems, and manufacturing, where first principles thinking translates directly into product outcomes at scale. As GPU power density and thermal limits approach physical boundaries, the gap between system architecture needs and manufacturable, testable capabilities widens with every generation, and this role exists to close it. You wouldn't be maintaining existing solutions, you'd be identifying where physical constraints will erode NVIDIA's competitive edge before anyone else sees it coming, then building the cross-domain responses that ensure the next generation leapfrogs those limits entirely. The problems here don't have known answers yet: Every generation of NVIDIA silicon pushes closer to the limits of physics. The Co-Design Architect role isn't about optimizing within known bounds; it's about redrawing those bounds entirely. If you want your work to shape what's physically possible in the world's most demanding computing products, this is where that work happens. What you'll be doing: Power, Thermal & Packaging Limits Analysis: Gather and analyze the hard constraints of packaging, power delivery, and thermal dissipation against roadmap demands, predicting when those constraints will reduce competitiveness and acting before they do. Cross-Domain Solution Development: Develop solutions that span silicon features, packaging innovation, firmware and hardware co-design, and DFX updates, ensuring future products are not only performant but testable to the highest quality and reliability standards. Packaging Technology Evaluation: Assess emerging packaging technologies for their voltage/frequency, noise, reliability, and testability implications, determining which are worth adopting an