Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a DRAM Design Engineering Group at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned Dram product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures. Responsibilities: Responsible for Design and development of IP layouts used in DRAM chips. Perform layout verification like LVS/DRC/EM, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. G
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Physical Design Engineer-DPG-LPDDR at Micron, you will work on innovative memory and storage solutions. These solutions help transform data into intelligence quickly. You will join a dedicated team collaborating to develop world-class products that set industry standards. Key Responsibilities Lead end-to-end RTL-to-GDSII implementation for complex SoCs across advanced technology nodes. Drive floor planning, power planning, CTS, place & route, timing closure, and physical signoff. Own PPA optimization, low-power implementation, congestion management, and design convergence. Lead STA, SI, EM/IR, DRC, LVS, and reliability closure to achieve tape out readiness. Define physical design methodologies, automation strategies, and flow improvements. Partner with Architecture, RTL, DFT, Verification, CAD, and Product Engineering teams to resolve complex implementation challenges. Provide technical leadership, mentor engineers, and drive execution across global teams. Hands-on custom layout design experience is a strong value-added skill, enabling analog/mixed-signal integration, layout optimization, and advanced-node design challenges Leverage Artificial Intelligence (AI) tools to improve RTL-to-GDSII design productivity, quality, and turnaround time. Drive adoption of Generative AI and Agentic AI solutions for physical design automation, design closure, and engineering workflow optimization. <p
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our team develops the innovations that power AI, mobile, and computing platforms around the world. Our DRAM Engineering team brings together experts across design, verification, manufacturing, and product development to solve complex technical challenges and deliver advanced memory solutions. We are passionate about innovation, collaboration, and building technology that enables the next generation of computing. As a Semiconductor Design Engineer, you will help develop advanced DRAM and emerging memory products from concept through silicon validation. This role offers opportunities to contribute across circuit design, simulation, verification, and optimization while working closely with global engineering teams. Depending on experience, you may also lead technical projects, mentor engineers, and influence future memory design strategies. Responsibilities: Design, simulate, and optimize digital, analog, and mixed-signal circuits for DRAM and emerging memory products. Translate product requirements into circuit solutions and validate performance across operating conditions. Perform circuit verification, silicon correlation, debug, and tape-out support activities. Collaborate with design, verification, layout, CAD, product, and process teams to improve product quality and manufacturability. Contribute to design automation, AI-assisted workflows, technical reviews, and engineering protocols. Minimum Qualifications: <
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are shaping the memory technologies that power today's most advanced computing platforms, from AI accelerators to mobile and client devices. Our DRAM Engineering team brings together skilled engineers across the globe to solve complex technical challenges, drive innovation, and deliver high-performance memory solutions. If you enjoy tackling difficult problems and turning ideas into products, you'll find exciting opportunities to make an impact here. As a Semiconductor Design Engineer (Principal / Member of Technical Staff / Senior Member of Technical Staff), you will play a key role in designing and optimizing next-generation DRAM products. You will work closely with global design, verification, and multi-functional teams to develop innovative circuit solutions that balance performance, power, quality, reliability, and cost. This role also offers the opportunity to influence technical direction, mentor engineers, and help advance future memory technologies. Responsibilities: Design and optimize digital and analog circuits for next-generation DRAM products, including memory arrays, control logic, datapaths, address decoding, and I/O circuitry. Lead circuit development, simulation, verification, and silicon validation to achieve performance, power, area, and quality targets. Drive floor-planning, layout optimization, parasitic analysis, and tape-out activities. Advance AI-assisted design, automation, and design-space exploration through collaboration with internal and external partne
About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic is building custom silicon for Claude. The hardware our models run on is one of the most direct levers we have on capability, cost, and reliability — and we've decided to take design authority over it ourselves. We're looking for a Technical Program Manager to own end-to-end execution of our silicon, from architecture definition through tapeout, first-silicon bring-up, and production ramp. You'll be working alongside a small group of domain experts across front-end design, verification, physical design, DFT, analog/mixed-signal, foundry, and packaging. There is no process to inherit — you'll build the execution machinery this program runs on. This is a partner-heavy program by design. You'll drive a portfolio of external engagements — ASIC design services, IP vendors, foundry, and OSAT. You should have shipped chips before, know what a realistic silicon schedule looks like and its failure modes, and be comfortable making consequential program calls without a large organization behind you. And because this is Anthropic, you'll have Claude as a collaborator — we expect the TPMs on this team to push hard on what AI-assisted program management can look like. Key responsibilities Own the integrated silicon program plan — architecture closure, RTL freeze, DV milestones, IP delivery, PD closure, DFT, tapeout, and post-silicon bring-up. Drive external partner execution across ASIC design partners, IP vendors, foundry, and packaging/test. Run technology and IP selection as a program: track candidate vendors and options, drive evaluations to a decision, and land the build / buy / license calls with engineering leadershi
About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Role Summary Lead hardware development for next-generation NAS and enterprise storage platforms, from architecture through production. You'll design high-performance storage hardware, solve complex system-level challenges, and deliver reliable, scalable products. Responsibilities Architect, design, and develop NAS and enterprise storage hardware platforms utilizing PCIe, SATA, NVMe, DDR4/DDR5, USB, and high-speed Ethernet interfaces. Own schematic capture, component selection, and PCB design reviews, ensuring SI/PI, manufacturability, and product reliability. Lead hardware bring-up, debugging, and system validation, including functional, performance, thermal, and EMI/EMC testing. Collaborate with firmware, BSP, SI/PI, DQA, mechanical, manufacturing, and software teams throughout product development. Investigate and resolve hardware issues while continuously improving product performance, reliability, and cost. Requirements Bachelor's or Master's degree in Electrical Engineering or a related field. 3+ years of hardware design experience in NAS, enterprise storage, server platforms, or storage appliances. Strong foundation in digital and analog circuit design. Experience with PCIe, DDR4/DDR5, SATA, NVMe, USB, Ethernet, and SerDes. Experience designing power delivery systems with a solid understanding of SI/PI, thermal design
About the Team The DoorDash Air team is bringing drone delivery to reality. To make this happen, we’re building a strong electrical team to design high reliability, high power density converters, and fault-tolerant controls electronics. Come join us to build a new class of aircrafts and deploy at scale. DoorDash Labs, established in 2018, serves as the innovation hub for DoorDash, focusing on developing automation and robotics solutions to enhance last-mile logistics. The team's mission is to create technologies that support and augment human networks, aiming to improve efficiency for Dashers, merchants, and consumers alike. We’re ruthlessly focused on business impact. We are a highly senior team composed of former pioneers from a variety of different robotics industries. As of 2025, DoorDash has completed 10B lifetime deliveries. We’re focused on how to do the next 10B even better. About the Role In this role, you will own critical subsystems of the aircrafts and ground systems. Within a year, your designs will be operating complex mechanisms in the field and in the air . You will report into our Lead Electrical Engineer (not manager’s name)] DoorDash Air team in our DoorDash Labs organization. You’re excited about this opportunity because you will… Design mechatronics systems from a blank sheet Impact how our customers and merchants interact with our systems You’ll own the electrical design while collaborating closely with firmware, systems and mechanical engineering, supply chain, manufacturing, and reliability teams We’re excited about you because… Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field You have 5+ years of experience designing electronics circuit in highly cross-functional work environments You can design and bring-up a board with a micro-controller, integrate sensors, actuators, and design mixed-signal circuitry to support interfaces such as analog, SPI, CAN or ethernet Y
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Post-Silicon Yield & RMA Leadership Lead end-to-end investigation of silicon yield loss, field returns, customer escalations, and reliability failures. Drive root-cause analysis for complex silicon issues spanning process, design, test, package, and system interactions. Develop hypothesis-driven debug strategies and coordinate cross-functional execution. Own resolution of critical yield and quality issues through containment, corrective actions, and prevention plans. Device Technology & Process Interaction Analysis Analyze device-level failure mechanisms and process sensitivities impacting ASIC functionality and yield. Evaluate design-process interactions affecting analog, mixed-signal, memory, high-speed I/O, and PCIe PHY performance. Partner with foundry teams to understand process variations, excursions, reliability risks, and technology limitations. Translate silicon learning into actionable design and process improvements. Advanced ASIC Design Interaction & Silicon Debug Lead root-cause investigations involving design-process interactions affecting SRAM, PCIe PHY, ONFI interfaces, SerDes, analog/mixed-signal circuits, and high-speed digital subsystems. Analyze silicon failures across transistor, circuit, block, die, package, and system levels. Drive post-silicon debug activities involving design teams, DFT, product engineering, quality,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Overview At the Munich Development Center, we develop high-performance memory solutions for the graphics and AI markets. As part of the DRAM Design Engineering Group (DDEG), we collaborate closely with Micron’s global development and manufacturing teams. Our mission is to push the boundaries of memory technology through innovation, precision, and partnership. Role Overview We are looking for a motivated and curious working student or Master’s thesis candidate to join our DRAM design team. This is an outstanding opportunity to gain hands-on experience in integrated circuit (IC) design while working alongside expert engineers in a collaborative, startup-like environment. You will contribute to real-world projects and receive mentorship to support your academic and professional growth. Responsibilities Support the design and simulation of analog or digital circuit blocks under guidance Assist in developing schematics at the transistor level or RTL Participate in functional verification and layout reviews Contribute to testbench development and simulation setup Document design processes and results for internal use or academic reporting Collaborate with cross-functional teams to understand the full memory design flow Leverage generative AI tools to complete tasks in effective manner Optionally: define and complete a master’s thesis project aligned with team goals Required Qualifications Enrolled in a Bachelor’s or Master’s program in Ele
Your wellbeing, our mission. Join a company shaping a healthier world. GET TO KNOW US At Wellhub we're revolutionizing workplace wellness. Our platform connects employees worldwide to the best partners for fitness, mindfulness, therapy, nutrition, and sleep—all in one simple subscription. Headquartered in NYC with team members in Europe, North America and South America, we’re on a mission to make every company a wellness company. We believe work should be fulfilling, inspiring, and balanced. Here, you’ll find a team that values wellbeing, collaboration, and different perspectives, where passion and creativity push boundaries to create real impact. Your contributions will help shape a healthier, more balanced world for you and millions of people globally. Join us in redefining the future of wellbeing! THE OPPORTUNITY We are hiring a Staff Product Manager to help build our Occupational Health bet inside New Ventures based in Brazil . This is a Remote – Brazil position, meaning you can work from anywhere within the country. Please note that this role is only open to candidates in Brazil. Occupational health is one of the largest, most regulated, and most stubbornly analog corners of corporate wellbeing. In Brazil alone, it is a multi-billion real market: every company is legally required to run occupational exams, manage regulatory compliance (NR-01 and the new psychosocial-risk mandate, eSocial reporting), and look after the health of its workforce. Yet the industry still runs on paper, manual scheduling, fragmented clinics, and reports nobody reads. We intend to rebuild it, at AI speed. You will partner directly with the Founder/GM of the Occupational Health bet as the product lead of a small, single-threaded squad. This is a 0-to-1 build: the thesis is set, the market is chosen, but the product, the workflow, and the operating model are still being invented. You report to the VP Product, New Ventures, and you'll work daily with the Founder/G
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/tools to improve the work efficiency and help data analysis Co-work with international colleagues on developing new flows and tools for stdcells design Ability to identify stdcells design & char pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Requirements Good understanding of CMOS circuit design Good knowledge of CMOS device physics and layout Experience in total stdcells flow from DTCO development/ spec definition till lib release RTL/GDS flow setup, block level timing analysis, ICC2 experience. Preferred Synopsys EDA flow Finefet & planner experience required. Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. Experience in Primetime, Solido Analytics Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision Experience in Standard Cell design, layout and verification Experience in Skill, TCL, Per
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, Micron develops technologies that accelerate the transformation of information into intelligence. The DRAM Engineering Group (DEG) creates advanced memory solutions that enable modern applications, including artificial intelligence, high-performance computing, and immersive user experiences. Our team fosters innovation, collaboration, integrity, and continuous learning while solving some of the industry’s most complex engineering challenges. The Semiconductor Design Engineer will contribute to the design, simulation, optimization, and validation of digital and analog CMOS circuits for advanced DRAM and emerging memory technologies. This role provides opportunities to work across the full product lifecycle, from early technology development through product qualification, while collaborating with global design, verification, and manufacturing teams. The successful candidate will develop technical expertise in memory design, circuit analysis, and design automation while supporting the delivery of high-quality products. Responsibilities Design, simulate, analyze, and optimize CMOS memory circuits and functional blocks, including memory arrays, control logic, datapaths, address decoding, and input/output interfaces. Support physical design activities such as floor planning, placement, routing optimization, layout verification, and manufacturability improvements.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Design Engineer in the FLASH Group at Micron Technology, Inc., will be core technical individual contributor in design and validation of the on-chip controller and mixed signal circuitry in NAND FLASH chips. In this highly visible and challenging role, your responsibilities will include architecture development and product definition, detailed transistor level design, test plan, system integration and verification. Some RTL design and implementation of the controller hardware, design and development of firmware code for NAND internal operations and full-chip Verilog Validation. Successful candidates must have: • Solid knowledge in Verilog language. > AI proficiency is a an added plus. • Solid digital logic fundamentals. • Basic understanding of analog circuits. • An understanding and knowledge with mixed-mode design and validation. • Through understanding of Design/Verification CAD tools such as ncsim, Design Compiler, Formality, PrimeTime, etc. • Knowledge of TCL or PERL. • Knowledge in non-volatile memory design (NAND in particular) is a strong plus. . Using AI technologies to automate workflows and develop scalable processes that improve design execution. Knowledge of AI applications and tools is highly desirable. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transformin
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Design Engineer, you will build the future of memory by architecting and delivering high‑performance DRAM circuit compositions for advanced technology nodes. In this highly visible technical leadership role, you’ll develop innovation across building, layout, verification, and silicon validation. You will collaborate closely with multi-functional teams to deliver scalable, manufacturable solutions for next-generation memory products. Your work will directly influence performance, power, reliability, and time‑to‑market for Micron’s groundbreaking memory technologies. Responsibilities Design and optimize DRAM circuits spanning digital, analog, and memory core subsystems to meet aggressive power, performance, and reliability targets Develop and refine floorplans, routing strategies, power delivery networks, sense margins, timings, and die‑size tradeoffs Perform advanced circuit simulations using FINESIM, HSPICE, and VERILOG, analyzing speed, power, noise, and long‑term reliability Model parasitics, verify power and signal integrity, and support validation, reticle experiments, and tape‑out revisions Drive simulation‑to‑silicon correlation, identify gaps, and recommend schematic and layout improvements Lead technical reviews, documentation, and best‑practice standardization across design and layout teams Coordinate and manage layout and build resources, tracking breakthroughs and resolving critical path issues S
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