Calibration Engineer I Jobs

The Research Engineer – Mechatronics is a hands-on engineering role within the TaylorMade Research & Development team, focused on the design, prototyping, integration, and validation of electromechanical systems that advance golf equipment and player performance. This role demands deep practical expertise in mechatronics, sensor systems, electronic hardware, wiring, and embedded controls, combined with the ability to develop supporting software and user-facing tools. The ideal candidate is a builder and problem-solver who thrives in a laboratory and prototype environment, producing functional systems from concept through deployment. Essential Functions and Key Responsibilities: Design, prototype, wire, assemble, and test mechatronic and electromechanical systems used in golf equipment evaluation, performance measurement, and product development Develop and interpret wiring diagrams, schematics, and electrical specifications for custom hardware assemblies, test rigs, and IoT-connected devices Select, integrate, and characterize sensors (IMUs, load cells, encoders, pressure sensors, optical sensors, etc.) – including defining operating limits, calibration procedures, and signal conditioning requirements Design and implement IoT systems and wireless data acquisition platforms that capture real-time performance data from equipment and players Develop embedded firmware and control software for microcontrollers and microprocessors (e.g., Arduino, Raspberry Pi, STM32 or similar) to drive test automation and data capture systems Write clean, maintainable code to interface with hardware, process sensor data, and build internal and user-facing applications and interfaces; leverage AI-assisted development tools to accelerate prototyping and automate test routines; apply basic computer vision techni

About the Team DoorDash Labs is an independent team within DoorDash. We explore robotics and automation to transform last mile logistics in the long term. If you have a passion for applying robotics solutions in a service used by millions of people, then we want to talk to you! About the Role We are hiring a Software Integration Engineer for our Platform Integration team. This is a critical role with impact across the robot lifecycle, from manufacturing to daily operation. The Platform Integration team owns making sure the robot works as one cohesive system. The focus is on the interfaces between subsystems; this role in particular is focused on the software side handling interaction between: OS & software stack; firmware; networking; timing; and calibration. In this role, you will work cross functionally with our electrical, hardware, firmware, and autonomy engineers to support new functionality both in both hardware and software. This includes creating provisioning tools, functional tests, and supporting integration into the autonomy software stack. You will report to the Autonomy Platform Lead on our Autonomy Platform Team at DoorDash Labs. We expect this role to be hybrid with some time in-office and some time remote. You’re excited about this opportunity because you will… Play an integral role on a small and focused team. Lead system-level debug when an issue crosses subsystem boundaries or no single team can isolate it. Support early integration of new sensor and software component designs by identifying interface requirements, risks, dependencies and required checks. Design and maintain integration tests, test setups, and procedures to ensure subsystems, once combined, satisfy requirements and design intent. Build and maintain the mission-readiness checks used before manufacturing signoff, validation, field testing, or mission use for different robot platforms. Create the tools, checks, and debug guidance that Manufacturing Integration, Validation,

1891 Signal Integrity Measurement Engineer Location: Austin About the Role Validate signal integrity (SI) and power integrity (PI) for advanced compute platforms, focusing on hands-on measurement, electrical compliance, troubleshooting, and simulation correlation. Key Responsibilities Develop measurement plans and design of experiments (DOE) for board-to-board, cable, backplane, blade-, and rack-level interconnects. Measure scattering parameters (S-parameters), insertion loss, return loss, impedance, crosstalk, eye diagrams, jitter, timing margins, and bit error rates. Design printed circuit board (PCB) test fixtures; perform calibration, de-embedding, and electrical compliance testing against interface specifications and customer requirements. Correlate measurements with simulations and troubleshoot issues with silicon, package, board, and system teams, interconnect vendors, and original design manufacturers (ODMs). Prepare validation and compliance reports covering methods, pass/fail results, performance margins, findings, and recommendations. Required Qualifications Hands-on expertise with vector network analyzers (VNAs), including performance network analyzers (PNAs); time-domain reflectometers (TDRs); bit error rate testers (BERTs); and high-speed oscilloscopes. Strong SI/PI fundamentals and experience with fixture characterization, repeatable measurements, DOE, and electrical compliance testing. Strong written and verbal communication skills for technical reporting and cross-functional collaboration. Bachelor's or master's degree in Electrical Engineering, Computer Engineering, or a related field. Preferred Qualifications Data center or hyperscale hardware experience; Python or MATLAB for measurement automation and analysis; familiarity with simulation tools and thermal or mechanical effects on SI/PI. Tools / Technologies Peripheral Component Interconnect Express (PCIe) generations 4/5/6, Ethernet, Double Data Rate (DDR) memory, serializer/deseria

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. The role We’re in an unbelievably exciting area of tech and are fundamentally reshaping the data storage industry. Here, you lead with innovative thinking, grow along with us, and join the smartest team in the industry. Pure builds the industry’s most innovative, high-performance, energy-efficient and TCO-optimised storage solution. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. We are seeking a highly motivated Hardware Signal Integrity (SI) Engineer for Pure’s Datastore team. In this role, you will own high-speed signal integrity analysis, simulation, and measurement for enterprise SSD platforms. WHAT YOU'LL DO Own signal integrity analysis for SSD hardware from architecture through production. Drive board-level SI decisions, including: PCB material selection, via structures, loss tradeoffs, stackup definition and channel optimization. Perform SI simulations including: Insertion loss (IL), return loss (RL), crosstalk, TDR / impedance profiles. Lead TDR and S-parameter measurements, including: measurement setup, Calibration and de-embedding. Perform 3D-EM extraction and simulation for vias, connectors, and complex channel structures. Correlate simulation results with lab measurements to refine models and design assumptions. Use and customize IBIS and IBIS-AMI models for PCIe, NAND and DD

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Role Summary We are looking for a highly skilled Senior Image Quality Engineer to take ownership of image quality development for our IP camera portfolio. The ideal candidate has deep expertise in camera ISP tuning, 3A algorithm optimization, sensor characterization, and embedded imaging pipelines. This role involves close collaboration with cross-functional teams and offers significant technical ownership. Key Responsibilities Lead end-to-end image quality development for assigned camera platforms. Perform ISP tuning across noise reduction, sharpening, color correction, gamma, HDR/WDR, temporal filtering, and related modules Develop, evaluate, and optimize 3A algorithms (AE / AWB / AF). Conduct both subjective and objective IQ evaluations using lab tools and real-world scenes. Collaborate with firmware, hardware, optics, and product teams to resolve IQ issues and improve performance. Perform sensor analysis, lens shading tuning, black-level calibration, and other calibration tasks. Support ISP integration and optimization on Ambarella and SigmaStar (sstar) SoCs. Build automation scripts and analysis tools using Python or C/C++. Work with manufacturing and validation teams to ensure consistent IQ quality in production. Candidate Profile & Qualifications Bachelor’s or Master’s in Electrical Engineering, Computer Science, Imagi

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE We are seeking a highly motivated Hardware Signal Integrity (SI) Engineer for Everpure’s Datastore team. In this role, you will own high-speed signal integrity analysis, simulation, and measurement for enterprise SSD platforms. WHAT YOU'LL DO Own signal integrity analysis for SSD hardware from architecture through production. Drive board-level SI decisions, including: PCB material selection, via structures, loss tradeoffs, stackup definition and channel optimization. Perform SI simulations including: Insertion loss (IL), return loss (RL), crosstalk, TDR / impedance profiles. Lead TDR and S-parameter measurements, including: measurement setup, Calibration and de-embedding. Perform 3D-EM extraction and simulation for vias, connectors, and complex channel structures. Correlate simulation results with lab measurements to refine models and design assumptions. Use and customize IBIS and IBIS-AMI models for PCIe, NAND and DDR channel analysis. High speed signal eye diagram and margin analysis. Support debug activities where SI is a contributing factor. Perform Power Integrity (PI) simulations. Collaborate cross-functionally with PCB design, system, firmware, mechanical, and test teams to ensure robust SI solutions. Document SI design guidelines and best practices to enable scalable, repeatable designs. Provide technical leadership and mentorship to junior engineers. We are primarily an in-office environment and therefore

Senior Low Observables Design & Integration Engineer - Pole Model Company: The Boeing Company Come join a winning team and support the development of Boeing’s Next Generation Air Dominance (NGAD) platforms. The Boeing Defense, Space & Security (BDS) - Phantom Works organization is seeking a Senior Low Observables (LO) Design & Integration Engineer to lead design and analysis activities supporting the fabrication and test of an RCS pole model. The successful candidate will apply deep expertise in LO materials, integration, manufacturing, computational electromagnetic (CEM) modelling, and test support to design, build and test a representative pole model for an advanced next generation program in the St. Louis region. Key Responsibilities: Lead detailed LO design and integration for the RCS pole model, including material selection, incorporation of advanced technologies, supplier hardware integration. Use computational electromagnetic solvers to model, analyze, and optimize radar cross section (RCS) and scattering behavior across required frequency bands and aspect angles in support of pre-test predictions and diagnostics. Work with Manufacturing to ensure proper alignment between design, analysis and fabrication of LO components. Define and support fabrication processes, QA checks, and build plans for LO skins, coatings, RAM treatments, and attachments; identify and mitigate manufacturability risks, provide LO liaison support to the shop. Develop and execute test plans for RCS characterization (anechoic chamber and outdoor ranges), including instrumentation, calibration, and measurement repeatability considerations. Prepare and execute data processing workflows to reduce, calibr

About the Team Our team builds classification and evaluation systems that give post-training and research teams fast, reliable feedback on model behavior. We combine machine learning and production engineering to make these capabilities accurate, efficient, and useful at scale, helping researchers assess changes and improve models and products. We work closely with research teams to develop useful measurements and make them practical to run. Our work spans classifier development, rigorous evaluation, and efficient production inference, with ownership from initial experimentation through deployment and continued improvement. About the Role We’re looking for a machine learning engineer to develop new classification and evaluation capabilities and bring them into production. You’ll help turn open-ended questions about model behavior into well-defined ML problems, build methods that address them, and establish how reliably those methods work. This role combines traditional machine learning, model evaluation, and real-time engineering. You’ll own classifiers throughout their lifecycle, including supervised fine-tuning, distillation, evaluation, deployment, and production inference. You’ll work closely with researchers to identify valuable problems and with software engineers to make promising approaches useful at scale. In this role, you will: Build, deploy, and operate production classification and evaluation systems that provide useful feedback to post-training and research teams. Optimize production inference, including model serving, batching, caching, throughput, latency, compute utilization, and cost. Train and optimize classifiers using supervised fine-tuning and distillation, validating quality and efficiency before deployment. Own the reliability and observability of deployed classifiers, diagnose production issues, and improve their performance over time. Design rigorous evaluations that assess accuracy, calibration, generalization, and potential measurement bi

For Calibration. Must have calibration background and knowledge. Willing to travel. Address: B-14A, Sector-62,Noida, Uttar PradeshUPINDIA201307 Facility: HLL INFRA TECH SERVICES - WB Qualification: Diploma Experience: 2 - 4 years Source: Sodexo India | Job Code: IJP576542

The Engineer NDT (QA Blade) is responsible for executing non-destructive testing (NDT) on blade components to detect internal defects such as delamination's, voids, and cracks. This role ensures the calibration and maintenance of NDT equipment, analyzes inspection results, supports corrective actions, and conducts re-inspections. The position collaborates with QA and production teams, adheres to NDT standards, and provides training to enhance team skills and maintain compliance with safety and quality protocols. Source: Adani Group | Job ID: 56996

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. About the Role Are you an ambitious engineer ready to take on the challenge of developing world-class test equipment? At Micron, we are searching for an Test Equipment Engineer to join our dynamic team in Gujarat, India. This is an outstanding opportunity to contribute to our mission and work on groundbreaking projects that will craft the future of technology! Key Responsibilities As a Test Equipment Engineer at Micron, you will: Direct and coordinate engineering activities concerned with development, procurement, installation, and calibration of instruments, equipment, and control devices. Coordinate the conditions under which tests are to be conducted and lead all aspects of test operations. Coordinate the operational, functional, and performance phases of tests to ensure flawless execution. Analyze and interpret test data to provide actionable insights and improvements. Prepare detailed technical reports for use by engineering personnel. Qualifications and Experience To be successful in this role, you should have: A Bachelor's degree or equivalent experience in Engineering or a related field. Proven experience in test equipment engineering or a similar role. Strong analytical skills and the ability to interpret complex data. Excellent communication and collaboration skills. Proactive attitude emphasizing problem-solving skills and attention to detail. What We Offer At Micron

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role combines advanced DRAM circuit design with technology development, silicon learning, and yield improvement. We work across Design, Technology Development, Product Engineering, Test, Reliability, Quality, Manufacturing, and other teams to solve challenging memory-design problems and enable future technology generations In this position, you will contribute to the design and optimization of critical DRAM circuitry, including Sense Amplifiers, timing distribution, calibration, and training features. You will influence designs from early process-node development through silicon bring-up and production ramp, using simulation, silicon data, statistical analysis, and automation to improve performance, robustness, yield, and manufacturability Responsibilities: Design, analyze, verify, and optimize memory, logic, and analog circuits, including Sense Amplifiers, timing distribution, calibration, and training features Identify design marginalities and develop circuit- or architecture-level solutions that improve DRAM robustness, performance, scalability, and yield Support new process-node development, qualification, silicon bring-up, yield learning, and production ramp through modeling, simulation, silicon experiments, electrical failure analysis, and statistical analysis Guide layout, parasitic extraction, and modeling activities for Sense Amplifiers and Wordline drivers, including floor planning, placement, routing, signal-margin optimization, and memory-bit interaction Lead technical investigati

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Metrology Overlay Process Development Engineer you will be primarily responsible for starting up, developing, and optimizing the overlay metrology processes used for DRAM photolithography process flows. Overlay metrology is a critical need within the semiconductor industry, and in this position your responsibilities will include, but are not limited to: · Driving the understanding of new metrology technology and measurement techniques to ensure that our overlay measurement capabilities meet the precision, accuracy, and throughput required to meet our device overlay roadmaps · Partnering with metrology equipment vendors on continuous improvement of software/hardware and development of overlay techniques to support lithography process characterization, process optimization, and process control · Optimizing and maintaining the calibration of metrology systems that support our technology development · Working closely with process development and process integration engineers to optimize measurements for multiple device process flows and layer stacks · Developing applications on next generation processes and technologies within Fab 4 and qualification for tech

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Own and drive custom analog and mixed-signal layout for critical LPDDR PHY blocks, including Datapath, bias networks, IO front ends, and reference circuits, ensuring robust operation across PVT, low noise coupling, and high matching accuracy 3-12 years of solid hands-on experience in custom analog and high-speed layout design, with proven expertise in implementing and delivering critical analog blocks and LPDDR/high-speed interfaces at advanced technology nodes Lead high-speed LPDDR (LPDDRx) interface layout execution , solving complex signal integrity challenges such as skew control, impedance matching, shielding, crosstalk mitigation, and jitter sensitivity in advanced nodes Architect and implement scalable array-based layout strategies for DQ/DQS byte lanes, CA lanes, and replica paths, ensuring strict symmetry, pitch matching, repeatability, and multi-channel scalability Drive integration of custom digital and mixed-signal blocks within the PHY (training logic, calibration engines, test/debug circuitry), ensuring optimal clocking, congestion management, and isolation from sensitive analog regions Lead layout-aware co-design with circuit teams , enabling early closure of timing, noise, IR, EM, and parasitic effects, and influencing design decisions from a layout perspective Establish robust power distribution, grounding, and isolation strategies , including guard rings, deep N-well usage, decoupling, and domain separation for

About the Role We are building a new class of clinical-grade AI agents powered by a foundational model that unifies 3D volumetric medical data and textual reasoning . These agents will assist with radiology workflows, treatment planning, case summarization, longitudinal patient analysis, and human-in-the-loop clinical decision support. In this role, you will design the agent layer that transforms a powerful multimodal foundation model into a safe, reliable, adaptive medical assistant capable of analyzing 3D scans, retrieving past cases, explaining findings, and coordinating multi-step reasoning chains. This position is ideal for researchers from multimodal/VLM/CLIP ecosystems who want to move up the stack into autonomous medical reasoning , multimodal alignment, and real-world clinical impact. What You Will Work On Architect LLM-driven medical agents capable of: Reading & interpreting 3D medical volumes (MRI, CT, PET). Answering radiology questions, generating report drafts, and performing differential reasoning. Retrieving similar prior cases using contrastive embeddings. Synthesizing multi-instance evidence across scans, labs, and notes. Executing multi-step “clinical workflows”—image → analysis → summary → recommendation. Integrate clinical agents with the 3D foundation model’s representations, enabling structured medical reasoningand contextual memory across longitudinal data. Develop evaluation frameworks for trustworthiness, interpretability, calibration, and clinical safety. Collaborate with clinicians and scientists to co-design tasks, datasets, and validation protocols. Benchmark models against open and proprietary datasets: MIMIC, CheXpert, MosMed, LiTS, BraTS, and India-specific clinical corpora. Publish findings at top-tier venues (MICCAI, NeurIPS, AAAI, EMNLP). Work with regulatory and product teams to translate research into medically viable systems. Why This Role Appeals to CLIP / VLM / Chitrarth / Patram Authors A rare opportunity to work at the