Computer Systems Validation Analyst Jobs

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role You will work on the systems software strategy and execution that brings new AI silicon from first power-on to a fully integrated system running production-representative models at expected functionality and performance. You will define how software exercises and validates compute, memory, interconnect, and I/O subsystems, then build the diagnostics, automation, and observability needed to find issues quickly. This role sits at the center of silicon, firmware, platform, systems, and workload teams. You will turn hardware specifications and performance targets into an end-to-end bringup plan, drive cross-functional debug, and establish the stress and regression infrastructure that makes each new platform reliable across operating environments. In this role, you will: Contribute to the end-to-end software bringup and validation strategy for new silicon and first-party systems. Define software-driven test coverage across compute, memory, interconnect, I/O, and their system-level interactions. Build diagnostics, test automation, telemetry, and regression infrastructure that accelerate first-silicon learning and issue isolation. Lead bringup from initial silicon arrival through board and system integration, docking, runtime enablement, and model execution. Design stress tests that characterize reliability, performance, and stability across workloads and operating conditions. Translate architecture specifications and performance models into measurable acceptance crit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the Compute and Memory Business Unit (CMBU), driving the innovation behind Micron's next generation DRAM solutions for AI, data center, and client computing platforms. Our team collaborates across product architecture, design, validation, and system engineering to solve complex challenges in bandwidth, power, reliability, and scalability. Together, we help shape the future of memory technology for the world's most demanding compute environments. As a Product Architecture Engineer focused on Signal Integrity (SI) and Power Integrity (PI), you will define the electrical architecture that enables next-generation DRAM products. This highly visible role combines deep technical expertise with system-level thinking to influence product roadmaps, guide design decisions, and partner with industry-leading ecosystem stakeholders. Your work will help deliver memory solutions that power tomorrow's AI and high-performance computing platforms. Responsibilities: Lead SI/PI architecture pathfinding for next-generation DRAM products across AI, data center, and client platforms Define channel, package, board, and module-level SI/PI requirements and design targets for product development Evaluate DDR and LPDDR electrical performance, including timing, jitter, signal margin, crosstalk, impedance, reflections, and power delivery behavior Develop and apply modeling, simulation, and correlation methodologies using industry-standard EDA tools and validation data Partner across design, validation, package,

About the Role We're looking for a Software Engineer to build the systems that treat infrastructure as software. This role owns the software state machines that provision hardware, bring it into service, and manage its full lifecycle — turning racks of GPUs into running inference clusters without a human touching a runbook. The Research and Inference team is your customer: today they file tickets and wait; the target state is that they issue a single API call to stand up, scale, or tear down a cluster, and the system takes care of the rest. The platform is manifest-driven such that teams declare the desired state of a cluster or host — shape, topology, software stack — and the system is responsible for reconciling reality to that manifest, continuously, through every stage of its lifecycle. You will design the engines that manifest the schema, the engines that execute against it, and the workflows that carry a piece of hardware or a cluster from one state to the next—taking it from bare metal to a fully functioning AI cluster for training or inference. You'll write production code which is typed, tested, versioned, and deployed through CI/CD that models infrastructure state and reconciles it, the same way a Kubernetes controller reconciles a cluster's desired state. Success looks like eliminating manual provisioning work, not documenting it better. A product mindset - you've built internal platforms or APIs consumed by other engineering teams and care about the developer experience of what you ship. You build it, you own it. You are not only responsible for delivering the software but also for operating and supporting it in production. Responsibilities Build the provisioning state machine: design and implement the software that models the full lifecycle of a physical host from discovery, inference bring-up to GPU driver/CUDA stack, health validation, and decommission/RMA — as explicit, versioned states and transitions. Build the self-service API: design declarative

Senior: PLN 260,400 - 352,200 Staff: PLN 350,700 - 474,400 Subject to alignment to the responsibilities and duties of the role - we currently have multiple positions available at both Senior and Staff level. Location: Gdańsk. This role is not available as fully remote. About the job Build the AI compute libraries that turn next-generation hardware into real performance. As a Staff Software Engineer, you will design and optimise high-performance compute kernels for AI workloads. You will work across linear algebra, tensor operations, numerical correctness and low-level performance. Your work will help customers get more from advanced AI hardware. That means shaping the libraries behind faster, more reliable AI systems at scale. You will write C++ and Python, profile on Linux and make hard trade-offs across memory, threading and numerical behaviour. You will also guide technical direction, review designs and help engineers make better decisions. This role suits someone who wants deep technical ownership without moving away from hands-on engineering. The team and culture You will join the ML Kernels & Runtime team, which builds the compute libraries that expose hardware performance to customers. The work is technical, detailed and close to the machine. Engineers own problems from design through validation, benchmarking and production quality. Decisions are made through evidence, clear technical reasoning and open debate. You will move quickly, speak up when something can be better and help others raise the quality of their work. Leadership here means taking responsibility for outcomes, not waiting for permission. What we’re looking for Excellent C++ and Python skills, with experience building performance-sensitive software Strong understanding of processor architectures, Linux profiling and low-level optimisation Proven technical leadership, including guiding engineering direction, reviewing designs and mentoring others Ability to balance hands-on implem

Zoox’s Advanced Hardware Engineering team is in charge of delivering all the autonomous hardware, infotainment electronic control units and electrical components that go into Zoox’s future fleet of self-driving vehicles. At the heart of our hardware architecture is the Primary Compute Unit (PCU) - the compute system that runs the AI stack that enables the vehicle to drive autonomously. We are looking for a seasoned technical program manager own the PCU program end-to-end, including the integrated program schedule. In this role, you will work cross-functionally with our vehicle engineering, systems engineering, software, safety, supply chain, quality, manufacturing and integration teams to achieve our strategic objectives and tactical milestones. You will develop project schedules with numerous dependencies, map program milestones to company milestones, flag and mitigate risks, estimate and maintain budgets, identify solutions to complex problems, navigate ambiguity, all the while holding teams accountable and clearly communicating expectations and ongoing progress. As with any startup, we move fast here at Zoox, and many candidates will be asked from time to time to wear many hats. We would love to hear from you if you are up for solving very challenging problems across numerous cross-functional teams, delivering milestones with numerous dependencies, and scaling your impact by developing and adopting structured ways of working. Additionally, if you are an expert at herding cats and influencing without formal authority, then this role was made for you! In this role, you will: Drive the PCU program forward with thought and energetic leadership, including supporting architecture alignment, hardware development, validation, integration, cross-functional alignment and company-wide communication. This will be done in close partnership with the technical lead and other core team members across multiple departments. Work with department le

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Role Summary We are looking for a highly driven Hardware Engineer who is passionate about innovation and eager to build extraordinary products. In this role, you will help design next-generation Storage Server solutions, including high-density NAS, SAN, and unified storage systems with real global impact. You will collaborate directly with R&D labs across multiple countries, bringing your expertise, energy, and creativity into every stage of development. We value engineers who think beyond conventional solutions, embrace new challenges, and consistently engineer reliable, high-performance enterprise storage products. Responsibilities Collaborate with a global cross-functional team—including industrial design, layout, mechanical, SI, BSP, thermal, DQA, and product management—to drive new product development from concept through mass production. Lead or contribute to system architecture for storage servers, owning schematic capture, component selection, and PCB layout review to ensure ultra-high-speed signal integrity and robust high-power design. Design and validate high-density storage backplanes and connectivity solutions (e.g., NVMe/SATA/SAS topologies). Rapidly prototype concept hardware for mock-ups and feasibility studies; take a hands-on role in board bring-up, debugging, testing, and validation.

Perplexity is seeking an Applied AI Architect to help our customers turn Perplexity Computer into working solutions that drive measurable impact. This role is ideal for technical, consultative professionals who have led complex software implementations and can move comfortably between customer discovery, solution design, hands-on delivery, and executive communication. About the role Perplexity Computer is a new class of AI system that navigates tools, interacts with applications, and completes multi-step workflows end to end. Our customers are using Computer to transform work that traditional software has not been able to address. Applied AI Architects work directly with customers across presales, onboarding, adoption, and strategic engagements. You will uncover the real business problem, determine what Computer can credibly support, design and configure the workflow, and lead the engagement to a clear outcome. This is a hands-on, customer-facing role at the intersection of solutions architecture, technical consulting, and program delivery. You will work closely with Sales and Customer Success while serving as a quality filter for requests that require Product or Engineering. What you'll do Lead technical discovery. Work with customer business leaders, technical teams, account executives, and customer success managers to understand the users, current workflow, desired outcome, constraints, and decision-makers. Design credible solutions. Map how people, data, tools, approvals, permissions, and decisions interact, then determine how Computer can support the workflow. Support complex opportunities. Partner with account executives on technical deal strategy, demos, proofs of value, architecture and security coordination, and engagement scoping. Drive value-backed consumption. Identify high-value, repeatable workflows; define the expected business outcomes and usage patterns; and partner with Sales and Customer Success to move customers from technical validation to susta

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role As a Network Deployment and Maintenance Lead within Anthropic's Data Center Operations (DCO) organization, you will ensure the network inside our data halls is brought online and kept healthy across a growing fleet of partner-operated data centers. The scope is the network within and between data halls: the cluster network, management, telemetry, accelerator chip back-end networks, aggregation layer(s), as well as the cabling, optics, and switching around them. On the deployment side, you are engaged during planning and construction, and will be on site during late-stage construction through network delivery and receiving, cabling, integration, turn-up, validation, and acceptance. You will be the on site lead for structured handover of network delivery into production operations. On the maintenance side, you drive the network repair program including: break-fix and ticket flow, vendor RMA, sparing policies, and the SLAs which operations partners execute against. Finally, some of this work touches core networks, where you will partner with Anthropics WAN/Core network team to support campus/DC core network deployment and maintenance activities. This is a program and execution role. You will work with the Global Capacity Delivery Program Leads, the Repairs Program Leads, and the broader Data Center Operations organization to extend network coverage across more sites and platforms as the fleet grows. Expect 50%+ travel: you get eyes on the floor at each site during network delivery, turn-up, QA, and close-out, and at sites where repair performance needs attention. Your authority comes from being on site where you fos

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role Anthropic is building its own servers, racks, and accelerator systems with contract manufacturers and ODM partners, and deploying them across our fleet of data centers. We are seeking experienced engineers to own how well that hardware gets built. As a Product Engineer on the Manufacturing Operations team, you are the technical owner of a product at the factory. During development, you gather manufacturing, test, and yield concerns, get them fixed in the design before each build, and sign off that the product is ready to move to the next stage. Once a product is in mass production, you keep it healthy by delivering engineering changes with minimal disruption, qualifying new components and second-source manufacturers, and root-causing yield and field failures. This is a hands-on role with up to 50% travel to partner factories in the US and abroad. You should be as comfortable debugging a test failure on the line as you are presenting a corrective action plan to leadership. Representative projects Take a new accelerator rack from early evaluation to mass production at an ODM: audit the assembly and test process, set yield targets, confirm test coverage, and approve the transition. Scale manufacturing from one line to multiple and then to a second site or second manufacturer without yield or throughput regressions. Run a cross-functional root cause on field failures traced to a manufacturing gap, drive corrective action with the ODM/CM, and close the loop with the design itself when required. Lead an engineering change across manufacturers: BOM and PLM updates, cut-in planning, partner training, validation, and monitor fie

About Anthropic Anthropic’s mission is to create reliable, interpretable, and steerable AI systems. We want AI to be safe and beneficial for our users and for society as a whole. Our team is a quickly growing group of committed researchers, engineers, policy experts, and business leaders working together to build beneficial AI systems. About the role As a Manufacturing Engineer within the Data Center Infrastructure organization, you will own how Anthropic's servers, racks, and accelerator systems are built at our contract manufacturing and ODM partners. You will design and qualify the assembly, integration, and test processes for each product, bring up new lines and new sites, and drive yield, cycle time, and manufacturing cost once a product is in production. As a subject matter expert in electronics and rack-level manufacturing, you will give the design team early manufacturability feedback, set the process standards our partners build to, and be on the floor when a line is coming up or a yield problem needs solving. If you have built manufacturing processes for complex hardware at a CM or ODM, are passionate about HPC data centers, & enjoy working in complex, fast-paced environments, we welcome you to apply. This is a hands-on role with up to 50% travel to partner factories in the US and abroad. You should be as comfortable addressing issues on the line as you are presenting a vendor improvement plan to leadership. Responsibilities Include: Design and document the assembly, rack integration, and test process for new server and rack products, including work instructions, process flows, takt and cycle time targets, and line layout. Lead new line and new site bring-up at CM/ODM partners, from process validation and capacity verification through pilot builds and release to mass production. Specify, source, and validate tooling, fixtures, and test equipment. Own first-pass yield, cycle time, and process capability in production; run SPC, analyze failure and rework

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Forward Deployed Engineer to own the technical outcome of the AI Hardware systems we build with our customers. You will work alongside customer engineering and operations teams to make complete systems work in production or near-production environments. This engineering role spans hardware and software integration, deployment, validation, automation, debugging, and ongoing operations. You will contribute to customer deployments, establish reliable operating procedures, and drive customer systems through resolution until they work as intended. This role is Hybrid, based out of Tokyo, Japan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You take ownership of customer outcomes in deployed environments through integration, validation, production readiness, and operations. You understand how accelerator compute, memory, and networking topology constrain AI workloads, and don’t treat hardware as a black box. You work directly with customer engineering and operations teams to understand their environment, constraints, and desired outcomes. You’re comfortable debugging across the inference stack, from failing requests, kernel di

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee