Data Center Site Selection Jobs

About Yondr Yondr is a disruptor. We challenge convention and simplify complexity. A global developer, owner operator and service provider of data centers, we deliver complex data center capacity needs for the world’s largest tech companies. Our exponential growth sees us looking for extraordinary people to help accelerate us towards our vision: a tomorrow without constraints. But we can’t do this without you. About the Role With continued growth across our business, we are actively seeking to have a new member join our team. This is an exciting role to join an existing group of skilled development and investment professionals, enhancing the team capabilities and becoming an integral part of a rapidly growing business. We are searching for someone who has excellent quantitative and analytical skills, is comfortable building financial models and has experience with communicating with internal and external stakeholders. You will be a highly valued and trusted member of our ambitious and hardworking team, in a business that continues to scale to new heights. Main Responsibilities / Take responsibility for development and management of financial models and valuation analysis in support of potential transactions and investment opportunities / Support in all aspects of financing processes included due diligence, project management, data room management, financial analysis, legal negotiations and preparation of materials / Work closely with the Development and Finance teams to perform detailed financial analysis on new developments as well as existing portfolio assets / Production of presentation material for senior management, board members, investors, lenders and joint venture partners / Assist with commercial negotiation of legal contracts for transactions / Research and analysis of market trends and sector / asset valuations / Support in business strategy and individual project delivery /

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role OpenAI's Hardware organization builds supercompute platforms from silicon and boards to full rack-scale systems to power advanced AI workloads. This role owns end-to-end quality for high-speed interconnect hardware across the product lifecycle: early design influence, supplier/contract manufacturer readiness, qualification, ramp, and fleet quality in lab and data center environments. You will be the quality lead for advanced interconnect components and assemblies, including high-speed copper cables, cable cartridges, patch panels, backplane/cable-backplane solutions, high-speed connectors, and related electro-mechanical interfaces. You will partner closely with electrical, mechanical, SI/PI, systems, reliability, operations, and external vendors to prevent escapes and drive rapid, data-driven containment and corrective action. In this role you will: Own quality for advanced interconnect components and assemblies: high-speed connectors, high-speed copper cables, cable cartridges (e.g., cable cassette style assemblies), patch panels & optics, and backplane/cable-backplane interconnect solutions. Drive quality-by-design: participate in design reviews, DFM/DFx, tolerance stacks, material and plating selections, connector mating strategy, strain relief, and assembly methods to reduce variation and field failures. Define and track quality and reliability metrics (DPPM, yield, escapes, RMA/FRACAS trends, Cpk/Ppk where applicable) for interconnects across NPI and m

About Yondr Yondr is a disruptor. We challenge convention and simplify complexity. A global developer, owner operator and service provider of data centers, we deliver complex data center capacity needs for the world’s largest tech companies. Our exponential growth sees us looking for extraordinary people to help accelerate us towards our vision: a tomorrow without constraints. But we can’t do this without you. The Role The Critical Facility Shift Technician is responsible for the safe, reliable, and efficient operation of mission-critical infrastructure within the data center. This role covers all aspects of energy isolation, switch activity, and facility rounds, ensuring compliance with safety standards and operational procedures. The Critical Facility Technician reports directly to the Critical Facility Shift Manager and works as part of a larger team that strives for excellence through teamwork and accountability. This is a shift-based role requiring flexibility to work nights, weekends, and holidays as part of a 24/7 operations team. Main responsibilities Operations & Rounds Conduct scheduled and unscheduled facility rounds, inspecting all critical systems (electrical, mechanical, HVAC, fire/life safety, and security) for proper operation and signs of abnormality. Monitor Building Management System (BMS), Electrical Power Monitoring System (EPMS), and other automation platforms for alarms and alerts; respond promptly per SOPs. Maintain accurate logs of alarms, operational events, isolations, and shift activities. Ensure all Statuory PPM workorders are completed ontime and any resulting actions are logged and tracked and remediated in good time . Ensure all Yondr self delivered works are covered by acurate and relevant risk and method statements. Confirm that all contractor RAMS are accurate befor

About the Team The Frontier Systems team at OpenAI builds, launches, and supports the largest supercomputers in the world that OpenAI uses for its most cutting edge model training. We take data center designs, turn them into real, working systems and build any software needed for running large-scale frontier model trainings. Our mission is to bring up, stabilize and keep these hyperscale supercomputers reliable and efficient during the training of the frontier models. About the Role As a Software Engineer on the Frontier Systems team focused on power management, you will work on critical infrastructure to support cutting-edge research. With large-scale supercomputers consuming substantial amounts of power, managing this efficiently is key to maximizing computational capacity. This role is critical to ensuring that our cutting-edge research supercomputing infrastructure runs smoothly, while maintaining reliability and grid-level power stability. Our team empowers strong engineers with a high degree of autonomy and ownership, as well as ability to effect change. This role will require a keen focus on system-level comprehensive investigations and the development of automated solutions. We want people who go deep on problems, investigate as thoroughly as possible, and build automation for detection and remediation at scale. In this role, you will: Develop and implement system-level and software-level solutions to optimize power usage in large-scale supercomputers, ensuring efficient and reliable operations. Build automation to monitor power consumption patterns during training workloads and design algorithms to stabilize these fluctuations, preventing issues with grid reliability. Work with researchers and engineers to design tools for real-time monitoring, detection, and remediation of power-related hardware and system faults. Collaborate cross-functionally to translate complex electrical system requirements into code, while driving continuous improvements in power man

Job Details: Job Description: Responsible for managing the relationship between Intel Data Center and AI (DCAI) and Dell ISG with focus on driving sales strategy of existing Xeon and AI product offerings while expanding Intel design portfolio within Dell's future roadmap to ensure the acceleration of Xeon and AI adoption. Through the design-in process, demonstrate the skills to showcase a quantifiable preference to Intel technology and integrate key learnings into Intel and Dell marketing organizations. The role is critical to establish great relationships and trust with key individuals at Dell and Intel business units and help both companies understand each other's challenges, opportunities to work towards a solution(s) that allows both companies to succeed. The candidate will have enough technical depth to understand the Intel product roadmap, the customer roadmap needs and what the competition is offering and intelligently recommend how to sell the Intel value proposition. Key Responsibilities include: Serve as sales and technical lead for multiple Dell PowerEdge and AI server programs based on Intel Xeon processors and AI accelerators, and collaborate with marketing team to drive complete end-to-end execution. Partner closely with Intel and Dell engineering, product, marketing, and program teams worldwide to align on features, schedules, quality, and issue resolution, ensuring successful product execution. Drive strategic design-win engagements for future Intel Xeon and AI accelerator products, influencing both Intel and Dell roadmaps through deep customer insight, competitive analysis, and early requirements gathering. Act as the primary interface between Intel and Dell, rapidly resolving business and technical issues, managing escalations, and ensuring the highest levels of cus

By submitting your resume, you’re expressing interest in our 2027 RDSS (Research and Development Substitute Services) program. Please confirm your eligibility with the local district office before applying the role. NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU & SOC acts as the brains of computers, robots, and self-driving cars that can understand the world. We are looking for Design Validation Engineer in Taipei for board/system power qualification and function test, responsible for NVIDIA Data Center platform, Graphics board, ARM Based platform and Autonomous Driving Platform. If you're creative and autonomous, we want to hear from you! What you'll be doing: Server/Motherboard/Mobile system functionality test. Clock/Sequency/GPIO signal measurement and verification. WAT (wide area test) function test. Gaming test. High/Low speed interface SI test. Co-work with hardware design engineers on debug and FA. Co-work with mechanical/thermal engineers for cooler/heatsink design. What we need to see: Masters degree in EE, computer science, or relative majors. Proficient with Linux system and GPU setup. Capable of writing simple shell scripts and analyzing test results using commands. Familiar with PC and Datacenter system hardware assembly, MB BIOS upgrade, and network troubleshooting Proficient with a programming language (C/C++, Python, Java, or Perl) Understand UEFI boot OS startup process and out-of-band (

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Position Overview As a Principal Engineer within the Validation Strategy & Test Architecture organization, you will define and drive the future of validation strategy, coverage architecture, and next-generation validation solutions for Micron's Data Center SSD portfolio. This role focuses on identifying validation gaps, developing scalable coverage methodologies, evaluating emerging technologies, and improving validation effectiveness through strategic, data-driven approaches. You will work closely with architecture, firmware, system, product, and validation teams to translate customer requirements, product architectures, field learnings, and technology roadmaps into actionable validation strategies and reusable coverage solutions. The role will also help drive adoption of AI-assisted engineering capabilities, leveraging Generative AI, Large Language Models (LLMs), Agentic AI, and advanced analytics to improve coverage analysis, requirements understanding, engineering productivity, and validation decision-making. Responsibilities Define validation strategies and coverage architectures for next-generation Data Center SSD technologies and customer deployments. Develop scalable validation meth

About the Team The compute infrastructure team runs the GPU fleet and large-scale compute clusters that serve the models backing ChatGPT and the API, while also supporting training workloads for our next generation models. We operate a large, modern GPU fleet and provide a unified platform for other OpenAI teams to seamlessly run production Applied AI and Research training workloads. We seek to learn from deployment and distribute the benefits of AI, while ensuring that this powerful tool is used responsibly and safely. Safety is more important to us than unfettered growth. About the Role You’ll own the hands-on and automation work that brings WAN, fiber, carrier, and cloud-interconnect circuits into service. Partner with network engineers, fiber providers, cloud service providers, colocation teams, and data-center technicians to move each connection from ordered and patched to verified, stable, and ready for handoff. You’ll own Layer 1 troubleshooting and circuit bring-up while building workflows that translate reliable system or model output into precise, approved technician actions, capture field feedback, and drive each connection to a green-port handoff. The right person combines strong physical-networking judgment with practical automation skills: patch-panel and port mappings, optics and light levels, provider coordination, structured operational data, API or scripting workflows, and human-in-the-loop LLM tooling. Responsibilities Own Layer 1 activation and restoration for carrier circuits, dark fiber, wavelengths, Ethernet handoffs, and dedicated cloud interconnects across data centers and points of presence. Reconcile complete A-side/Z-side as-builts: circuit IDs, LOAs/CFAs, carrier demarcations, MMR/ODF/MDF and patch-panel positions, fiber pairs, cross-connects, optics, and device ports. Investigate no-light, low-light, wrong-port, link-flap, and error-rate issues across providers and CSPs; isolate continuity, dirty connectors, polarity, incorrect patching

About the Team The Finance Platform & Technology team at OpenAI builds and scales the future-proof systems and data architecture that power our core financial operations. We enable business agility, compliance, and operational excellence across quote-to-cash, procure-to-pay, inventory, and asset management for both B2B and B2C. Our focus is on modernizing workflows through strategic integrations, scalable automation, and seamless data flows empowering smarter decisions, reliable reporting, and sustainable growth as OpenAI evolves About the Role We are looking for a Supply Chain Transformation Architect to redesign and modernize our end-to-end supply chain operations supporting robotics, consumer hardware, and data center infrastructure. This role sits at the intersection of process, systems, and data. Your primary focus will be transforming supply chain processes across planning, procurement, manufacturing, logistics, and fulfillment—then enabling those processes with the right systems architecture, data foundation, and AI-driven automation. You will help move the organization from manual, reactive operations to intelligent, data-driven supply chain execution. In this role you will: Lead End-to-End Supply Chain Transformation Evaluate and redesign core supply chain processes across demand planning, supply planning, procurement, manufacturing operations, logistics, and fulfillment. Identify operational bottlenecks, fragmented workflows, and manual processes that limit scalability. Build standardized process frameworks and operating models that support rapid scaling of hardware programs. Drive Operational Excellence Implement structured supply chain practices such as: S&OP / Integrated Business Planning Supply risk management Inventory optimization Supplier collaboration frameworks Logistics visibility and execution models Establish operational KPIs and governance to improve predictability, responsiveness, and resilience. Architect the Digital Supply Chain Tra

About the Team The Stargate team is responsible for building the physical infrastructure that powers large-scale AI systems. We design and deliver next-generation data centers optimized for dense compute clusters, advanced networking, and rapidly evolving hardware platforms. This work sits at the intersection of hardware engineering, systems architecture, and infrastructure execution—translating cutting-edge compute roadmaps into scalable, production-ready environments. Our teams partner across silicon vendors, server and storage OEMs, networking teams, and data center engineering organizations to bring new capacity online quickly, reliably, and at global scale. About the Role We are seeking a CPU & Storage Technical Lead to define and drive the server compute and storage architecture strategy for Stargate infrastructure. In this role, you will own technical direction across CPU platforms, memory configurations, local and disaggregated storage systems, and their integration into large-scale AI clusters. You will evaluate vendor roadmaps, lead platform tradeoff decisions, and ensure compute and storage systems are optimized for training, inference, and supporting services. You will work cross-functionally with hardware engineering, performance modeling, networking, supply chain, and deployment teams, as well as external partners such as AMD, Intel, OEMs, ODMs, and storage vendors. This is a highly strategic role for someone who can operate deeply at the component level while also driving long-range infrastructure decisions. Key Responsibilities Own CPU and storage technical strategy for Stargate compute infrastructure across current and future generations. Evaluate CPU platforms across performance, efficiency, memory bandwidth, PCIe topology, cost, and roadmap alignment. Define storage architectures for AI environments, including boot media, local NVMe, shared storage, caching tiers, metadata services, and high-performance data pipelines. Drive server platform de

About the Team OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI. The Compute team works on the design of our AI supercomputers, doing everything from workload modeling to influencing accelerator design. We’re leaning into our partnerships to make system and data center co-design an integral part of this process, and are looking for engineers to design AI supercomputers solutions for data center applications This team is responsible for working with partners to optimize their hardware for our workloads, identifying promising new deep learning accelerators, and bringing those hardware platforms to production. If you’re excited to work at the intersection of cutting edge deep learning, hardware system, and data center design this role is for you! About the Role We’re looking for a Product Reliability Engineer to own reliability engineering for advanced IT hardware, from printed circuit board assemblies (PCBAs) through compute and networking trays, systems, and fully integrated racks. You’ll translate operating conditions and service-life goals into reliability requirements, design and execute qualification tests, and drive failure analysis and corrective-action verification from development through production and field deployment. Working with electrical, mechanical, thermal, manufacturing, quality, and data center teams, suppliers, and manufacturing partners, you’ll use test and field evidence to improve hardware durability, serviceability, and availability. This role

JLL empowers you to shape a brighter way . Our people at JLL are shaping the future of real estate for a better world by combining world class services, advisory and technology for our clients. We are committed to hiring the best, most talented people and empowering them to thrive, grow meaningful careers and to find a place where they belong. Whether you’ve got deep experience in commercial real estate, skilled trades or technology, or you’re looking to apply your relevant experience to a new industry, join our team as we help shape a brighter way forward. Design Coordinator Job Description Position Overview The Design Coordinator supports the design and development process for Data Center project, serving as a key liaison between design teams, clients, project managers, and other stakeholders. This role ensures design projects are executed efficiently, on schedule, and in alignment with client requirements and brand standards. Key Responsibilities Project Coordination & Management The Design Coordinator manages design project timelines, tracks deliverables, and ensures all stakeholders remain informed of project status. They coordinate meetings, prepare agendas, document action items, and follow up on outstanding tasks to maintain project momentum. Design Support & Documentation This role involves organizing and maintaining design files, specifications, drawings, and project documentation. The coordinator ensures all design materials are current, properly archived, and accessible to relevant team members

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. What you’ll be doing: Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units at NVIDIA (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI), all using Cadence PCB design tools. Focus will be on the complete development of CAD layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity. You will be responsible for the design releases required generation of artwork files, ODB++, and electronic PCB documentation. Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations. What we need to see: B.Sc. in Electronic Engineer degree or equivalent experience. 5+ years of experience in high-speed design. Having a detailed knowledge of circuit design and consideration for layout, routing, and timing constraints, DFM, DFA, DFT constraints in volume manufacturing is needed for this role. Be an authority in using Cadence Allegro PCB design tools. Have a deep understanding of High-Density Interconnect PCB layout and PCB Signal Integrity. Knowledge in PCB ma

We are looking to hire a senior CPU Compiler performance Engineer for an exciting and fun role at NVIDIA. We craft outstanding compilers that realise the potential of NVIDIA's CPUs designed for the world's largest AI and computing markets: https://www.nvidia.com/en-in/data-center/grace-cpu/ . Our compiler organisation makes its mark on every CPU, GPU and compute unit that NVIDIA builds. Would you like to be part of this outstanding organisation? We need you to design compiler and hardware software together including developing new technologies to help with hardware software co-design. These compilers are key for the performance of AI, HPC and other performance critical software deployed on NVIDIA Data Centres, on the cloud and at super computing centres around the world. In this role you will solve critical problems working alongside an outstanding engineering team with vision in Compiler technology and systems software, doing what you enjoy! You will also be collaborating with the relevant upstream projects and improving the state of the art If this sounds like a fun challenge, we would be delighted to hear from you!! What you will be doing: Work with a geographically distributed partner organisation to understand, modify and improve CPU Compiler SW at NVIDIA. Analyse AI workloads to champion improvements in both new hardware and compiler toolchain and improve hardware-software co-design. Contribute new features and optimisation techniques targeting NVIDIA CPUs engaging with upstream and open source communities. Develop compiler SW that is optimised for performance. Be part of a team that is at the centre of artificial intelligence, high-performance computing and data centre technologies. Contribute towards the development of next generation compute </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that power artificial intelligence (AI), high-performance computing, graphics, and data-center applications. Our engineers collaborate across global teams to deliver next-generation memory architectures, advanced design methodologies, and innovative semiconductor solutions. As an HBM Design Engineer Intern, you will work alongside experienced memory engineers on the design, development, and validation of advanced HBM products. This role provides hands-on experience with digital design, circuit design, design verification, simulation, and semiconductor development flows while collaborating with Design, Verification, Physical Design, Product Engineering, and CAD teams. Responsibilities Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits using industry-standard EDA tools. Support RTL development, circuit implementation, timing analysis, power analysis, and functional verification activities. Develop scripting, automation, and AI-assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Participate in design reviews, technical discussions, and debugging activities, leveraging AI-enabled analysis to accelerate root-cause identification and engineering decision-making. Document technical work, experimental results, build methodologies, and AI-assisted insigh