Dram Design Technology Layout Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of DRAM Memory array/Peripheral Logic/Analog circuits Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate schematic optimization and design‑space exploration Assist in parasitic analysis, sensitivity studies, and corner coverage Improve debug efficiency across simulation and silicon learning loops Define semicustom methodology for memory design Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. Oversee and manage the layout process including floor-planning, placement, and routing Perform circuit-level verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. Contribute to cross-group communication to work towards standardization and group success Drive innovation into the future memory generations and design methodology within a dynamic work environment Minimum Qualifications Master’s degree in electrical or computer engineering with 15+ years of experience in vlsi design. Strong fundamentals in CMOS circuit design, device physics and memory operation. Proven lea

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description For more than 47 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life for all. Become an Engineer CAD at Micron Technology in Guadalajara. Contribute to innovative memory designs impacting HBM, DRAM, and new technologies. Responsibilities: Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center. Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop advanced capabilities, ensuring the deployment of outstanding practices and methodologies. Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation. applying Artificial Intelligence Minimum Qualifications: Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering. 5+ years of direct CAD or Design experience in mixed

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM design organization, building the test architectures that enable the most advanced memory products in the world. Our team works at the intersection of design, manufacturing, and silicon learning to make 3D‑stacked memory reliable at scale. We thrive on deep technical challenges and close collaboration across disciplines! As an HBM Design Architect, you will define how next‑generation HBM products are tested from wafer to system. This role is critical to ensuring quality, yield, and performance across complex multi‑die architectures. You’ll influence product success early, work hands-on with silicon, and partner closely with design, test, and manufacturing teams. Responsibilities: Define and implement end-to-end DFT architectures for HBM base die and DRAM die Develop DFT strategies for stacked-die, cube-level, and system-level test flows Architect test access mechanisms supporting wafer probe through final test Enable silicon observability for yield learning, debug, and failure analysis Collaborate across design, verification, layout, test, and manufacturing teams Minimum Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts Experience with wafer probe and fin

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solution we create help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while contributing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. Job Description: As a CAD Applications Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, improving EDA and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for the physical layout and design of CMOS integrated circuits. You will work closely with the Design and Layout teams to increase their productivity and work efficiency. Responsibilities and Tasks include, but not limited to: Develop place and route flows at advanced process technology nodes for DRAM designs. Implement advanced methodologies such as hierarchical flow, UPF, and process specific flow customizations to name a few Work with EDA vendors to deploy latest PnR tool or report/track tool issue to resolution. Customize EDA tools and create in house flows to improve the design team efficiency. Work closely with global design teams to support multiple aspects of PnR flow and associated methodolog

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the CMOS Device Integration Team at Micron, where we push the limits of memory technology every day. We work at the intersection of device physics, process integration, and product performance to enable the next wave of DRAM, HBM, and Compute-in-Memory innovation. If you’re excited by challenging technical problems and real-world impact, you’ll feel right at home here! In this role, you’ll serve as a technical leader shaping the future of Micron’s most advanced memory products. As a Distinguished Member of Technical Staff, you’ll drive CMOS device and module development that directly impacts array efficiency, data rates, and product scalability. Your expertise and influence will help guide technology decisions that power AI, high-performance computing, and emerging applications. Responsibilities: Develop and integrate advanced CMOS devices for next-generation DRAM, HBM, and emerging memory architectures Perform detailed electrical characterization of CMOS devices and circuits to drive performance improvements Partner with Design, TCAD, Modeling, Process, Reliability, and Layout teams to deliver integrated technology solutions Provide technical leadership, strategic recommendations, and clear presentations to guide technology direction Minimum Qualifications: Master’s degree or PhD in Electrical Engineering or equivalent practical experience 10 or more years of hands-on experience in advanced CMOS device design and/or integration 1

NVIDIA is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a group of hardworking engineers to develop and architect innovative Memory Solution for Tegra SoCs. In this position, you'll make a real impact in a multifaceted, technology-focused company. You will work with memory controller/PHY and Platform / System architect, Firmware, SI/PI, Memory suppliers to design and architect cutting edge, high speed and lower power memory technology for NVIDIA CPUs and SOCs. What You Will Be Doing: Analyze future DDR/LPDDR/HBM technologies to determine optimum performance, power, function and RAS in memory for Next generation SOC and Systems. Collaborate with ASIC Architects, Designers, Software and Firmware SW/FW teams to drive memory technology and associated requirements for memory controllers. Define Memory module, Package, and PCB layouts appropriate to the system workloads Debug and bring up memory evaluation / validation and failure issues on memory technology. Collaborate with DRAM suppliers and industry partners on to develop memory and memory related component technology. What We need to see: Bachelor's degree or master’s degree in Electrical Engineering, Computer Engineering (CE), or a related field (or equivalent experience) 10 years of proven track record in DRAM design, module design, or memory sub system design. Deep understanding and strong fundamental of memory design, features, ECC algorithm, SI and PI (Training algorithm) in DDR, LPDDR, and HBM. Strong understanding of memory sub system level interaction with Cache, Memory controller and PHY. Experience in the design, bring-up and validation for memory failure analysis Experience with Python, C/C

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Member of Technical Staff HBM Design Architect, you will be responsible for design and development of high-speed interface between DRAM and Base die in HBM cube! This includes designing the DRAM command and control logic, as well serializing and de-serializing scheme. You will collaborate with a highly creative and motivated development team applying brand-new memory technologies to build groundbreaking HBM products! Responsibilities: Responsible for the high-speed DRAM and Base die interface in HBM cube. Design the DRAM command and control logic, as well as serializing and de-serializing scheme at the interface. Conduct circuit simulations using standard industry simulators such as FINESIM, HSPICE and VERILOG Collaborate with data path design on floor planning and full chip testbench. Analyze timing/area/power in high-speed DRAM or mixed-signal design. Contribute to the development of new HBM product opportunities by assisting with the overall design, layout, and optimization of Memory, Logic, and Analog circuits. Qualifications: Extensive experience with DRAM operation and JEDEC specifications across DDR, LPDDR, GDDR, and HBM product families. Strong technical expertise in analog and mixed-signal circuit design. Hands-on proficiency in DRAM command decoding, bank logic, and RAS/CAS chain design. Demonstrated innovation and problem‑solving capabilities in

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Design Technology Co-Optimization (DTCO) team works at the intersection of process technology, standard cell architecture, and design implementation to optimize power, performance, and area (PPA) for advanced memory products. The team collaborates closely with standard cell library, RTL, and physical design engineers to evaluate design tradeoffs and develop methodologies that improve silicon outcomes. As a DTCO Intern, you will gain hands-on experience assessing and optimizing PPA at the standard cell and logic block level. You will use industry-standard place-and-route tools and AI-enabled automation techniques to implement, benchmark, and optimize logic blocks while developing practical skills in physical design, timing closure, and design analysis. Responsibilities Implement standard cell logic blocks using industry-standard physical design tools, including floorplanning, placement, clock tree synthesis (CTS), routing, and optimization activities focused on PPA assessment. Analyze and benchmark power, performance, and area across standard cell libraries and logic block configurations, identifying opportunities for improvement. Perform static timing analysis (STA), investigate setup and hold timing violations, and support timing closure activities. Execute physical verification checks, including DRC, LVS, and IR-drop analysis, and assist with resolving design issues. Leverage Generative AI, AI Assistants, and Agentic AI solutions to automate data collection, reporting, comparison, and w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Are you excited to drive Quality initiatives on new product from Design through Qualification? Collaborating across multi-functional teams to deep dive and actively drive resolution and ensure customer satisfaction in a fast paced and dynamic environment? Innovate and develop Quality and Reliability Strategies and enhancements? All while being part of a fun and supportive team? As a Development Quality Engineer in DEMQRA DQA Design Team at Micron Technology, Inc., your responsibilities will include the following: Work with key development partners in Design, Product Engineering, Technology Development, Quality Assurance and Manufacturing to identify and mitigate potential quality and reliability issues during the Design and pre-qualification phase of new product Identify Design specific risks for new High Performance Memory product and collaborate with the Design, PE, TD and QA teams to ensure correct verification, validation and detection specs are in place to ensure visibility to the status and success of mitigation efforts Drive deep-dive problem solving and mitigation/resolution alignment across the portfolio for DRAM related quality and reliability issues Act as the Subject Matter Expert on Design related quality and Live Die reliability issues and advise Global Quality leadership on risk and mitigation strategies Partner with Design, PE, and QA to align and recommend changes to verification and/or validation flows to ensure they are optimized to meet Micron’s QR nee

Intern - DRAM Design Engineer — Boise, ID - Main Site. Apply via Workday.

New College Grad - DRAM Design Engineer — Boise, ID - Main Site. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As part of Micron's DRAM Verification organization, you will work within a highly innovative engineering team responsible for verifying advanced memory products that power next-generation computing systems. The team develops and validates sophisticated DRAM technologies that require complex functionality verification, ultra-high-speed operation, advanced low-power capabilities, and power management features. As a DRAM Verification Engineering Intern, you will collaborate with global design and verification teams to ensure the quality and functionality of future DRAM products. You will gain hands-on experience using industry-standard verification tools, simulation environments, debugging methodologies, and advanced verification techniques while contributing to real product development efforts. This role also provides opportunities to employ Artificial Intelligence and AI Assisted tools to improve verification efficiency, analysis, and workflow automation. Responsibilities Perform verification activities including datasheet analysis, verification planning, simulation execution, coverage analysis, debugging, and results review. Support modeling and simulation efforts using industry-standard verification and circuit simulation tools. Collaborate with global design, verification, and multi-functional engineering teams to drive standardization, improve design quality, and support successful product development. Contribute to innovation in future memory technologies by applying adva

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's Design-Technology Co-Optimization (DTCO) team plays a critical role in bridging semiconductor device technology and circuit design to enable next-generation DRAM products. The team evaluates emerging technologies, develops methodologies for performance assessment, and contributes to early design enablement activities that influence product power, performance, and area (PPA). Through close collaboration with device, process, modeling, and design engineering teams, DTCO helps guide technology development decisions that shape future memory solutions. As a DTCO Intern, you will gain hands-on experience evaluating advanced DRAM technologies and assessing their impact on future product architectures. You will use industry-standard electronic design automation (EDA) tools, perform circuit simulations and benchmarking, and apply data analysis techniques to support technology development decisions. This position provides an opportunity to work alongside world-class engineers while developing technical skills in semiconductor technology, circuit design, and AI-enabled automation workflows. Responsibilities Evaluate emerging DRAM technologies and analyze their impact on future product architectures and design tradeoffs. Perform transistor-level simulations and circuit benchmarking using industry-standard EDA tools such as HSPICE and FineSim. Develop and utilize Claude AI-based automation workflows and data analysis processes to improve simulation efficiency and engineering productivity. <li

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Design Rules team develops and maintains design rules, methodologies, and automation solutions that enable the successful design and manufacturing of advanced memory technologies. The team partners closely with Design, CAD, Process Integration, Verification, and Product Engineering organizations to ensure technology scalability, design quality, and manufacturing robustness. As a DRAM Design Rules Intern, you will contribute to design rule development, validation, automation, and design enablement activities for next-generation memory products. This role provides hands-on experience with semiconductor build methodologies, industry-standard EDA tools, AI Supported analytics, and multi-functional engineering collaboration while helping drive future memory technology innovation. Responsibilities Assist in the development, documentation, validation, and optimization of semiconductor design rules for advanced memory technologies. Support design enablement activities by developing methodologies, automation solutions, scripts, and workflows that improve design productivity, verification quality, and engineering efficiency. Perform design rule validation, verification, and analysis using industry-standard EDA tools, simulation environments, and AI Supported analytics frameworks. Collaborate with Design, CAD, Process Integration, Verification, and Product Engineering teams to evaluate technology features, process

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where innovation meets excellence. We are advancing memory and storage technologies through collaborative engineering and creative problem-solving. Our team works at the forefront of semiconductor design, developing solutions that shape the future of memory products in a fast-paced, learning-focused environment. As a Design Verification Engineer, you will help develop next-generation memory technologies by verifying and optimizing digital and analog circuit designs. In this role, you will work closely with global multi-functional teams across the product lifecycle to deliver high-quality, manufacturable memory solutions that meet performance, reliability, cost, and customer requirements. Your work will directly contribute to bringing advanced memory products from concept to production. Responsibilities: Verify circuit functionality, reliability, power, and compliance with product specifications Drive verification planning, coverage closure, circuit debug, and design improvements Perform circuit modeling and simulation using industry-standard tools Support silicon validation, reticle experiments, and tape-out activities Partner with engineering, manufacturing, and product teams to deliver manufacturable designs Minimum Qualifications: Bachelor’s degree in Electrical Engineering or a related field 4&#43; years of semiconductor design, verifi