Dram Ip Development Layout Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description For more than 47 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life for all. Become an Engineer CAD at Micron Technology in Guadalajara. Contribute to innovative memory designs impacting HBM, DRAM, and new technologies. Responsibilities: Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center. Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop advanced capabilities, ensuring the deployment of outstanding practices and methodologies. Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation. applying Artificial Intelligence Minimum Qualifications: Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering. 5+ years of direct CAD or Design experience in mixed

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Manufacturing Development Engineering (MDE) Shift Engineer in Wet Etch/CMP/Bond , you will play a critical role in enabling 24/7 process development for next-generation DRAM technologies within the Wet Etch/CMP/Bond Process Areas. This position operates on a 12-hour rotating shift schedule and serves as the primary engineering decision-maker for development activities occurring during off-hours for one of the three listed areas while also supporting the other two areas as needed. You will work closely with Process Development, Process Integration, Equipment Development, Manufacturing, and Shift Operations teams to ensure uninterrupted development execution, increase learning velocity, and support technology roadmap objectives. Unlike traditional manufacturing shift engineering roles, this MDE Shift Engineer operates in a highly dynamic development environment where process conditions, specifications, and experimental flows frequently evolve. This role requires strong engineering judgment to disposition development wafers, make real-time process decisions, troubleshooting process and equipment issues, and appropriately balance execution needs with development objectives. Responsibilities Serve as the primary off-shift engineering decision-maker for development activities, using sound engineering judgment to disposition wafers, release or hold tools, define actions on development targets, respond to process deviations, handle execution risk

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Realtime Defect Analysis (RDA) Yield Technology team supports advanced DRAM research and development by identifying, analyzing, and reducing manufacturing defects that impact yield and product performance. The team partners closely with engineers across R&D and High Volume Manufacturing to improve process stability, accelerate learning cycles, and drive continuous improvement through data-driven decision making. As an RDA Yield Technology Intern, you will gain hands-on experience with innovative semiconductor processing, defect inspection systems, and advanced analytical techniques. You will contribute to projects focused on experimentation, defect detection, data analysis, and process optimization while collaborating with multi-functional engineering teams. This role is ideal for individuals who are passionate about problem solving, root-cause investigation, and leverausingology to improve manufacturing performance. Responsibilities Analyze experimental process flows and defect inspection data to identify anomalies, investigate root causes, and support corrective actions. Partner with R&D and manufacturing teams to improve yield performance through defect detection, process monitoring, and continuous improvement initiatives. Leverage Artificial Intelligence (AI) and data analytics tools to accelerate defect detection, identify yield-impacting trends, automate routine analysis workflows, and generate actionable insights. Use inline defect signals, statistical analys

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. UPWARDSサマーインターンシッププログラムの手続き専用ページです ※求人情報ではありませんので応募できません Applying AI About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_japan@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other paymen

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Intern Product Yield Enhancement (PYE) Engineer at Micron Technology Inc., you will assist in taking next generation DRAM devices from design to mass production! PYE Engineers are crucial partners between Research and Development, Manufacturing, Product Engineering and Global Quality teams. Our goal is to offer hands-on and substantial engineering projects that allow interns to gain valuable experience with memory systems and the product life cycle while adding impact to Micron’s business. Our intern programs help prepare engineers for future roles and offer an extraordinary experience that supplements your academic experience! The PYE Engineering role is critical to Micron as it serves the company's charter to be the most cost-effective producer of DRAM memory while delivering the quality and reliability that customers expect from the Micron brand. This position is for a 3-month internship. Responsibilities: Your job duties will include detailed DRAM electrical and physical failure analysis. Identify defects introduced by the semiconductor fabrication process. You will data mine using statistical analysis, AI assisted engineering tools, and automation workflows. Find the root cause of failure mechanisms, communicating results with Management, Product, Process and Test Engineering teams. Complete 3-month internship. Minimum Qualifications: Must be pursuing a minimum of a bachelor’s degree in Electrical Engineering, Computer Engineering,

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key technical contributor within the High Bandwidth Memory (HBM) Product Engineering – Media Health team, you will play a critical role in driving Media Health manufacturing execution for Micron’s latest next‑generation HBM products, including DRAM die, interface die, and stacked HBM solutions. You will be responsible for Best‑in‑Class HBM product enablement, with direct technical ownership across the core manufacturing KPIs of Quality, Cost, Cycle Time, and Scale. Your contributions will include manufacturing test flow development and validation, device‑ and stack‑level yield improvement, and delivery of optimized extrinsic and intrinsic reliability through deep circuit debug, test coverage optimization, and innovative test strategies. In this role, you will drive manufacturing test time reduction, enhance overall manufacturing efficiency, and contribute to Design‑For‑Test (DFT) strategy development, introducing new ideas that improve cost competitiveness, cycle time, and product quality. You will work closely with cross‑functional partners—including Fab, Product Leads, Design Engineering, Technology Development, and Test Solutions Engineering—to execute both strategic initiatives and tactical deliverables, ensuring continued technology and product leadership. The future of HBM is fast‑moving and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Understand the LPDRAM state machine and develop the hardware models for DRAM features and the related validation test bench. Develop memory controller models, including request scheduling and address mapping to enable new DRAM features. Develop the automation test scripts using Python to improve the overall simulation methodologies. Develop new DRAM technology changes per the spec and the state machine and the validation test bench. Develop system engineering, software engineering, system integration, or distributed system architectures. Identify system data, hardware, or software components required to meet user needs. Communicate with staff or clients to understand specific system requirements. Research, test, or verify proper functioning of software patches and fixes. Provide advice on project costs, design concepts, or design changes. Communicate project information through presentations, technical reports, or white papers. Design and conduct hardware or software tests. Establish functional or system standards to address operational requirements, quality requirements, and design constraints. Evaluate existing systems to determine effectiveness, and suggest changes to meet organizational requirements. Employer will accept a Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field. Position requires: 1. C/C++ or Python; 2. Debugging interfaces, including GDB and PDB; 3. LPDRAM technology; 4. Computer Architecture; 5. Memory controller

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Cloud Memory Business Unit (CMBU) is driving the future of memory solutions for cloud computing, AI infrastructure, enterprise systems, and client platforms. We work across engineering, marketing, finance, and operations to deliver industry-leading DRAM innovations that enable next-generation computing experiences. Our team values strategic thinking, customer focus, and collaboration as we bring advanced memory technologies to market. As Director of Product Management, you will lead the strategy, roadmap, and lifecycle management of a global DRAM product portfolio serving hyperscale cloud, enterprise OEM, AI accelerator, and PC markets. This highly visible leadership role will shape Micron’s position in emerging memory technologies and datacenter LPDDR solutions while influencing product direction through customer engagement, market insight, and technology leadership. You will lead a global team of product managers and serve as a key voice for the business with executive leadership, customers, and industry partners. Responsibilities: Define and execute the multi-year product strategy and roadmap for a global DRAM portfolio Own the full product lifecycle, including product planning, stage gate reviews, and end-of-life decisions Lead cross-functional collaboration to deliver products through Micron’s Product Lifecycle Management (

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities: Contribute to the development of new product opportunities by assisting with the overall Verification Activities of DRAM Design Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: Accelerate verification cycle time Assist in Test-Case/TB and various other components required for DRAM Design Verification Improve debug efficiency across simulation and silicon learning loops Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon block level/full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features Develop and maintain test benches / test vectors using simulation tools and run regressions for coverage analysis and improvements using Agentic AI Flow Participate in simulating, analyzing, and debugging pre-silicon full chip designs by applying leading edge verification technique Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environ

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role As a Member of Technical Staff (MTS) in Micron’s HBM Product Engineering Component Validation team, you will serve as a technical leader and authority for the validation of advanced High Bandwidth Memory (HBM) products. You will apply deep DRAM and HBM architecture and design knowledge to define validation coverage strategy, lead complex product debug and failure analysis, and drive a zero-escape validation mindset across all test modes and product milestones. Operating within Micron’s global validation organization and partnering closely with teams across multiple sites, you will influence design-intent-to-coverage decisions, mentor engineers, and set the technical direction for current and next-generation HBM validation. Responsibilities and Tasks Technical Leadership & Validation Strategy Act as a technical authority for HBM Component Validation, translating DRAM/HBM design intent and architecture into comprehensive validation coverage and test strategy. Define and own validation methodologies and coverage plans across structural (black-box) and functional test flows, driving toward full validation coverage at each product milestone with zero validation escapes. Lead validation definition and closure for new and high-risk product

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. You will join an inclusive, forward-thinking team dedicated to building technologies that power virtual reality, neural networks, and next‑generation computing. In this role, you will own design for test (DFT) solutions for complex high‑bandwidth memory (HBM) system‑on‑chip (SoC) base‑die designs. Your work will directly enable manufacturability, quality, and successful silicon bring‑up across current and future HBM generations. (LLM) Responsibilities will include, but are not limited to: Own SoC-level DFT structures and their implementation. This includes scan, memory built-in self-test (MBIST), logic built-in self-test (LBIST) where applicable, boundary scan (JTAG), and test access architectures for HBM base-die builds. Define and drive DFT architecture early in the design cycle, ensuring alignment with SoC integration, floorplanning, timing, power, and physical design requirements. Implement and integrate DFT logic at block, s

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Principal Physical Design Engineer to provide technical leadership for advanced DRAM digital design implementation and signoff methodologies. This role will drive physical design execution from RTL through tapeout, with a strong focus on timing closure, power integrity, EMIR analysis, and design reliability. The engineer will collaborate across architecture, RTL, implementation, CAD, and technology teams to develop scalable physical design solutions that achieve power, performance, area (PPA), and reliability targets for next-generation memory products. Additionally, this individual will lead methodology innovation, mentor engineers, and influence the future roadmap for physical design and power integrity across the organization. Responsibilities Lead physical design implementation of complex DRAM digital designs, including floorplanning, place and route, clock tree synthesis, timing closure, and tapeout activities. Drive power integrity strategies and signoff methodologies, including PDN planning, IR drop analysis, electromigration (EM) verification, and EMIR signoff. Collaborate with multi-functional teams to resolve timing, congestion, power, signal integrity, and reliability challenges at both block and full-chip levels. Develop and deploy methodology improvements, automation solutions, and guidelines to improve build quality, efficiency, and scalability. Mentor engineers and provide technical leadership while influencing future memory products t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Central Process Integration Engineering (cPIE) Loop Integration team drives process optimization, defect reduction, structural performance improvement, and technology integration across Micron's advanced DRAM and HBM manufacturing network. We are ready for the future! The team serves as the technical owner of critical process loops including FEOL, MOL, CAP, BEOL, Uniformity, and Backside Engineering, partnering closely with Process Engineering, Yield Engineering, RDA, Manufacturing, and Technology Development teams to accelerate yield learning and qualification readiness! Position Overview As a Senior Process Integration Engineer, you will own process loop performance across one or more critical semiconductor manufacturing modules. You will identify process interactions, drive yield improvement, characterize failure mechanisms, and enable successful deployment of new technologies from development through high-volume manufacturing. This role provides opportunities to influence process architecture, conversion strategies, inline monitoring systems, and technology ramp execution while collaborating with global engineering teams across multiple sites. In support of Micron's AI transformation, you will be expected to harness Artificial Intelligence tools and advanced analytics to improve engineering productivity, accelerate problem solving, and enhance process understanding. Responsibilities Drive process loop performance and structural optimization for assigned

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years