Dram Technology Sr Layout Design Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer and Member of the Technical Staff in the Procurement and Operations Central Teams (PROCT) and Advanced Development Team (ADT), you will primarily focus in the early maturity phase of new products as they transition from technology development centers to our high-volume manufacturing sites. Your contributions to our team will support innovation and enable improvements in product yield, quality and cost reduction that are vital to enable our manufacturing strategy. We are looking for outstanding candidates experienced with semiconductor process development/optimization, hardware and supplier management, and an understanding of NAND & DRAM integration to contribute and grow with our organization. Good organization skills and the ability to work independently or in teams is a must and because this role is essential to the success of Micron's products it will require international travel to Micron manufacturing and technology development sites. Your responsibilities include, but are not limited to: Collaborate with Technology Development (TD) on future technology requirements and model of record requirements to ensure manufacturing roadmap is aligned with the forward technology path Partner with TD and Manufacturing on supplier engagement to ensure resources meet Micron's strategic objectives. Collaborate with Manufacturing as new products are introduced to improve performance and enable customer qualification. Connect with co

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer and Member of the Technical Staff in the Procurement and Operations Central Teams (PROCT) and Advanced Development Team (ADT), you will primarily focus in the early maturity phase of new products as they transition from technology development centers to our high-volume manufacturing sites. Your contributions to our team will support innovation and enable improvements in product yield, quality and cost reduction that are vital to enable our manufacturing strategy. We are looking for outstanding candidates experienced with semiconductor process development/optimization, hardware and supplier management, and an understanding of NAND & DRAM integration to contribute and grow with our organization. Good organization skills and the ability to work independently or in teams is a must and because this role is essential to the success of Micron's products it will require international travel to Micron manufacturing and technology development sites. Your responsibilities include, but are not limited to: Collaborate with Technology Development (TD) on future technology requirements and model of record requirements to ensure manufacturing roadmap is aligned with the forward technology path Partner with TD and Manufacturing on supplier engagement to ensure resources meet Micron's strategic objectives. Collaborate with Manufacturing as new products are introduced to improve performance and enable customer qualification. Connect with co

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role is within Micron’s Package Development Engineering (PDE) group, a global organization with teams in the United States, Singapore, Malaysia, China, Taiwan, and India. As a Package Device Product Engineer (PDPE), you will support new DRAM, NAND, or managed NAND (mNAND) products by coordinating resources, test readiness, and analysis throughout the product lifecycle. You will perform data analysis and modeling, create and maintain root cause analysis documentation, analyze parametric, front-end (FE) probe, and back-end (BE) electrical test data, and respond to product failures. Responsibilities and Tasks Enable new BE test signals to capture assembly-related failures. Collaborate with Test Solution Engineering (TSE) and Product Engineering (PE) to ensure standardized test coverage and characterization, define characterization limits, and approve test-related changes. Develop and sustain new out-of-control action plans (OCAPs). Provide lot disposition recommendations based on parametric data observations when out-of-control (OOC) conditions are triggered. Ensure silicon and assembly processes meet product requirements by analyzin

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development organization, focused on building and scaling advanced wet process equipment that enables next-generation DRAM. We work closely with vendors, process teams, and manufacturing partners to bring new tools from concept to production. This team combines hands-on engineering with real impact on performance, cost, and sustainability! This role focuses on developing, optimizing, and sustaining liquid-phase processing equipment for advanced semiconductor manufacturing. You will work across R&D and manufacturing, solve hardware challenges, and drive tools to meet performance and reliability targets. The position offers strong ownership, multi-functional work, and exposure to tool development at scale. Responsibilities: Develop and optimize wet process equipment for advanced DRAM nodes Partner with vendors and internal teams to close hardware gaps Drive installation, qualification, and upgrades of new tools Apply data analysis to monitor tool performance and resolve issues Support process transfer from development to manufacturing Minimum Qualifications: Bachelor’s degree in mechanical, chemical engineering, or related field 3&#43; years of experience in semiconductor equipment or process engineering Knowledge of wet process equipment and semiconductor fabrication Experience fixing spin clean and drying systems Ability to analyze data and define problem statements <div

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology has delivered world‑leading memory and semiconductor solutions. As an HBM Memory Design Engineer on the HBM Architecture Team, you will design, simulate, optimize, and floorplan advanced DRAM circuits for next‑generation High Bandwidth Memory products. You will work across digital, analog, and mixed-signal domains to ensure functional correctness, performance, and power efficiency. Your role includes collaborating with globally distributed teams developing modern HBM solutions for AI and ML applications. Responsibilities • Design, simulate, and optimize DRAM memory arrays, data paths, ECC, command/control logic, and high‑speed interface circuits • Evaluate block‑level and full‑chip functionality and propose solutions to ensure functional correctness • Analyze timing, area, power, and complexity trade‑offs in high‑speed DRAM and mixed‑signal designs • Perform pathfinding and feasibility studies for new architectures and future HBM products • Contribute to the design, layout, and optimization of memory, logic, and analog circuits • Support large‑scale verification, debug, and silicon validation activities • Collaborate across multi-functional teams involved in TSV‑based 3D stacking and vertical integration • Participate in design reviews and drive continuous improvement of design methodologies Minimum Qualifications • BSEE with 7&#43; years or MSEE with 5&#43; years of relevant engineering experience • Strong knowledge of

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an HBM Memory Design Engineer in Micron’s HBM Architecture Team, you will design, simulate, analyze, and floorplan digital and analog DRAM circuits used in advanced HBM technology. You will evaluate block-level and full-chip functionality, perform architectural pathfinding, and contribute to the development of next‑generation high‑bandwidth DRAM solutions. This role works across diverse engineering teams to deliver functionally accurate, low‑power, and high‑performance HBM products by bringing to bear 3D stacking and TSV-based integration. Responsibilities • Design, simulate, and optimize digital and analog DRAM circuits including data path, ECC, command/control, and high‑speed timing structures • Evaluate full‑chip and block‑level functionality and propose solutions to achieve correct circuit and system behavior • Perform timing, area, power, and complexity analysis for high‑speed DRAM and mixed‑signal circuits • Conduct pathfinding studies and feasibility analyses for future HBM architectures • Contribute to the development, layout, and optimization of memory, logic, and analog circuits • Analyze circuit behavior under varying PVT and parasitic conditions to ensure robust operation • Collaborate with multi-functional teams across build, verification, product engineering, process, and packaging • Support design reviews, documentation, and continuous improvement of design methodologies Minimum Qualifications • BSEE with 7&#43; years, or MSEE with 5&#43; years of releva

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. F15 ATE &#xff08; Alpha Technology Engineering &#xff09; Photo エンジニアは、研究開発チームから移管される新技術の量産導入、良品率&#xff08; Yield &#xff09;の向上、サイクルタイム短縮を推進し、関連するすべての部門および DRAM ネットワークと連携しながら成果を創出する役割を担います。 また、 ATE Photo EUV フォトマスクエンジニアとして、最先端リソグラフィ工程で使用される EUV フォトマスクの品質・信頼性・運用健全性を確保する専門エンジニアリングチームの一員として活動します。 プロセスエンジニア、スキャナー装置エンジニア、その他の関係パートナーと密に連携し、フォトマスク認定、コンタミネーション管理、欠陥低減など、 EUV パターニング性能に直結する重要業務を主導します。 この役割は、広島サイト&#xff08; Fab15 &#xff09;における EUV プロセスの安定稼働に不可欠であり、技術調査・改善、データドリブンアプローチ、業務効率化を通じて、 EUV フォトマスクに関連するリスクを プロアクティブに管理すること が求められます。 The F15 ATE (Alpha Technology Engineering) Photo Engineer plays a key role in driving the successful transfer of new technologies from the R&D organization into high‑volume manufacturing, improving yield performance, shortening cycle time, and delivering measurable results through collaboration with all relevant departments and the global DRAM network. As an ATE Photo EUV Photomask Engineer, you will be part of a specialized engineering team dedicated to ensuring the quality, reliability, and operational integrity of EUV photomasks used in advanced lithography processes. You will closely collaborate with process e

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron Technology is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. In this role, you will be responsible for the full RTL design lifecycle—from architecture and implementation through signoff—while delivering designs that meet aggressive power, performance, and area (PPA) targets. This position is in Boise, Idaho, offering strong opportunities for technical leadership, innovation, and collaboration across global teams. Responsibilities Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff. Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements. Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals. Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows. Minimum Qualifications Master’s degree in Electrical Engineering with 8&#43; years of experience, or Bachelor’s degree with 10&#43; years of pre-silicon RTL design experience. Proven ownership of complex RTL/IP development from micro-architecture definition through handoff to physical design. Strong experience with ASIC low-power design methodologies, including UPF-based power inten

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: As a Mixed-Signal Design Engineer in Micron’s Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing, and analyzing high-speed logics to operate the memory. These paths span from the memory array to the interface block for memory technologies, including DRAM and emerging memories. You will work on novel concept development, circuit simulation, optimization, and floor planning to enable groundbreaking memory solutions! Responsibilities: Provide technical direction and design implementation for a memory control circuits (both of digital and analog) from the memory array to the interface block. Collaborate closely with physical design teams to ensure timing closure, CDC robustness, and power intent alignment. Demonstrated experience working with custom mixed-signal IC build and development for volatile or nonvolatile memory technology. Experience with modeling and simulation of ICs using HSPICE/finesim. Minimum Qualifications: Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or related field. 7&#43; years of experience in custom mixed-signal circuit design. Proficiency with UNIX and CADENCE design environment (Simulation, Schematic entry, SPF extraction) </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary This position supports Micron’s DRAM Tester Solutions group, focusing on physical design implementation for processors, controller architectures, and ASICs. The role is responsible for full‑chip and block‑level physical design closure, low‑power implementation, timing, power, and signal integrity signoff, and successful tape‑out across advanced technology nodes. Responsibilities: Lead block‑level and full‑chip physical design including floorplanning, placement, CTS, routing, and tape‑out. Drive timing closure across multiple modes and corners using industry‑standard STA tools. Perform power integrity, IR/EM, and power grid closure to meet signoff requirements. Develop and optimize APR flows, scripts, and methodologies for PPA improvements. Own subsystem or full-chip closure work while coordinating with cross-functional teams. Minimum Qualifications: Bachelor’s degree or Master’s degree or equivalent experience in Electrical Engineering, Electronics, or Computer Architecture. Minimum of 15 years of hands‑on ASIC physical design implementation experience. Proven experience with multiple production tape‑outs in advanced process nodes. Strong expertise in low‑power design techniques including UPF/CPF and multi‑voltage systems. Proficiency in scripting languages such as Tcl, Perl, or Python for flow automation. Preferred Qualifications: Experience with Synopsys and Cadence physical design and ti

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Frontend Central Product Integration Engineering (PIE) team delivers best‑in‑class yield, quality, and cycle time through innovation and strong cross‑functional teamwork. Supporting diverse DRAM and NAND technologies across global development and manufacturing sites (Boise, Japan, and fabs in the U.S., Taiwan, Japan, and Singapore), the team identifies, aligns, and deploys best‑known methods across the network. As a Frontend Central Process Integration Senior Engineer, you will develop and optimize processes to drive rapid product maturity. Join us today and make a difference! Responsibilities and Tasks Drive rapid product maturity, improving yield (bits per wafer), repair density, and DPM through fast learning cycles. Apply deep process integration knowledge across FEOL, MOL, CELL, and BEOL to identify optimal solutions; design and circuit knowledge is a plus. Partner with Yield Engineering, Device, RDA, and Metrology teams to resolve key yield issues and build strong inline visibility for fast ramp and excursion prevention. Identify and standardize best‑known methods and business processes across DRAM and NAND sites. Travel to Micron sites as needed for onsite collaboration. Minimum Qualifications Bachelor’s degree in Engineering or a related field 5&#43; years of experience in process integration, product design, or equivalent technical roles Demonstrated ability to collaborate optimally with global, cross‑functional teams Proven t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. A thorough understanding of semiconductor device physics, process operation, DRAM product specification and product reliability. Responsibilities include but are not limited to the following: rdV, UE_Row, PG, PTS yield improvement Burn dpm and module dpm improvement DL4 enhancement and shift left to probe for coverage MRB case management and postmortem for CAPA enhancement Fab deviation event disposition and hold lot release Product grade yield improvement Wafer level reliability monitoring and shift left to probe for coverage RMA management and analysis for process/probe improvement Problem solving and root cause analysis skills including developing systemic and specific CAPAs for RMA Monitors and drives the quality metrics improvements including, module production fails and RMAs. Monitor Global quality dashboard and report reliability metric not meeting spec and performance Leads the analysis of multiple data sources and ensures appropriate feedback is given to customer Working in collaboration with multiple engineering groups including Process Module Area/RDA/Manufacturing to help identify existing containment action and work towards continuous improveme

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development Group, where we turn advanced materials into manufacturable memory technology. Our thin films teams work at the groundbreaking edge of DRAM scaling, partnering across R&D, manufacturing, and suppliers to enable future nodes. We operate in a fast paced, hands‑on environment where strong fundamentals and execution matter! As a Thin Films Engineer, you will develop and integrate deposition processes that directly enable Micron’s next-generation DRAM! This role owns thin film concepts from early development through high‑volume manufacturing, with a strong focus on EUV patterning films. You will work closely with cross‑functional teams and external partners to deliver robust, scalable processes that meet aggressive technology requirements. Responsibilities: Develop, optimize, and transfer thin film deposition processes for EUV‑enabled DRAM technology Lead process characterization, troubleshooting, and defect reduction through VME Drive thin film roadmap activities aligned to future technology nodes Collaborate with internal teams and suppliers to mature equipment, chemistries, and process solutions Analyze large physical and electrical datasets and communicate clear recommendations Minimum Qualifications: PhD or MS with 4&#43; years of semiconductor experience in materials or process development Strong foundation in materials science, chemical reaction engineering, and thin film physics H

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development Group, where we turn advanced materials into manufacturable memory technology. Our thin films teams work at the groundbreaking edge of DRAM scaling, partnering across R&D, manufacturing, and suppliers to enable future nodes. We operate in a fast paced, hands‑on environment where strong fundamentals and execution matter! As a Thin Films Engineer, you will develop and integrate deposition processes that directly enable Micron’s next-generation DRAM! This role owns thin film concepts from early development through high‑volume manufacturing, with a strong focus on EUV patterning films. You will work closely with multi-functional teams and external partners to deliver robust, scalable processes that meet aggressive technology requirements. Responsibilities: Develop, optimize, and transfer thin film deposition processes for EUV‑enabled DRAM technology Lead process characterization, troubleshooting, and defect reduction through VME Drive thin film roadmap activities aligned to future technology nodes Collaborate with internal teams and suppliers to mature equipment, chemistries, and process solutions Analyze large physical and electrical datasets and communicate clear recommendations Minimum Qualifications: PhD or MS with 4&#43; years of semiconductor experience in materials or process development Strong foundation in materials science, chemical reaction engineering, and thin film physics H

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/tools to improve the work efficiency and help data analysis Co-work with international colleagues on developing new flows and tools for stdcells design Ability to identify stdcells design & char pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Requirements Good understanding of CMOS circuit design Good knowledge of CMOS device physics and layout Experience in total stdcells flow from DTCO development/ spec definition till lib release RTL/GDS flow setup, block level timing analysis, ICC2 experience. Preferred Synopsys EDA flow Finefet & planner experience required. Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. Experience in Primetime, Solido Analytics Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision Experience in Standard Cell design, layout and verification Experience in Skill, TCL, Per