CLEAR is building THE secure identity company of the future. Our mission is to make experiences safer and easier—physically and digitally. With more than 43 million Members and a growing network of partners across the world, CLEAR's secure identity platform is transforming the way people live, work, and travel. Whether it’s at the airport, stadium, or throughout your everyday life, CLEAR unlocks the magic of frictionless experiences. The Regional People Partner, Employee Relations Lead serves as the centralized employee relations partner for our Airport Operations team, with direct, hands-on support for one region. In this role, you're the consistent thread ensuring employee relations issues are handled the same way, every time, no matter where they happen. You're the person leaders lean on to make good calls, and the person team members know is invested in their success. This role puts you in the middle of it all — maintaining oversight across the entire fleet while coaching station leaders, resolving employee relations issues with consistency and fairness across the field, and building an exceptional team member experience that helps CLEAR thrive. What you'll do: Be the go-to People Partner for Operations leaders in your region - the person they call when something's tricky, not just when something's already broken Coach and sharpen station leaders and managers - through training, real feedback, recognition that means something, and just showing up when it counts Own employee and labor relations across your stations: run investigations, dig into root causes, and land on outcomes that are fair and consistent, working closely with Legal along the way Turn employee data, survey results, and what you're hearing on the ground into recommendations leaders can actually act on Partner across People and Operations on the bigger initiatives: onboarding, process fixes, and making sure People practices run the same way at every station Lead timely, thorough, and object
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Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Drive the hardware engineering lifecycle for Everpure’s Hyperscale Line of Business, shaping high-performance, energy-efficient storage architectures tailored directly to hyperscale partners . You will serve as the technical lead bridging customer requirements and internal engineering execution, ensuring custom hardware solutions meet exacting performance and total cost of ownership (TCO) benchmarks . Working closely with cross-functional teams in validation, diagnostics, manufacturing test, and operations, you will lead hardware qualification projects, solve critical escalations, and advance system robustness . This role gives you direct ownership over the hardware that powers next-generation, large-scale data infrastructure . WHAT YOU'LL DO Lead Hardware Qualification & System Hardening: Plan, execute, and automate comprehensive x86 hardware validation cycles—including electrical, signal integrity, and protocol testing—to guarantee system reliability for enterprise hyperscale deployments . Drive Cross-Functional Production Readiness: Partner with operations, manufacturing test, and software diagnostic teams to transition custom storage subsystems into full-scale production, establishing clear test coverage and automated validation workflows . Resolve High-Impact Technical Escalations: Perform root-cause analysis on complex hardware failures and field escalations, using advanced tools like high-speed o
About the team OpenAI’s Forward Deployed Engineering team partners with customers to turn research breakthroughs into production systems. We operate at the intersection of customer delivery and core platform development. About the Role You will define how OpenAI delivers complex systems to customers. You will own how they are built, shipped, and adopted. You’ll translate business outcomes into a technical plan, run day-to-day execution across FDEs, Researchers, and Customer Engineers, and partner with customer teams to ensure delivery supports their goals. You will focus on the Financial Services vertical, partnering with banks, asset managers, and private capital investors to deploy next-generation AI capabilities across their operations, investment processes, and portfolio companies. You will own delivery end-to-end: embedding with Financial Services customers to map workflows and success criteria, ensuring components ship on time, and leading readiness and change management for adoption. You’ll track progress, manage dependencies, make sequencing decisions, and drive 0→1 prototypes through MVP and scale. You will also share field insights with Product and Research to guide roadmap and priorities. Success will be measured first and foremost by impact - deployments that deliver measurable value against customer goals, drive adoption, and become critical to their workflows. Additional measures of success include delivery reliability (milestones hit, low reopen/churn), operating leverage (patterns reused across deployments), judgment under pressure, and product impact (field signal that shifts roadmaps/architectures). This is a high-trust, high-autonomy role. Success requires deep technical project management expertise, extreme ownership of outcomes, and an ability to immerse in customer workflows and partner with customer teams to solve complex engineering problems at pace. This role is based in New York City. We use a hybrid work model of 3 days in the office per w
JLL empowers you to shape a brighter way . Our people at JLL are shaping the future of real estate for a better world by combining world class services, advisory and technology for our clients. We are committed to hiring the best, most talented people and empowering them to thrive, grow meaningful careers and to find a place where they belong. Whether you’ve got deep experience in commercial real estate, skilled trades or technology, or you’re looking to apply your relevant experience to a new industry, join our team as we help shape a brighter way forward. GROWTH ENABLEMENT DIRECTOR JLL Real Estate Due Diligence (JREDD) · Technical Services & Sustainable Operations What this job involves - JLL Real Estate Due Diligence (JREDD) is executing an ambitious multi-year growth strategy — scaling from a stabilized platform to a significantly larger technical services operation across facility condition assessment, environmental consulting, and data collection. The Growth Enablement Director leads JREDD's workforce delivery program — owning the interface between JREDD's multi-year workforce plan, JLL's internal Recruiting organization, and contracted external search partners. The role is responsible not just for filling requisitions, but for building the intake, onboarding, and ramp-to-productivity infrastructure that gets new hires billable faster and keeps first-year attrition low. JREDD’s hiring profile spans credentialed environmental and engineering professionals, high-volume field technicians, and program-driven international deployments — requiring the ability to operate across structured annual-plan recruiting and compressed, post-award demand cycles. This is a founding role. The Growth Enablement Director will stand up the function from scratch in Q4 2026, report to the JREDD Operations Manager, and oversee recruiting and onboarding execution ac
We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary: The Complex Nurse Case Manager is responsible for assessing members through regular and consistent in person or telephonic contact to assess, plan, implement and coordinate all case management activities with members to evaluate the medical and psychosocial needs of the member to facilitate and support the member’s improved health. The Case Manager develops a proactive course of action to address issues presented to enhance the short and long-term outcomes as well as opportunities to enhance a member’s overall wellness. Services strategies policies and programs are comprised of network management and clinical coverage policies. This is a field-based position that requires routine regional in-state travel 80-90% of the time; use of personal vehicle is required. Qualified candidates must have valid KY driver's license, proof of vehicle insurance, and reliable transportation. Travel to the Louisville office is also anticipated for meetings and training. This position is assigned to the Two Rivers Region. Qualified candidates must reside in one of the counties within Two Rivers (Union, Webster, Henderson, Daviess, Hancock, McLean, Ohio, Butler, Edmonson, Hart, Warren, Logan, Simpson, Allen, Monroe, Metcalfe, Barren). Evaluation of Members: Through the use of clinical assessment tools and evaluating information/data review, conducts a comprehensi
Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Associate Product Specialist, Launch Program 2027 - United States Why join Mastercard’s Launch Program? Over the course of this 18-month program, you'll build specialized expertise through hands-on experience, structured learning, and mentorship from industry leaders. You'll work on real business challenges, applying your skills to projects that create meaningful impact. Along the way, you'll deepen your knowledge of Mastercard's business, collaborate with teams across the organization, and develop the technical, analytical, and professional capabilities needed to accelerate your career. By the end of the program, you’ll have a strong foundation in your chosen field and the confidence to continue to grow here at Mastercard. About the team In Product Management, you will have the chance to learn how to develop business cases for new product opportunities, develop scalable customer-centric products, and see those projects through go-to-market. When joining one of our highly collaborative product teams, you will have the opportunity to build and manage great products. We are looking for passionate and talented professionals who share our vision for developing scalable customer-centric products with agility and excellence. What you’ll do As an Associate Product Specialist, y
Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Senior Technical Program Manager 1. Overview This role provides Tier 1 and Tier 2 support for Jira Cloud users across Mastercard programs, ensuring seamless onboarding, issue resolution, and vendor coordination. You will work closely with engineering, product, and vendor teams to maintain operational excellence and drive adoption of Jira Cloud and integrated tools like Aha! and X-ray. 2. Role • Serve as the primary contact for Jira Cloud support , handling Remedy tickets, onboarding queries, and user escalations. • Facilitate onboarding of programs to Jira Cloud, including license validation, test case migration, and user provisioning. • Conduct demos and office hours to guide users through Jira workflows and integrations. • Partner with engineering teams to troubleshoot configuration issues, permission models, and data sync errors between Jira and Rally/Aha • Support CRQ planning and execution for Jira schema updates, field validations, and migration logic enhancements. • Coordinate with vendors to resolve plugin issues, validate architecture diagrams, and ensure compliance with Mastercard’s security standards. • Monitor and clean up orphaned work items, duplicate epics, and initiatives across programs using Domo reports and Confluence documentation. • Maintain Confluence pages for s
NPI Mechanical Quality Engineer Description - As part of the Personal Systems Quality organization, the NPI Mechanical Quality Engineer drives product quality and reliability throughout the NPI product development lifecycle. This role partners with cross-functional teams to evaluate designs, identify and mitigate reliability risks, drive failure analysis and root cause investigations, and implement corrective actions that improve product quality and customer experience. This role provides technical leadership in reliability test development, mechanical design assessment, and Design for Quality and Reliability (DFX) initiatives to ensure high-quality products from concept through production. Strong mechanical engineering expertise, problem-solving skills, and team collaboration are essential for success in this role. *Onsite in Spring office is required 4-days a week Responsibilities: • Provides technical analysis of compute products during NPI Phase through RFQ design proposal reviews, CAD reviews, and DFX product tear downs. • Provides advanced failure analysis, root cause identification, and corrective/preventive actions for reliability concerns and/or issues during development, manufacturing, and field operations. • Proactively addresses customer requests or issues related to mechanical reliability, ensuring timely resolution while liaising with the relevant stakeholders. • Provides consultation to product development architecture teams regarding material component selection, design risk assessment, and associated reliability test plans. • Provides NUD (new, unique, difficult) risk mitigation and test plan development and develops issue prevention. • Actively mentors less-experienced engineers in the field of mechanical reliability and contributes to their growth in the organization. Education & Expe
Job Title Senior Software Technologist I - C++ Job Description Software Engineer II Your Role: • Design, develop, test, and maintain software components and applications using modern C++, C# in a Windows-based environment. • Participate in the full software development lifecycle including requirements analysis, design, implementation, testing, debugging, and maintenance. • Develop and maintain software applications using Visual Studio and associated C++, C# development tools. • Work with Windows operating system fundamentals including processes, services, registry, file system, User Account Control (UAC), and application configuration. • Create, enhance, and troubleshoot software modules while adhering to coding standards, design guidelines, and software development best practices. • Utilize GitHub for source control management including branching strategies, commits, pull requests, merges, rebasing, and code reviews. • Support and troubleshoot CI/CD pipeline issues using GitHub Actions and participate in continuous integration activities. • Manage software dependencies and package management using NuGet and Conan. • Configure and maintain build systems using CMake and Visual Studio project configurations. • Develop and execute unit tests using Google Test (GTest) to ensure software quality and reliability. • Perform debugging, root cause analysis, and defect resolution for software issues identified during development, testing, and field support activities. • Participate in peer code reviews and contribute to software quality, maintainability, and technical excellence. • Collaborate effectively with Software Verification, Product Management, DevOps, Architecture, and cross-functional teams to deliver high-quality software solutions. • Create and maintain
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are a world - class autonomous driving hardware and software development team. We have the best platform and have maintained a leading position in the field of artificial intelligence. Next, we will continue to deepen our efforts in the autonomous driving field and strive to bring sustained growth to our customers. We're looking for a Senior Software Triage Engineer with strong technical ability to deeply understand architectures and strong scripting experience to automate and Triage methodology, and the leadership to encourage our engineering team. As a key member of our automotive group, you'll be working on the real time challenges outstanding to the automotive industry and our automotive products. This is a key role to support AV software agile iteration & development for the release of clients, together working with the engineering teams, understanding the AV stack deeply and providing data-based judgement and delivering high-quality AV software to end customer. What you’ll be doing: Work with Product, Engineering, Model/SW Devs, In-car testing, Fleet teams on test request and triage planning, do live triage with accurate analysis and debugging steps, present top issues by end of day. Deep understand
The DFP Engineer – Manufacturing role defines and implements the validation and screening of new silicon features within high‑volume manufacturing flows. You will translate product requirements into executable test methodologies, infrastructure, and detailed manufacturing test plans that ensure quality, yield, and efficiency at scale. This role sits at the intersection of multiple multi-functional teams to make manufacturing test an outstanding part of the overall codesign and DFP lifecycle. What you will be doing: Own end-to-end manufacturing test methodology across all test stages. Translate system specs and product POR into DFP requirements, test content, coverage, and flows. Define and maintain the DFP roadmap, including infrastructure and turning point planning. Partner multi-functionally to implement test content, debug hooks, and coverage improvements. Drive alignment on manufacturability, test time, binning strategies, and cost vs. coverage trade-offs. Embed testability requirements into design to enable robust screening and debug. Define data and analytics frameworks to support yield analysis and continuous improvement. Lead DFP documentation as the single source of truth and feed findings into future methodologies. What we need to see: MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience) 6+ years in silicon post‑silicon validation and/or high‑volume manufacturing test for complex SoCs, GPUs, CPUs, or similar. Hands‑on experience with test content bring‑up, limit setting, correlation to characterization, and yield/coverage optimization. Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis. <
NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. Whether a high-speed interface trains reliably, maintains accurate margins, and survives every platform topology it will ever see is a question we answer ourselves. This role does that work. The Silicon Co-Design Group leads the boundary between what was designed and what was built. When a GPU, CPU, or SoC ships with interfaces that work at scale, this team is the reason. Most engineers debug within a layer. You will own the full stack. When an interface fails to train, the link margin is unexpectedly tight, or a customer reports a critical silicon issue, you trace the problem through protocol behavior, signal integrity, firmware, platform topology, and silicon marginalities. You then confirm that the fix works. Your methodology shapes how NVIDIA validates high-speed interfaces across generations. Your decisions affect yield, production ramp, and field quality. This is not a coordination role. The engineers who do it well hold protocol depth and system breadth simultaneously, never lose the thread across hardware, firmware, and software, and have the judgment to know when to go deeper and when to act. They are rare. Should that describe you, read on. What you'll be doing: Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness. Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation. Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria f
NVIDIA has been redefining computer graphics, desktop gaming, and enhanced computing capabilities for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As a NVIDIAN, you will work on problems that sit at the boundary of architecture, silicon, firmware, software, and production, where strong judgment matters as much as technical depth. We're the Silicon Design for Productization (DFP) Team, within the broader Silicon Co-Design Group, and we turn power and thermal design into executable productization methodology. Power and thermal are among the most complicated problems we work on at NVIDIA because they sit at the intersection of architecture, workload behavior, silicon variation, firmware policy, platform constraints, and product goals. Small decisions here have an outsized impact on performance, efficiency, reliability, bring-up speed, and ultimately what the product can deliver in the field. We define how features move from concepts to bring-up, characterization, validation, and release. In this role, you will help us build that bridge. We're looking for an engineer who reasons from first principles, flourishes with ownership in a fast-paced environment, and uses AI with sound judgment. What you’ll be doing: Lead the effort across multi-functional teams to keep the program’s power and thermal productization strategy clear, executable, and on track. Create methodology and silicon test plan based controller designs and architecture, including characterization process, debug tools, fuse/firmware settings and lab requirements. Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure. Steward the Power and Thermal playbook when the existing productization methodology
Distinguished Technologist - Principal Architect, Platform Security and Firmware Systems Description - HP is seeking a senior technical leader to serve as a lead architect for hardware rooted Platform Root of Trust for HP's commercial PC platform. In this role, you will be responsible for envisioning, defining, and driving the architecture of hardware, firmware, software, and cloud-integrated security capabilities that protect HP commercial PCs from current and emerging threats. You will also work across the hardware and security architecture teams, collaborate with HP's Security Research Labs, Firmware (BIOS) team, our security business that creates and deploys industry leading enterprise security and manageability solutions, product management, manufacturing, supply chain, customer enablement, and field organizations to create cohesive system solutions that deliver unique customer value. This position requires deep expertise in embedded systems, platform firmware, hardware, security, device manageability, and PC system architecture. The role also requires the ability to translate complex technical capabilities into customer-relevant value propositions and to influence internal and external stakeholders without relying solely on formal authority. Responsibilities Serve as principal architect for HP Endpoint Security Controller roadmap, associated hardware and firmware based capabilities, cryptographic identity, attestation, secure communication, event logging, and future controller generations. Define and evolve HP Sure Start architecture and related firmware resilience capabilities, including hardware-enforced firmware authenticity, recovery, update, and protection mechanisms. Drive secure BIOS and firmware configuration management strategies, including HP Sure Admin ecosystem capabilities, key management, zero-touch provision
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Lead full-chip floor planning, integration, physical implementation, signoff, and tape-out execution. Drive layout implementation of complex analog, mixed-signal, memory, and high-speed interface designs. Own DRC, LVS, ERC, EMIR, reliability, and manufacturability closure. Define and scale layout methodologies, best practices, and execution frameworks. Leverage Artificial Intelligence, Machine Learning, and Agentic AI to improve layout productivity, design quality, automation, and faster decision-making. Drive automation initiatives using AI-assisted design, verification, debugging, and knowledge management solutions. Lead cross-functional and global teams, mentor engineers, and drive technical excellence. Qualifications B. Tech /M. Tech in Electrical Engineering, Electronics, VLSI, or related field. 15+ years of hands-on custom layout experience. Proven success leading full-chip programs from concept through silicon tape-out. Deep expertise in: Analog & Mixed-Signal Layout Memory & High-Speed Interface Layout Full-Chip Floor planning & Integration Signal Integrity, Power Integrity, EM/IR Physical Verification & Signoff Advanced Node Technologies (FinFET/GAA) Strong proficiency with Cadence Virtuoso, Calibre, StarRC, Totem, and related EDA tools. Proven experience leveraging <
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