Hardware Debug And Validation Engineer Jobs

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As an Everpure Hardware Engineer focused on DRAM, you will work with some of the best engineering teams and leaders in the industry. You will own the relationship with suppliers from the engineering side, work with other engineering leads on driving the best RAS capability for DRAM, own DRAM validation from a systems perspective for both new and existing products while continuously improving validation methodologies to ensure best-in-class quality and reliability. In this role, you will stay current with the latest product roadmap, supplier relationships, industry trends, and latest validations tools. You will work with the latest x86 and ARM based CPUs, align with SW teams to drive the latest BIOS and microcode across products. This position works with all the HW teams at Everpure, so you will be the resident expert and go to person for all DRAM related items. This role is part of the HW team so it allows the engineer to delve into other System level validation and design opportunities. WHAT YOU'LL DO Defining test plans and validation for DIMMs from a system perspective Performing hands-on lab characterization of DIMM Modules and interfaces Running stress tests to characterize signal integrity Injecting errors to characterize correct behaviour Using oscilloscopes and logic analyzers as necessary for validation and debug Understanding and ability to debug serial and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Experienced individual contributor responsible for independently accomplishing customer-focused system validation for enterprise and data-center SSD products. Owns end-to-end validation for assigned platforms, contributes to validation planning and test development, applies advanced technical judgment, and provides technical guidance without formal management duties. Responsibilities: • Independently plan and complete customer-specific SSD/system validation cycles and qualification runs. • Set up, configure, and ensure the ongoing validation of environments including systems, firmware, OS, and platform settings. • Analyze validation results, identify failures, and determine next steps including debug and risk assessment. • Develop, extend, and maintain validation test cases, scripts, and automation. • Serve as technical owner for assigned projects, providing mentorship and sharing guidelines across teams. • Applying Artificial Intelligence to improve day-to-day working efficiency Minimum Qualifications: • Bachelor’s degree in Computer science, Electrical/Computer Engineering, or a related field with 6 years of experience in customer, system, or product validation roles. • Strong knowledge and experience with NVMe and PCIe protocols and debugging skills across system, firmware, and hardware domains. • Hands-on experience accomplishing system-level validation in complex hardware/software

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate in root cause analysis sessions and assis

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Post-Silicon Validation Engineer to drive bring-up, validation, and debug of RISC-V–based SoCs. This role sits at the intersection of silicon, firmware, and system software, and requires hands-on lab experience and understanding of SoC architectures. You will own post-silicon validation from first-silicon bring-up through production readiness, working closely with design, pre-silicon verification, firmware, and software teams. This role is hybrid, based out of Austin TX, or Santa Clara CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You are a seasoned post-silicon engineer with 5+ years of experience in SoC bring-up, validation, and silicon debug. You have a strong grasp of CPU and SoC architectures, including RISC-V privilege modes, caches, coherency, and memory systems. You are comfortable debugging complex hardware/software interaction issues using lab tools and low-level software. You thrive in cross-functional environments and enjoy working closely with RTL, firmware, and software teams to solve hard problems. What We Need Lead first-silicon bring-up of RISC-V CPU–based SoCs and execute post-silicon validat

Job Details: Job Description: Position Overview As a Platform Hardware Design Engineer, you will provide technical leadership for the architecture, design, integration, bring-up, and validation of complex platform hardware. You will drive hardware development end-to-end, translating high level system requirements into detailed circuit and component specifications and leading designs from architecture and schematic development through PCB implementation, board power-on, debugging, validation, and delivery. You will be expected to make platform level technical decisions, resolve complex and ambiguous multidisciplinary problems, lead critical design reviews, drive cross-functional alignment, mentor engineers, and influence hardware development practices across projects. Our Business Group You will be joining the Silicon and Platform Engineering Group (SPE), an organization at Intel committed to advancing Intel's mission of delivering world-class silicon and platform solutions. The group focuses on developing integrated systems that align with customer needs and support Intel's broader goals of leadership in technology innovation. SPE collaborates across diverse domains to ensure Intel platforms meet performance, reliability, and scalability requirements. Our work sits at the intersection of silicon, board hardware, firmware, validation, signal and power integrity, mechanical and thermal engineering, PCB technology, manufacturing, and system integration. Our senior hardware engineers have a broader responsibility than executing an individual design. They help establish platform architecture, guide implementation, identify and qualify appropriate hardware solutions, provide technical leadership during board power-on and debug, and lead resolution of schematic, layout, SI/PI, and hardware issues. Key Responsibilities Platform Architecture and End-to-End Technical Ownership

Job Details: Job Description: We are seeking an experienced Senior CPU Debug Engineer to join our dynamic team. As a Senior CPU Debug Engineer, you will play a critical role in the development of our Core CPU, collaborating closely with our Architecture and Design teams, and providing top-notch customer debug support. Our goal is to ensure that Intel CPU Cores are of highest quality and performance, allowing our customers to build the best platforms in the market. Key Responsibilities: Logic Debug: Lead and actively participate in the logical debugging of our Core CPU designs. Analyze and resolve complex logic issues that may arise during the validation process as well in customer field. Collaboration: Partner with Architecture and Design teams to ensure CPU implementation aligns with architectural intent, while driving DFD and DFX methodologies. Customer Support: Act as a technical point of contact for customers, addressing their queries, issues, and debugging requests. Provide timely and effective solutions to customer problems, maintaining strong relationships. Debugging Tools: Develop and maintain debugging tools and methodologies to facilitate efficient CPU debugging. Stay up-to-date with the latest industry standards and tools to enhance debugging capabilities and innovate game changer DFD Continuous Improvement: Continuously identify opportunities for improvement in the CPU debug process,techniques, and tools. Implement process enhancements to increase efficiency and reduce debugging time. Collaborate with Hardware, Software, and Validation teams worldwide to ensure seamless CPU integration and system functionality. Qualifications: Bachelor's or Master's degree in Elect

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent and help bring next-generation AI accelerator technology from silicon bring-up to production. You’ll work at the forefront of hardware innovation, diagnosing complex issues across chips, systems, firmware, and software while collaborating with some of the brightest engineers in the industry. This role offers the opportunity to solve challenging technical problems, build impactful debug solutions, and directly influence the reliability and performance of cutting-edge AI compute platforms. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on hardware debug engineer who thrives on solving complex, cross-functional problems at the intersection of silicon, firmware, and software. A curious and analytical problem solver who enjoys digging into failures, identifying root causes, and driving issues from initial discovery through resolution. An engineer with strong post-silicon validation and bring-up experience who is comfortable working in the lab and getting deep into system-level behavior. Someone who enjoys building tools, improving debug methodologies, and creating

We are looking for a disciplined and dynamic, Lead System Engineer – compute blade and rack Validation to join our growing compute rack validation team. As a diligent leader in Systems Engineering, you will drive multiple aspects of validation throughout the life cycle of the program. In this high visibility position, you will be part of a leading team to innovate and improve system bring-up and enablement abilities, as well as silicon and system validation to deliver the highest quality, industry leading technologies to market. Your technical leadership skills, validation and debug expertise will be necessary towards product development, definition, root cause and resolution. Your agility and collaborative approach will be essential to work within System Validation & other engineering teams (System Architects, SoC and Rack FW etc). The technical leader will be driving keys areas of system validation including leading first silicon & system bring-up (nodes and rack level systems) - rack level systems and blades will be based of ARM server architecture. Candidate will be immersed in challenging system enablement work, system validation (end-to-end) methodology, tests development and execution as well as triage/debug of critical issues to meet critical program milestones at POR quality. The candidate will also be a key contributor to state-of-the-art HW and lab capabilities for Grapchore’s system engineering. The candidate should be able to work in a global environment while maintaining a synergetic culture. Primary Responsibilities: Lead the systemenablement (including first silicon and other FW components) to ensure system capabilities are brought up as per plan of record and system architecture spec. Drive organization wide methodology for Firmware integration and best known configuration (HW/FW/SW) usage model by leading the release of deployment ready solutions. Develop key methodologies, lab HW and system SW capabilit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JOB DESCRIPTION As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. JOB DESCRIPTION As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code that enables the parallel testing of advanced memory devices. Micron Test Engineers support R&D, interacting closely with global teams, as well as taking part in the designing and debugging of test hardware. In this position, you will constantly learn new device specifications and operations in order to develop efficient and innovative solutions of production test flows thru test algo optimization. Additionally, you will take responsibility to gain a firm understanding of the functionality of advanced memory devices as defined in product data sheets. RESPONSIBILITIES AND TASKS: Independency of development of new tests and test algorithms for HBM, which covers test software and hardware requirements, defect coverage, characterization, trending, process flow, and test times. Experienced on test programs development for products using primarily Python and C coding on automated test equipment in the given area followed by test program release to manufacturing area. Be a lead to new product introduction (NPI) as well as pre/post silicon tasks management. Develop test Automation solutions as electrical validation and qualification of new test equipment and tools. Independently debug and identify root causes on test issues and provide solutions across internal/external groups. Provide meaningful statistical data analysis, analytics and justification on program v

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Senior Emulation Engineer Location: India - Remote Job Description: At EnCharge AI, we are building the next generation of AI compute silicon — purpose-built for high-performance, low-power, and scalable AI inference. As an Emulation Engineer, you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape-out. This position is ideal for someone passionate about bridging the gap between hardware and software in fast-paced, deep tech environments. Responsibilities: • Set up and maintain Siemens Veloce emulation and prototyping platforms • Adapt SoC designs for Emulation and Prototyping • Develop and debug emulation testbenches and system-level environments • Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. • Collaborate with design and verification teams to isolate design issues and accelerate debug. • Optimize performance of the emulation workloads and reduce turnaround time. • Work with firmware/software teams to enable use of emulators for OS and driver testing. Required Background: • BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience. • Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium) • Experience with emula

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a Mechanical Design Engineer to lead the development of motor mechanical designs and prototype hardware for advanced robotic systems. You will own stator and rotor mechanical development from early concepts and detailed design through hands-on builds and prototype validation, partnering closely with electromagnetic, electrical, test, and manufacturing teams. This role focuses on the design, integration, and validation of motor components and prototype processes, including laminations, stack assemblies, bobbins, winding interfaces, and fixtures. You will help drive motor development from initial design through repeatable low-volume builds while establishing the tooling, work instructions, and validation practices needed for future robotic platforms. This role is based in San Francisco, CA, and requires in-person presence 4 days a week. In this role, you will Own stator and rotor mechanical designs and released CAD and drawings, including geometry, interfaces, fits, tolerances, retention, assembly access, and mechanical validation. Develop laminations, stack assembly methods, bobbins, and winding interfaces that control alignment, insulation, conductor placement, and end-turn packaging. Design, fabricate, and debug fixtures for winding, stacking, assembly, alignment, and inspection. Build and troubleshoot prototypes. Use measurements, defects, rework, and assembly effort to improve designs and processes. Establish low-volume prototype production with equipment, build sequences, work instructions, revision control, traceability

About the Team The End-to-End (E2E) Feature and Homologation team brings systems engineering focus and discipline to Zoox mobility-as-a-service deployment and operations. We are systems engineers working with key business stakeholders to define and deliver remarkable product capabilities that span across Vehicle, Autonomy, and Operations segments. We partner with the systems teams from each domain by leveraging their deep technical knowledge, implementation expertise, and validation techniques to deliver a fully verified product capability. The result is E2E ownership of a world-class mobility service. About the Role E2E Feature Engineers are the champions of their feature domains, which cut across Vehicle, Autonomy, and Operations segments of the Zoox mobility service. You will be responsible for developing Fail-Operational capabilities of the Zoox mobility service. Through strong relationships with internal stakeholders (Product, Safety, Operations, Legal, etc.) and other systems engineers, you will deliver: design solutions, systems engineering documentation, multi-quarter capability plans, verification plans, and debug support. In This Role, You Will Lead the design of Fail-Operational behaviors while balancing safety, reliability, and operational efficiency. Partner with the functional safety team to identify product risks and quantify fail-operational performance. Own the outcome for the design and implementation of features with Hardware, Software, Operations, IT, Safety, Manufacturing, and Validation teams throughout the entire V cycle. Create and maintain high-quality and verifiable requirements and model-based designs, decomposing input from stakeholders to drive clarity and precision for systems specifications. Lead triage with cross-functional stakeholders for bugs or reported issues. Qualifications 8 years of engineering work experience, alongside a Bachelor's degree in