Hardware Lead Jobs

Instawork is on a mission to create meaningful economic opportunities for skilled hourly professionals in communities around the globe. Our AI-powered labor marketplace helps local businesses scale, and enables global technology companies to push the frontiers of robotics and AI. Backed by world-class investors like Benchmark, Spark Capital, Craft Ventures, Greylock, Y Combinator, and others, we’re looking for exceptional talent to reimagine the way the world works. Instawork’s on-demand labor marketplace is uniquely valuable for robotics and physical AI training. We’re working with leading frontier labs to create the highest-quality, highest-diversity dataset for training robotics foundation models. Instawork Robotics is the human advantage in the robotics revolution, and the Instawork Strategic Projects Lead will be at the center of this cutting-edge data collection effort. Who You Are: An early career professional , with 3+ years of work experience, who thrives in ambiguity and has a "whatever it takes" attitude to get a program off the ground. Someone with a strong sense of ownership , comfortable taking a workflow or program from end to end, rather than just a piece of it, and pushing it forward without being told every step. A strong communicator who can move fluidly between talking to users on the ground, robotics partners, and internal engineering/leadership. An AI-first builder's mindset : when you spot a repetitive or manual workflow, your instinct is to systematize or automate it, using AI tools and scripting where useful. A Problem-Solver who is organized, detail-oriented, and digs to the root of an issue rather than settling for a surface-level fix. A fast learner excited to operate at the frontier of robotics and physical AI, and energized by scaling something from 0 to 1. Nice-to-haves: A degree in a hardware-related field (Mechanical Engineering, Robotics, Electrical Engineering, or similar) Experience with large-scale data collection ope

Graphcore Senior Principal AI SoC Validation (Bring-up lead) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. As the SoC Validation Lead, you will be responsible for enabling pre-production software to run reliably on new silicon quickly and efficiently, before showing that the silicon meets the highest standards of quality, reliability and functionality, ready for production deployment. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Key responsibilities Define and lead post-silicon validation strategy Develop and refine the overall post-silicon validation approach for our AI SoCs, ensuring reliable and timely delivery of validated silicon, architectural correctness, feature robustness, and at-scale system reliability. Drive cross-domain debug and issue resolution Lead investigation and resolution of complex issues spanning silicon, firmware, operating systems, and platform interactions. Ensure that fixes are effective and sustainable. Promote collaboration and shared understanding Work closely with

Citibank, N.A. seeks an Applications Development Tech Lead Analyst for its Tampa, Florida location. Duties: Responsible for source code review to ensure it satisfies good coding practice. Coordinate all communication between tech team and Ab Initio vendor, including scheduling and chairing weekly meetings. Responsible for reconfiguration and reengineering to optimize performance. Design, develop and modify software systems, using scientific analysis and mathematical models to predict and measure outcomes and consequences of design. Prepare reports or correspondence concerning project specifications, activities, or status. Confer with systems analysts, engineers, programmers and others to design systems and to obtain information on project limitations and capabilities, performance requirements and interfaces. Manage the hardware infrastructure and monitor the performance metrices E2E. Identify areas of growth need and proposal scale up activities. Execute on scale up activities by submitting procurement requests, manage regular calls with the deployment team and plan go live/switch activity. Develop shell scripting code base to support the job executions, interactions between systems. A telecommuting/hybrid work schedule may be permitted within a commutable distance from the worksite, in accordance with Citi policies and protocols. Requirements: Requires a Bachelor’s degree, or foreign equivalent in Information Technology, Engineering (any) or related field and 6 years of progressively responsible, post-baccalaureate experience as a Software Engineer, Associate Director – Data Engineering, Senior Consultant, Data Specialist, Assistant Systems Engineer or related position involving gathering new business requirements, architecture, analysis, estimation, design, implementation, and leading a team of software developers and software development. 6 years of experience must include: Experience with AbInitio Data Processing (SME), Data Modeling

About the Team DoorDash Labs is an independent innovation hub within DoorDash, focusing on developing automation and robotics solutions to enhance last-mile logistics. Our mission is to create technologies that support and augment human networks, aiming to improve efficiency for Dashers, merchants, and consumers alike. We are a highly senior team composed of former pioneers from a variety of different robotics industries. If you have a passion for applying AI and robotics solutions in a service used by millions of people, then we want to talk to you! Please Note: This role is based in San Francisco, CA, and requires being in-person 5 days a week. About the Role We are seeking a Senior RF Engineer to join our multidisciplinary team developing mission-critical RF/electrical systems for unmanned platforms.This role offers a rare opportunity to gain deep insight into RF design and validation, contributing across the full product lifecycle, from early concept and prototyping through production. In this role, you will apply deep expertise in electromagnetic theory and wireless system design to ensure autonomous platforms operate with exceptional reliability and precision. You will design, optimize and validate RF / mixed-signal PCBAs with a strong focus on interference mitigation, troubleshoot system-level desense, and leverage a thorough understanding of wireless technologies including LTE, 5G NR, Wi-Fi, GPS, and UWB. You’re excited about this opportunity because you will… Lead the development of innovative solutions that span across RF, Mixed signal and mechanical domain. Design RF hardware as well as wireless testbeds to support system validation, and lead the execution and documentation of system-level design and verification Provide expertise, mentorship to partner teams regarding EMI mitigation strategies, and cross-functional debug processes Characterize EMI caused by internal & external aggressors by tracing root causes using EMC probes

Computer Systems Engineer – Space Payload Emulators – (Experienced or Lead) Company: The Boeing Company Boeing Defense, Space, & Security (BDS) is seeking Computer Systems Engineer – Space Payload Emulators to join the team located in El Segundo, California . As a Computer Systems Engineer , you will support the development and integration of space payload emulators in El Segundo, CA. In support of Boeing Defense Systems next-generation space programs, this role focuses on hands-on hardware/software development for embedded systems (Xilinx SoC/FPGA) and front-end UI/UX control interfaces. This position is tailored for an engineer who thrives in a hands-on lab environment , working side-by-side with multidisciplinary teams (hardware, firmware, software, and test engineers) to bring up hardware, integrate software/logic, and build intuitive emulator interfaces. Position Responsibilities: Embedded Software & FPGA Platform Integration Develop, configure, and maintain embedded software and firmware on Xilinx SoC platforms (Zynq UltraScale+, Versal). Implement and debug Processing System to Programmable Logic (PS/PL) interfaces, AXI interconnects, and memory maps. Develop and validate Board Support Packages (BSP), PetaLinux/embedded Linux distributions, device drivers, and low-level communication interfaces (PCIe, Ethernet, SPI, I2C, UART). Lead hands-on board bring-up, hardware/software integration, and system-level debugging in a lab environment using oscilloscopes, logic analyzers, and protocol analyzers. Front-End GUI & Operator Interface Development Design and implement responsive, reliable front-end graphical user interfa

About Hark Hark is an artificial intelligence company building advanced, personalized intelligence. One that is proactive, multimodal, and capable of interacting with the world through speech, text, vision, and persistent memory. We're pairing that intelligence with next-generation hardware to create a universal interface between humans and machines. While today's AI largely operates through chat boxes and decade-old devices, Hark is focused on what comes next: agentic systems that interact naturally with people and the real world. To get there, we're developing multimodal models and next-generation AI hardware together - designed from the ground up as a single, unified interface for a new era of intelligent systems. About the Role As our first Hardware Technical Program Manager, based at our San Jose office, you'll be the technical leader who takes Hark's devices from engineering builds to mass production. You'll sit alongside our product design, electrical, and systems teams in San Jose, and partner closely with our in-region program manager in Asia to land every build at our contract manufacturers and suppliers. This role is part program leader, part hands-on engineer: you'll own schedules and escalations, and you'll also be on the factory floor driving root causes. You'll help shape how Hark builds hardware and grow the TPM team as we scale. Responsibilities Serve as technical leader for manufacturing operations across final assembly and subassembly sites. Drive build preparation and execution with Hark engineering teams in San Jose and our contract manufacturers. Drive supplier, OEM, and CM selection and qualification: RFQs and SOWs, tooling and capex plans, capability studies, capacity and lead-time commitments, and recovery plans. Partner with our in-region program manager in Asia to land every build: fixture and test readiness, DOE plans and data capture, on-the-floor priorities, and a clean escalation path across the U.S.–Asia time gap. Own factory is

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Join Micron’s SSD Hardware Architecture organization, where we develop the technologies that power next-generation storage solutions. We work across architecture, silicon, firmware, and product engineering teams to deliver high-performance SSD controllers that meet demanding standards for quality, reliability, and innovation. As a Staff SSD Hardware PCIe Engineer, you will play a key role in bringing advanced SSD controller technologies to life. This position offers the opportunity to lead PCIe subsystem validation, debug complex system-level challenges, and influence future product capabilities while collaborating with highly skilled engineering teams across the organization. Responsibilities: Develop hardware and system specifications from architectural and product requirements Lead PCIe bring-up, characterization, debugging, validation, and compliance activities for SSD controller SoCs Par

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. MTS, Interface Pathfinding Hardware Development Engineer About the Role At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next generation of high-speed interfaces. Micron’s Interface Pathfinding team drives performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. As the Interface Pathfinding Hardware Development Engineer , you will own characterization for a high-speed interface test-chip program: the characterization plan and its success criteria, development of the characterization bench hardware and its automation, the measurement-uncertainty budget, and the correlation report proving the silicon matches the models. You will join a small, senior team spanning analog design, layout, digital design, and verification, working closely with the Chip Lead and the Signal Integrity and Physical Design engineers — driving decisions independently while consulting heavily with other experts across Micron. This is a foundational hire for a growing program. Strong execution early is expected to lead to follow-on projects of increasing scope, team size, and characterization complexity — including an expanding mandate for AI-enabled engineering leadership across the organization. What You’ll Own Characterization Planning • Derive the electr

About Us: AI needs a new infrastructure layer. We're building it at Modal. Every era of computing brought new workloads that previous infrastructure couldn't support: mainframes, databases, and the cloud. Each time, the company that rebuilt the layer underneath defined the decade. AI is no different, except it touches everything instead of one slice, and the window to build the layer underneath it is open right now. Our customers include category-defining companies like Lovable , Ramp , Cognition, DoorDash, and Suno. They rely on Modal for instant GPU access, sub-second container starts, and native storage, so it's simple to serve low-latency inference, fine-tune models, and access production-ready sandboxes at scale. We recently raised a $355M Series C at a $4.65B valuation, led by General Catalyst and Redpoint Ventures. We've crossed $300M+ ARR and grown fivefold since September. Our team includes creators of popular open-source projects (e.g., Seaborn , Luig i ), academic researchers, international olympiad medalists, and experienced engineering and product leaders with decades of experience. The Role: We are looking for a strong technical lead to guide the engineers designing, building, and maintaining the novel, high-performance systems that make up our serverless platform. You'll lead the team responsible for Modal's machines layer: the fleet of bare metal and cloud hosts that every Function, Sandbox, and training job runs on, and the control plane that provisions, images, monitors, and repairs them. You'll own the full lifecycle of a machine, from accepting and benchmarking new hardware from a growing set of providers, to network bring-up, kernel and image management, GPU and disk health tracking, and automated remediation of unhealthy hosts. You'll manage a team of 3–8 engineers while staying hands-on across the stack which involves BMCs, firmware, PXE, bootloaders, Linux networking, drivers, and distributed control-plane services, and you'll shape our long-

Job Details: Job Description: The Role and Impact As a Systems and Solutions Engineer, you will drive the design, development, and integration of systems that combine software, firmware, board, and silicon/SoC components to meet specific customer needs. In this role, you will play a key part in defining, implementing, and optimizing solutions to ensure high performance, reliability, and quality across the system lifecycle. Your work will directly impact the seamless functionality and user experience of cutting-edge technologies, enhancing Intel's position in delivering innovative systems to global customers. Business Group You will be joining the Silicon and Platform Engineering Group (SPE), an organization committed to advancing Intel's mission of delivering world-class silicon and platform solutions. The group focuses on developing integrated systems that align with customer needs and support Intel's broader goals of leadership in technology innovation. SPE collaborates across diverse domains to ensure Intel platforms meet performance, reliability, and scalability requirements. Key Responsibilities - Design and develop software, firmware, and hardware solutions that integrate seamlessly across system components. - Lead the definition and implementation of system architecture, translating business opportunities into technical requirements and use cases. - Evaluate technical risk and optimize systems for ease of use, reliability, security, availability, and sustainability. - Drive technical solutions to address customer challenges, deploying systems and conducting benchmarks to validate performance. - Collaborate with cross-functional teams to influence next-generation requirements and solutions, guiding research and academic collaborations as needed. - Conduct lab experiments to simulate real-life environments, analyze prototype performance, and refine system

This is Adyen Adyen provides payments, data, and financial products in a single solution for customers like Meta, Uber, H&M, and Microsoft - making us the financial technology platform of choice. At Adyen, everything we do is engineered for ambition. For our teams, we create an environment with opportunities for our people to succeed, backed by the culture and support to ensure they are enabled to truly own their careers. We are motivated individuals who tackle unique technical challenges at scale and solve them as a team. Together, we deliver innovative and ethical solutions that help businesses achieve their ambitions faster. Senior Partner Solutions Engineer - Hardware Adyen is looking for a Senior Partner Solutions Engineer with a track record of hands-on embedded Android or systems engineering work to own the technical relationship with one or more of our most complex hardware OEM partners. You'll be the primary technical authority on that relationship: root-causing the hardest device-level issues, holding senior OEM engineering counterparts accountable, and shaping how Adyen manages OEM technical relationships as the function grows. As Adyen evolves its hardware offerings and moves toward a hardware independence model, this role carries real weight. Your OEM relationship is one of the more demanding ones in the portfolio, and you're expected to bring judgment and strategy to it, not just execute an existing playbook. What you'll do: Serve as the primary, most senior technical advisor for your OEM's engineering team, leading escalations on the most complex device-level issues. Drive technical strategy for your OEM relationship: which issues to prioritize, which process gaps to close, and how automation and tooling should evolve. Lead cross-functional alignment across Product, Engineering, Hardware Integrity/Reliability, and Commercial on priorities for your OEM, especially when those priorities conflict. Design and drive adoption of tooling, automatio

ABOUT BASETEN Baseten powers mission-critical inference for the world's most dynamic AI companies, like Cursor, Notion, OpenEvidence, Abridge, Clay, Gamma, and Writer. By uniting applied AI research, flexible infrastructure, and seamless developer tooling, we enable companies operating at the frontier of AI to bring cutting-edge models into production. We're growing quickly and recently raised our $1.5B Series F , led by Altimeter Capital, Conviction Partners, and Spark Capital. Join us and help build the platform engineers turn to ship AI products. THE ROLE This role owns Baseten's relationships and market intelligence across hyperscalers and strategic neoclouds, including NVIDIA cloud partners. This is a technical and commercial role in equal measure: you'll evaluate capacity from the GPU to the data center, negotiate cost and terms with suppliers, and stay close enough to the market to develop and defend a real point of view on where it's heading. Given current market conditions, Baseten needs a much stronger pulse on this part of the market so we can track pricing, stay close to the right relationships, and move fast the moment more capacity is needed. This is a senior, experienced hire who will also help pair with and develop 1-2 junior to mid-level teammates covering the same space. WHAT YOU'LL DO Build and maintain deep relationships across hyperscalers and strategic neoclouds (including NVIDIA cloud partners), working each organization from top to bottom rather than a single point of contact Maintain a consistent, "top of mind" presence with key accounts so Baseten is positioned to move quickly when capacity needs arise Evaluate capacity from the GPU to the data center — hardware generation, rack and node configuration, interconnect, power density, and cooling — so you know what a configuration will actually deliver, not just what the spec sheet claims Live in compute pricing daily: track rates by GPU generation, region, and contract term to keep Baseten inf

What you’ll do Act as the in-house electrical lead for Midjourney Medical: own the electrical architecture of the scanner and the technical direction for all board-level design. Own complex board design end-to-end: architecture, schematic capture, layout (high-speed digital, analog/mixed-signal, power), DFM/DFT, fabrication and assembly vendor management, bring-up, and revision control. Write firmware for embedded targets (MCU/SoC): drivers, real-time control loops, safety-relevant logic, bootloaders, and field update paths. Audit and update HDL (FPGA) code for high-throughput data acquisition, timing/synchronization, triggering, and pre-processing of ultrasound and sensor data streams. Define electrical interfaces and data contracts with software, recon/ML and mechanical teams: timing budgets, clocking/sync, signal integrity, connectors/harnessing, and failure modes. Establish electrical engineering rigor: design reviews, schematic/layout review checklists, bring-up procedures, test fixtures, and documentation suitable for a regulated medical device program (DHF, traceability, change control). Mentor and grow the electrical function; select and manage external design partners where leverage is high. What we’re looking for Deep experience designing complex boards from blank page to stable revision, including high-speed digital and analog/mixed-signal domains. Strong schematic and layout skills (Altium/KiCad or equivalent) with real signal integrity, power integrity, grounding, and EMI/EMC instincts. Solid embedded firmware background in C/C++ (and Python for tooling): peripherals, DMA, interrupts, real-time constraints, and debugging on hardware. Practical HDL experience (VHDL/Verilog/SystemVerilog) for data acquisition, timing, and streaming interfaces. Track record of owning bring-up and debug on real hardware: scopes, logic analyzers, and disciplined root-cause analysis. Technical leadership: clear trade-offs, strong written documentation, and the ability to set

itD is seeking a DFT (Design For Test) Lead to drive the implementation and integration of advanced Design-for-Test (DFT) solutions across the silicon development lifecycle, ensuring highly testable, manufacturable, and reliable ASIC designs. The ideal candidate will bring deep expertise in ASIC DFT methodologies, post-silicon validation, and test architecture development, with a proven track record of delivering production-ready silicon through cross-functional collaboration. Location: Hybrid in Carlsbad, CA or Allentown, PA , or U.S. Remote . Candidates must be available to work Pacific Time business hours (9:00 AM–5:00 PM PST). Duration: 14 months We provide comprehensive medical benefits, a 401k plan, paid holidays, and more. Please note that we are only considering direct W2 candidates at this time, as we are unable to offer sponsorship. Responsibilities: Lead the implementation of hardware Design-for-Test (DFT) features, including scan, memory BIST (MBIST), BISR, boundary scan, and DFT simulation setup and debugging. Develop innovative DFT IP in collaboration with cross-functional engineering teams and integrate testability features into full-chip RTL designs. Drive reusable DFT and debug methodologies for next-generation silicon devices, including bare die and stacked die architectures. Perform post-silicon debugging, root cause analysis, and production qualification activities to improve silicon yield, reliability, and manufacturability. Collaborate with physical design, validation, and hardware engineering teams throughout the complete silicon product lifecycle. Design, validate, and release ATPG patterns while supporting manufacturing test readiness and production ramp. Develop technical solutions and resolve complex DFT challenges with minimal supervision while providing technical leadership to the broader engineering team. Internal Responsibilities: Attend regular internal practice community meetings. Collaborate with your itD practice team on ind

About the Team DoorDash Labs is an independent innovation hub within DoorDash, focusing on developing automation and robotics solutions to enhance last-mile logistics. Our mission is to create technologies that support and augment human networks, aiming to improve efficiency for Dashers, merchants, and consumers alike. We are a highly senior team composed of former pioneers from a variety of different robotics industries. If you have a passion for applying AI and robotics solutions in a service used by millions of people, then we want to talk to you! Please Note: This role is based in San Francisco, CA, and requires being in-person 5 days a week. About the Role We are seeking a Senior RF Engineer to join our multidisciplinary team developing mission-critical RF/electrical systems for unmanned platforms.This role offers a rare opportunity to gain deep insight into RF design and validation, contributing across the full product lifecycle, from early concept and prototyping through production. In this role, you will apply deep expertise in electromagnetic theory and wireless system design to ensure autonomous platforms operate with exceptional reliability and precision. You will design, optimize and validate RF / mixed-signal PCBAs with a strong focus on interference mitigation, troubleshoot system-level desense, and leverage a thorough understanding of wireless technologies including LTE, 5G NR, Wi-Fi, GPS, and UWB. You’re excited about this opportunity because you will… Lead the development of innovative solutions that span across RF, Mixed signal and mechanical domain. Design RF hardware as well as wireless testbeds to support system validation, and lead the execution and documentation of system-level design and verification Provide expertise, mentorship to partner teams regarding EMI mitigation strategies, and cross-functional debug processes Characterize EMI caused by internal & external aggressors by tracing root causes using EMC probes