Hbm Hardware Emulation Architect Jobs

DMTS/ Sr.Principal Product Manager, HBM — 3 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Development Team Leader (PDTL) for High Bandwidth Memory you will lead the introduction, ramp and high-volume production success of our groundbreaking products targeted to deliver lowest power per bit solutions in the field of ML(machine learning) and AI (artificial intelligence). PDTLs are the technical program owners and leaders, providing direction and leadership to cross-functional teams, including partners such as business units, quality, test, supply chain, packaging development and manufacturing. The success of a sophisticated product such as HBM relies vastly on PDTLs driving vertical integration of this wide network of partners across the company. This impactful role has a broad scope and will develop your skills working in an inclusive diverse environment of multicultural teams across worldwide geographies! Key Responsibilities include, but are not limited to: Technical Leadership : Lead HBM

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) within Micron's Technology and Products Group (TPG) leads the development of High Bandwidth Memory (HBM) solutions for AI and ML applications. Our modern designs use Through Silicon Via (TSV) technology. We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one package. This new way improves memory density and bandwidth through parallelization. It aims to deliver the lowest power per bit solutions in the industry. As a Static Timing Analysis (STA) Engineer — you will be part of the Heterogeneous Integration Group (HIG), owning chip-level timing sign-off for next-generation die. You will work closely with RTL design, physical design, architecture, DFT, verification, and product teams to ensure timing integrity and drive timing closure across all modes and corners from initial design through tape-out. This is a hands-on senior technical role focused on chip-level STA ownership, constraint authoring, timing closure, methodology development, and pre-/post-silicon timing correlation. Key Responsibilities Responsibilities will include, but are not limited to: Own end-to-end chip-level static timing analysis and sign-off across all checks, modes, corners, and voltage and temperature conditions. Develop, maintain, and validate sign-off quality Synopsys Design Constraints (SDC) for clocks, resets, high-bandwidth memory (HBM) interfaces, design for test (DFT), and configuration logic.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Within Micron’s Heterogeneous Integration Group (HIG), we are driving the next generation of High Bandwidth Memory (HBM) solutions that power advanced computing and AI applications. Our team brings together experts across design, product development, manufacturing, and ecosystem partnerships to solve complex technical challenges and deliver innovative memory technologies. The Design Development Technical Lead (DDTL) plays a critical role in enabling predictable, high-quality execution across the HBM design lifecycle. As the single-threaded technical program owner for HBM Build, you will coordinate cross-functional teams. You will manage technical dependencies and risks. You will provide clear leadership across build, product, and executive collaborators to ensure successful program delivery. Responsibilities: Lead end-to-end execution of HBM build achievements across DRAM, base die, test vehicles, interposers, IP, and sustaining development efforts Drive multi-functional alignment, manage dependencies, and maintain execution plans to achieve schedule, cost, and quality objectives Lead governance activities including design reviews, program reviews, risk management, and change control processes Partner with foundries, IP vendors, contractors, and procurement teams to resolve execution challenges and support design delivery Own roadmap communication, executive reporting, and collaborator alignment for HBM build programs Minimum Qualifications: Bachelor’s degree in Electri

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We define ESD and latch-up architecture for next-generation HBM products across advanced nodes and 3D integration. Our team works across device, circuit, and packaging domains to solve reliability challenges that directly impact product quality. We take on complex problems and turn them into scalable solutions that enable high-performance memory! As an SMTS/DMTS HBM ESD/Latch-Up Architect, you will define protection strategies across base die, DRAM stacks, and interconnects. This role shapes product reliability from early architecture through silicon validation. You will work across teams and influence technical direction while solving system-level ESD challenges. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define end-to-end ESD and latch-up architecture across base die, DRAM die, and interconnects Develop protection strategies for high-speed I/O, TSV interfaces, and advanced packaging Establish ESD/LUP standards, rule decks, and signoff criteria Drive correlation between d

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Engineering Execution Lead/Manager in the HBM HIG organization you will be responsible for guiding a HBM product through different phases of a product i.e. concept, build, NPI and HVM by facilitating multi-functional life-cycle management. You will help build and maintain a detailed development schedule and guide the vital tactical progress. In this position, you will provide leadership and direction for the Product Development Team (PDT) by defining and prioritizing projects, identifying, and analyzing issues and risk, and identifying resources to meet timelines and work you're doing. Responsibilities: Integrate all aspects of HBM development within the extended HIG and TPG teams and with partner organizations. Partner with the Technology Development, Build, Process, APTD, PE and Manufacturing teams to drive development progress and alignment. Collaborate with PMO org to build and sustain a detailed development schedule and drive relevant tactical execution starting from pre-silicon to all the way to HVM. Provide regular communication of development status, priorities, and challenges across the broader organization. Set and prioritize tactical expectations across development activities, according to defined achievements and collaborator needs and expectations. Serve as a point of contact for the product, including identifying owners for tasks and issues that require coverage and leading development documentation. Consolidate a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a build Engineer at Micron Technology, Inc., you will be responsible for crafting and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. You will contribute to the design and delivery of next‑generation memory products by working across circuit design, layout, and validation. You will apply simulation, modeling, and verification skills to improve design quality and manufacturability. You will coordinate with multi-functional partners to support tape‑out readiness and future technology scaling. This role offers hands‑on impact across the full semiconductor design flow. Responsibilities Contribute to new product opportunities by supporting overall circuit design, layout, and optimization for memory and logic or analog circuits. Perform parasitic modeling and support design validation, including reticle experim

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Principal Layout Designer in the Next-generation HBM Architecture Team , you will drive layout for 3D-stacked, high-performance memories. Apply your knowledge to deliver high-quality layout designs across analog and/or mixed-signal domains in collaboration with peer architecture, design, and packaging teams. Implement layout designs for early architecture concepts to demonstrate feasibility and identify optimizations. Responsibilities: Design layouts for critical analog and mixed-signal blocks. Drive exploratory layout process for next-generation architectures, including floorplanning, placement, and routing. Integrate full chip designs and perform layout verification (LVS, DRC), quality checks, and documentation. Collaborate and communicate across domains, including signal integrity, architecture, design, and advanced packaging, to ensure successful architecture exploration. Minimum Qualifications: Hands-on layout experience with critical analog blocks and full designs. Experience with Cadence VLE/VXL and Mentor Graphics Calibre DR

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s Memory Systems Engineering team and contribute to the development of premier digital and mixed-signal foundations for our high-bandwidth memory (HBM) products. This position offers an outstanding chance to work intimately with multiple engineering areas, guaranteeing the smooth integration and implementation of HBM base die. Join a motivated team committed to delivering robust first-pass silicon that meets our strict bandwidth, latency, power, and reliability objectives! Responsibilities Assist in defining and carrying out digital micro-architecture for HBM base-die subsystems, covering channel support logic, boot and initialization sequencing, training orchestration, configuration and status registers, telemetry, performance counters, and reliability features. Translate system requirements into timing, power, and area considerations by partnering with physical layer and system architects, and help maintain interface specifications for bus protocols, clock-domain crossings, and reset strategies. Implement and integrate synthesizable SystemVerilog RTL, including multi-channel logic, interrupts, events, register maps, scan hooks, and design-for-test interfaces, while supporting clean integration and ECO flows. Collaborate with design verification teams to support verification planning, coverage goals, CDC/RDC checks, and debugging of RTL, testbench, and gate-level issues. Support silicon bring-up and post-silicon validation through debug enablement, issue correlation to RTL or architecture, and col

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role is part of the Customer Engineering Technical Leadership function within HIG PSE. The Customer Integration Engineer will focus on technical engagement across product development, system architecture, develop, front-end and back-end process, Package Failure Analysis, Qualification, and Test. The successful candidate will have expertise in one of these subject areas and a strong appetite to learn others on the job. This position emphasizes hands-on technical problem-solving, working with multi-functional groups, and enabling successful integration of advanced HBM products into customer systems. Responsibilities: Apply deep technical knowledge across one or several domains such as product engineering, system engineering, building, front-end/back-end process, PFA, qualification, or test. Support integration of customer requirements into internal design and manufacturing processes. Participate in technical reviews, debug sessions, and failure analysis activities. Work closely with internal teams across build, product engineering, and manufacturing to resolve technical challenges. Assist in yield improvement and qualification efforts tied to customer programs. Minimum Qualifications: Bachelor’s or Master’s degree or equivalent experience in Electrical Engineering, Mechanical Engineering, Materials Science, or related technical field. Hands-on experience in one or more areas: product development, sys

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Senior Verification Engineer and contribute to modular, scalable verification solutions for next-generation HBM DRAM products! You will work independently within a multi-functional team of technical domain experts, spanning both IP-level and SoC-level verification. You will collaborate with Design Engineering, Product Engineering, and Business Units to complete the HBM verification roadmap. You will apply your solid understanding of testbench architecture, custom or SoC verification methodologies, and 2.5D & 3D package integration to evaluate issues, define solutions, and broaden your expertise. Responsibilities: Develop and implement verification plans and architecture collateral across IP-level and SoC-level verification for current and future HBM designs Support co-verification of the overall system and participate in customer interactions to gather feedback and provide recommendations for future HBM solutions Build and improve verification methodology components and GenAI applications aligned to HBM design cycles, broadening cross-disc

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities: Reliability Test Flow Development: Define and develop reliability stress, test flows and test plans to cover all Product Reliability aspects. Reliability Test Plan and Execution: Work closely with Global Quality team to define qualification plan, review and manage the qualification execution progress, and drive for qualification gating issue resolution. DPM reduction : Drive down and achieving Extrinsic Reliability (Time 0 and Field DPM) and Intrinsic Reliability through Optimized Manufacturing Test Flows and Test Strategy to meet critical KPI’s Quality, Cost and Cycle Time Root Cause and Resolution of Qual and RMA Device Issues pertaining to defectivity and intrinsic reliability: Debug and identify root cause and failures in reliability tests by electric failure analysis(EFA) and Physical Failure Analysis (PFA) and drive for resolution and improvements through cross functional team collaboration. Process Conversions and HVM: The role involves providing recommendation to fab teams for new process conversions to reduce cost, increase yields. This is critical as it directly impacts the yield, quality, reliability, and performance of HBM products, which are key components in many modern technologies.</li

Senior/Staff/Principal Engineer, HIG-HBM Product System & Engineering (Media Health Reliability Coding) — Fab 10A, Singapore. Apply via Workday.

Senior/Staff/Principal Engineer, HIG-HBM Product System & Engineering (Media Health Manufacturing) — Fab 10A, Singapore. Apply via Workday.

Sr Manager, High Bandwidth Memory (HBM), Product Development Team Leader — Fab 10A, Singapore. Apply via Workday.