Hbm Mtb Ai Jobs

HBM IO Architecture, Principal Engineer — Richardson, TX. Apply via Workday.

HBM ENGINEERING SUPPORT TECHNICIAN — Taichung - AATT, Taiwan. Apply via Workday.

HBM ENGINEERING SUPPORT TECHNICIAN — Taichung - AATT, Taiwan. Apply via Workday.

HBM Customer Systems Validation Engineer — Taichung - Fab 16, Taiwan. Apply via Workday.

HBM ENGINEERING SUPPORT TECHNICIAN — Taichung - AATT, Taiwan. Apply via Workday.

HBM Hardware Emulation Architect — 2 Locations. Apply via Workday.

HBM Customer Systems Validation Engineer — 2 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG) and develops industry-leading High Bandwidth Memory (HBM) solutions for next-generation AI and high-performance computing systems. Micron is seeking an experienced MTS - HBM Thermal Integration Engineer to drive thermal performance optimization for next-generation High Bandwidth Memory products. This role sits at the intersection of thermal simulation, silicon characterization, process technology, package development, manufacturing, test engineering, and product integration. Key Responsibilities Drive thermal performance optimization across HBM products through design, process, packaging, assembly, and test improvements Develop and implement thermal learning plans, characterization strategies, and design-of-experiments (DOE) to accelerate technology understanding Analyze silicon characterization, inline metrology, manufacturing, and test data to identify key drivers of thermal behavior and variation Partner with thermal simulation teams to improve understanding and correlation between predictive models and measured silicon performance. Work closely with wafer fabrication, package development, assembly, product engineering, and reliability teams to resolve thermal challenges and enable product improvements. Identify and implement opportunities to reduce thermal resistance, improve thermal consistency, and enhance product performance. Drive cross-functional technical investigations and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. HBM Core-Die Architecture & Circuit Design Engineer This role owns next‑generation HBM core‑die architecture and critical DRAM circuit design that directly impact bandwidth, power, area, thermal efficiency, and long‑term reliability. The engineer will drive architecture definition, circuit feasibility, and Architecture Reference Design (ARD) development across advanced 3D‑stacked HBM products. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Key Responsibilities Own HBM core‑die architecture including Bank/Bank‑Group organization, array partitioning, datapath, refresh, and reliability features Drive critical DRAM circuit design and timing closure for row, column, sensing, and datapath paths Develop and optimize architecture solutions for bandwidth, power, area, thermal, and reliability trade‑offs Define and validate refresh, row‑hammer mitigation, data‑retention, and power‑efficient operation schemes Lead architecture feasibility studies using transistor‑level simulation and physical implementa

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The High Bandwidth Memory (HBM) organization develops industry-leading memory solutions that power artificial intelligence, high-performance computing, graphics, and data center applications. The team brings together experts across architecture, design, verification, physical design, product engineering, and validation to deliver advanced memory products that enable the world's most demanding computing workloads. As an HBM Design Development Technical Leadership (DDTL) Intern, you will support the planning, execution, and coordination of next-generation HBM product development programs. You will work closely with technical leaders and engineering teams to track project execution, manage risks, analyze program data, and improve engineering productivity through automation, analytics, and AI-enabled workflows. This role offers exposure to both the technical and leadership aspects of semiconductor product development. Responsibilities Support HBM product execution by tracking schedules, achievements, dependencies, technical risks, and design readiness throughout the development lifecycle. Collaborate with multi-functional engineering teams to monitor project status, coordinate deliverables, and support successful achievement completion. Develop dashboards, reports, data analytics solutions, and executive summaries to provide transparency into program health and key performance indicators. Create automation tools, workflow improvements, and AI-assisted solutions that improve engineering productivity, de

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s High Bandwidth Memory Design Architecture team develops memory solutions for AI accelerators, high-performance computing, and data centers. We bring architecture and physical implementation together to shape products that are efficient, manufacturable, and ready for demanding applications! As a Custom Layout Architecture Engineer , you will use physical layout expertise to inform HBM architecture and implementation decisions from concept through tapeout. You will work with design, architecture, process, verification, and product engineering teams to balance performance, power, area, routability, and manufacturability. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Assess HBM architecture choices through layout feasibility, floorplanning, and performance, power, and area analysis Lead custom layout and full-chip integration for analog, mixed-signal, digital, and memory blocks Resolve antenna, latch-up, ESD, electromigration, IR drop, routability, and power-delivery constraints Complete DRC/LVS, parasitic extraction, post-layout validation, and tapeout support using industry-standard EDA tools Build scripts and automation that improve layout quality, verification, and design-cycle time Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related technical field 4+ years of semiconductor physical layout experience with a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities: Handle several tasks at once and bring them to completion within the specified timeframe. Accurately examine and interpret production data to pinpoint and address abnormal issues. Collaborate with other departments to solve problems and improve production processes. Apply Generative AI to improve the efficiency of daily work. Carry out research to analyze process changes and propose improvements or alterations to equipment. Minimum Qualifications: Demonstrated skill in analyzing and interpreting data with precision. Demonstrated excellence in team building, mentoring, and coaching. Strong problem-solving skills and the ability to find solutions to improve production. Skill in managing several assignments concurrently and completing them on time. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Physical Design team is responsible for implementing advanced High Bandwidth Memory (HBM) SoC and base die designs that enable next-generation AI, high-performance computing, and data center solutions. The team collaborates across architecture, RTL, verification, DFT, and signoff engineering to deliver high-performance, power-efficient silicon while developing innovative design methodologies and automation solutions. As an SoC Physical Design Intern on the HBM team, you will work alongside experienced engineers to support the implementation of advanced HBM SoC designs. You will gain hands-on experience with physical design methodologies, timing analysis, signoff flows, and automation while contributing to the development of next-generation memory products that power AI and high-performance computing applications. Responsibilities Support the physical implementation of SoC design blocks, including floorplanning, placement, clock tree synthesis, routing, and physical optimization activities. Analyze timing, power, area, congestion, and physical verification results to find opportunities for design improvement and optimization. Assist with static timing analysis, timing closure, and debugging across multiple operating modes and process corners. Develop and enhance automation tools, scripts, reports, and workflows using Python, Tcl, shell scripting, and AI-assisted solutions. Collaborate with multi-functional engineering teams to document r

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Responsibilities Yield Loss Accounted For Account for HBM NPI builds across PWF, Assembly, and test through defect breakdown and PFA submission to understand fail mode Work closely with PI to identify defect that is coming from their area to brainstorm for CIP Learn NPI processes, phase gates, and yield best practices Assist in maintaining yield dashboards and trackers. Support PI/PE/RDA in identifying and transforming processing data to account/ breakdown a yield loss Yield Deviation Control Analyze and report on yield deviation issue and trigger action from PI, PE or RDA Support block run and partial conversion build yield analysis to early detect any impact on yield Work closely with PCS team to identify SPC or FDC charts to put into YLR dashboard for shift left monitoring Yield Improvement Opportunities Brainstorm with staff from other departments to brainstorm for improvement opportunities to propose to PI Utilize software tool like Auto-diagnostics to find yield improvement opportunities Integrating Artificial Intelligence Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgement and complying with organizational standards and legal requirements Contributes to a culture of continuous improvement by identifying, testing, and sha