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Hbm Shift Production Engineer Jobs

469 active opportunities · Updated for October 2026

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M
21 days ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Signal Integrity (SI) Research & Development team enables the electrical performance of Micron's industry-leading memory and storage products, including DRAM, LPDRAM, NAND, HBM, SSDs, and emerging memory technologies. The team works across silicon, package, PCB, and system-level designs to develop high-speed signaling and power delivery solutions that support next-generation computing, AI, networking, automotive, mobile, and data center applications. As a Signal Integrity Engineer, you will support the design, analysis, and validation of high-speed memory interfaces and power distribution networks across Micron's product portfolio. Working alongside experienced engineers, you will use modeling, simulation, measurements, and AI-enabled workflows to evaluate signal and power integrity performance, support product development, and contribute to future technology and industry standards initiatives. Responsibilities Support signal integrity and power integrity analysis for high-speed memory interfaces and power distribution networks through modeling, simulation, measurement, and correlation activities. Collaborate with silicon, package, product, validation, and system engineering teams to ensure product electrical performance across all stages of development. Develop and evaluate die, package, PCB, and system-level models to identify performance risks and optimization opportunities. Apply AI-enabled tools and agentic workflows to improve engineering efficiency, automate analysis, improve

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) organization develops next-generation packaging and integration technologies for future memory products. We bring together engineers and scientists to overcome complicated integration, performance, and manufacturability challenges. Working across technology development, device engineering, package design, product engineering, reliability, and manufacturing, we turn new concepts into manufacturable solutions for High Bandwidth Memory (HBM) and other advanced memory products. Position Overview: As a Process Integration Engineer within APTD, you will develop and integrate semiconductor process flows for next-generation memory and packaging technologies, with a focus on Wafer-Level Technology (WLT) and reconstructed substrates returning to wafer-form fab processing. You will lead technical projects, solve exciting integration problems, and work across engineering fields to balance performance, manufacturability, quality, reliability, cost, and schedule. This role is well suited for an engineer who enjoys hands-on problem solving, collaborative R&D, and using emerging tools such as AI to improve engineering workflows and decision-making. Responsibilities: Lead technical integration projects for new memory and advanced packaging technologies Design and complete experiments to assess process performance, variability, reliability, and yield Solve complex integration issues using data from

airecruitment
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M
24 days ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary: Micron's DRAM organization focuses on designing and developing industry leading dynamic random access memory products. These teams drive R&D, product design, and technology development for cutting edge DRAM nodes, including DDR5, LPDDR, HBM, and GDDR products that form the foundation of Micron’s global revenue leadership. Our Process Integration team is at the center of advancing next‑generation memory technology. We work closely across engineering, manufacturing, and change management to turn data into action and keep programs moving forward. If you enjoy solving complex problems and seeing your impact on real products, you’ll find a home here! We’re hiring a Senior Process Integration Technician to partner with Module Engineers and help drive day-to-day execution. This role is essential to keeping experiments, conversions, and production priorities on track through strong coordination and clear communication. You’ll play a hands‑on role in data analysis, issue resolutions, and cross‑functional alignment to support key technology milestones. Responsibilities Collaborate with cross-functional teams to interpret and complete conversions for assigned PI Engineering Module. Serve as the primary point of contact for experiment coordination, conversion activities, and lot movement logistics. Partner with PI Module Owners, Process Area Owners, PI Conversion Coordinators, and Change Management teams to ensure alignment and execution of module support tasks

gcpartificial intelligenceai
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer at Micron’s HBM New Product Validation team in Boise, ID you will be a senior technical guide responsible for validation strategy and readiness for future-generation High Bandwidth Memory (HBM) products. You will apply deep expertise in complex RAM and high-bandwidth memory architecture and building to establish architecture validation strategies. You will impact decisions that improve validation observability and debug efficiency . You will lead investigations of complex architecture, building , and silicon issues from pre-silicon simulation through post-silicon characterization. You will partner across Design Engineering, Design Validation, Product Engineering, Systems teams, and will develop and promote AI-enabled validation methodologies that improve efficiency, quality, and scalability. Responsibilities: Define architecture-aware validation strategies and coverage direction for future-generation HBM products. Drive validation readiness for next-generation products by preparing strategies, test environments, and execution plans before first silicon, reducing risk, accelerating issue resolution, and preventing late-stage surprises. Evaluate new DRAM/HBM architectural features and define validation requirements and testability needs before DBR. <span style="color:#

pythongitlinux
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Engineer in Micron’s HBM Product Engineering Component Validation team, you will be an individual contributor responsible for the validation of advanced High Bandwidth Memory (HBM) products. You will use proven knowledge in dynamic random-access memory and high-bandwidth memory architecture to compose validation coverage, implement and analyze validation runs, lead product debug and failure analysis toward a zero-escape validation goal across test modes and product achievements. You will also adopt AI-enabled ways of working, using enterprise AI tools to accelerate your engineering tasks and improve efficiency, work within Micron’s global validation organization and collaborate with groups at different locations. Responsibilities: Translate DRAM/HBM develop intent and architecture into effective verification scope and test cases. Contribute to validation of new and high-risk product features, working with Design Validation, and Systems Engineering. Review design specifications, schematics, and datasheets, provide design feedback and represent the Product Engineering perspective in Design and Verification reviews. Read, analyze, and debug circuit blueprints to detect design-related failure mechanisms, and recommend approaches for verification and fault diagnosis. Perform root-cause analysis and examination of electrical failures (debug) of validation findings, distinguishing developed marginality from process and test-related issues. Apply automation and modern tooling (including

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M
26 days ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the CMOS Device Integration Team at Micron, where we push the limits of memory technology every day. We work at the intersection of device physics, process integration, and product performance to enable the next wave of DRAM, HBM, and Compute-in-Memory innovation. If you’re excited by challenging technical problems and real-world impact, you’ll feel right at home here! In this role, you’ll serve as a technical leader shaping the future of Micron’s most advanced memory products. As a Distinguished Member of Technical Staff, you’ll drive CMOS device and module development that directly impacts array efficiency, data rates, and product scalability. Your expertise and influence will help guide technology decisions that power AI, high-performance computing, and emerging applications. Responsibilities: Develop and integrate advanced CMOS devices for next-generation DRAM, HBM, and emerging memory architectures Perform detailed electrical characterization of CMOS devices and circuits to drive performance improvements Partner with Design, TCAD, Modeling, Process, Reliability, and Layout teams to deliver integrated technology solutions Provide technical leadership, strategic recommendations, and clear presentations to guide technology direction Minimum Qualifications: Master’s degree or PhD in Electrical Engineering or equivalent practical experience 10 or more years of hands-on experience in advanced CMOS device design and/or integration 1

airecruitment
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key talent within High Bandwidth Memory (HBM) Product & System Engineering Media Health team, you will work together with a high performing team driving both intrinsic and extrinsic reliability test development and execution for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. Your responsibility is to drive extrinsic DPM reduction (Time 0 and Field DPM) and lead the intrinsic reliability charter, along with optimized Manufacturing Test Flow to meet critical KPI’s Quality, Cost and Cycle Time. You will work within the team to characterize the products from reliability aspect, identify the reliability gaps, working on root cause and resolution of qual and RMA failures pertaining to defectivity and intrinsic reliability margin and drive fab process improvement driven by the qual failures. Additionally, your team will also be the key person in frontend process conversion, where you will work with Fab, TD, GQ teams to establish robust business process for process conversions to facilitate yield improvements, DPM and Cost Reduction. You will collaborate across functions within and outside of HBM to meet both strategic and tactical objectives while continually maximizing the effectiveness of the HIG HBM PE organization. The future of HBM are exciting and dynamics.

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M
27 days ago

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore Department HVM Engineering Process and Equipment Engineering Project Title Superior Copper Sputter Enablement on HBM Metallization Project Description With increasingly advanced technology scaling and higher performance requirements, the metallization process requires continuous innovation to meet stringent electrical, reliability, and manufacturability targets. To support future product roadmaps and capacity expansion, there is a need to enable advanced copper deposition capability as an improved manufacturing platform for metallization. This effort requires comprehensive process development, hardware qualification, integration assessment, and defectivity optimization to achieve process equivalency while maintaining yield, reliability, and cost competitiveness. The project will leverage Artificial Intelligence (AI), Micron manufacturing systems, and advanced data analytics to perform extensive characterization, validation, and predictive insights across process conditions. The intern will work closely with engineering teams to evaluate process performance, identify optimization opportunities, and develop data-driven solutions that improve manufacturing robustness and readiness for h

pythonsqlmachine learning
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N
Nvidia
📍 Santa Clara, United States
28 days ago

NVIDIA is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a group of hardworking engineers to develop and architect innovative Memory Solution for Tegra SoCs. In this position, you'll make a real impact in a multifaceted, technology-focused company. You will work with memory controller/PHY and Platform / System architect, Firmware, SI/PI, Memory suppliers to design and architect cutting edge, high speed and lower power memory technology for NVIDIA CPUs and SOCs. What You Will Be Doing: Analyze future DDR/LPDDR/HBM technologies to determine optimum performance, power, function and RAS in memory for Next generation SOC and Systems. Collaborate with ASIC Architects, Designers, Software and Firmware SW/FW teams to drive memory technology and associated requirements for memory controllers. Define Memory module, Package, and PCB layouts appropriate to the system workloads Debug and bring up memory evaluation / validation and failure issues on memory technology. Collaborate with DRAM suppliers and industry partners on to develop memory and memory related component technology. What We need to see: Bachelor's degree or master’s degree in Electrical Engineering, Computer Engineering (CE), or a related field (or equivalent experience) 10 years of proven track record in DRAM design, module design, or memory sub system design. Deep understanding and strong fundamental of memory design, features, ECC algorithm, SI and PI (Training algorithm) in DDR, LPDDR, and HBM. Strong understanding of memory sub system level interaction with Cache, Memory controller and PHY. Experience in the design, bring-up and validation for memory failure analysis Experience with Python, C/C

pythonai
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M
28 days ago

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Smart Systems Technician, you will join our world-class team in Singapore to drive innovative solutions that improve operational productivity, efficiency, and product quality. This is an outstanding opportunity to work at the forefront of semiconductor manufacturing, where you will support system solutions that make a significant impact on our operations across High Bandwidth Memory (HBM), Component Assembly and Test, and SSD operations. You will be an essential part of maintaining and improving software applications, ensuring flawless operation, and helping us remain competitive in a fast-paced industry. Responsibilities and Tasks Provide first-line support and troubleshooting for software-related issues in manufacturing operations, ensuring timely resolution and minimal disruption. Assist in the deployment, maintenance, and improvement of system solutions, including both internal Micron applications and third-party vendor applications. Explore opportunities to introduce new systems, including AI-powered analytics and automation tools, to improve organizational efficiency through system solutions. <span

pythonsqlartificial intelligence
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a HIG PSE IE Senior Technician , you will support HBM IQP Reliability, Device Reliability, Package Reliability, Wafer Reliability, and product debug activities . The role includes reliability testing, failure analysis, laboratory operations, inventory and logistics management, audits, safety compliance, and continuous improvement initiatives. You will leverage Artificial Intelligence (AI) and AI-assisted tools to improve IQP reliability run rate management, enhance debug capabilities, support wafer-level reliability testing, and drive automation and digital transformation within the lab environment. Key Responsibilities Support Device Reliability, Package Reliability, and Wafer Reliability execution. Monitor and manage IQP reliability run rates, sample flow, and hardware readiness. Perform first-pass failure analysis and product debugging using probe stations and other debug tools. Utilize AI-assisted tools to improve debugging efficiency, root cause investigation, and operational planning. Support automation projects, data analysis, dashboard reporting, and process improvements. Manage procurement, inventory, logistics, and laboratory readiness activities. Support audits, document control, ESD

pythonsqlartificial intelligence
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an PDE Yield Enhancement (YE) Engineer within Package Development Engineering (PDE), you will be responsible for yield monitoring, excursion management, and yield stabilization during High Bandwidth Memory (HBM) New Product Introduction (NPI) . This role is critical to ensuring robust yield performance from first silicon through NPI ramp and early HVM , working closely with Process Integration (PI), MRDA, Process Engineering (PE), Assembly/Test Manufacturing, and Quality teams. You will act as a hands‑on yield owner during NPI builds, driving fast learning cycles, early risk detection, and disciplined yield recovery. Job Responsibilities: Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness,exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. Yield Loss Accounted For Account for HBM NPI builds across Post Wafer Finishing (PWF), Assembly, and

artificial intelligenceairecruitment
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a HIG PSE IE Senior Technician , you will support HBM IQP Reliability, Device Reliability, Package Reliability, Wafer Reliability, and product debug activities . The role includes reliability testing, failure analysis, laboratory operations, inventory and logistics management, audits, safety compliance, and continuous improvement initiatives. You will leverage Artificial Intelligence (AI) and AI-assisted tools to improve IQP reliability run rate management, enhance debug capabilities, support wafer-level reliability testing, and drive automation and digital transformation within the lab environment. Key Responsibilities Support Device Reliability, Package Reliability, and Wafer Reliability execution. Monitor and manage IQP reliability run rates, sample flow, and hardware readiness. Perform first-pass failure analysis and product debugging using probe stations and other debug tools. Utilize AI-assisted tools to improve debugging efficiency, root cause investigation, and operational planning. Support automation projects, data analysis, dashboard reporting, and process improvements. Manage procurement, inventory, logistics, and laboratory readiness activities. Support audits, document contr

pythonsqlartificial intelligence
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The PDE Process Integration (PI) Engineer is responsible for driving process integration excellence for High Bandwidth (HBM) products during New Product Introduction (NPI) . This role ensures robust process readiness, yield ramp, and cross‑module integration across Post Wafer Finishing PWF, assembly, and test , enabling successful execution of HBM technology roadmaps. The PI Engineer works cross‑functionally with Fab, Assembly, Test, Yield, Quality, and central engineering teams to identify risks early, resolve complex integration issues, and deliver NPI milestones on time. Job Responsibilities Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. NPI Execution & Support Execute assigned HBM NPI PI tasks following defined procedures and phase‑gate requirements Support NPI builds through lot tracking, data collection, and

pythonartificial intelligenceai
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Enable rapid learning and effective technology transfer across the organization through deep involvement in defect detection equipment applications and advanced data analysis. Analyze process challenges using defect data and equipment signals to identify root causes and improvement opportunities. Collaborate with cross-functional teams across process integration, process development, data science, and yield analysis to deliver solutions with global impact. Drive defect reduction and yield improvement efforts across multiple projects on Micron’s DRAM roadmap, including High Bandwidth Memory (HBM) and advanced DRAM technologies. Develop a comprehensive understanding of process flows, potential failure and defect modes through FMEA, and associated detection strategies for inline yield characterization. Define die loss paretos upon issue detection and partner with process and integration teams to design, execute, and analyze experiments and DOEs to resolve yield limitations. Monitor baseline inline yield health for owned process modules using SPC techniques to quickly identify excursions, process drift, and emerging risks. Protect line yield by proactively escalating issues and coordinating corrective actions. Apply advanced data science and data interpretation skills to analyze complex datasets, draw actionable conclusions, and communicate results effectively. Present findings and recommendations to internal teams and customers using analytical tools such as JMP and Python. Employer will accept a Master’s degree in Material Engineering, Chemical Engi

pythonaiSEM
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