Hp Com Canada Store Category Manager Jobs

Payroll Analyst, USA — Tlaquepaque, Jalisco, Mexico. Apply via Workday.

Writing System Product Technical Specialist — Singapore, South West, Singapore. Apply via Workday.

Machine Operator / Integrator — Kiryat-Gat, South District, Israel. Apply via Workday.

ACS Quality Engineer - Workstation Products — Colorado, United States of America. Apply via Workday.

Business Strategy Manager, Gaming — Taipei, Taipei City, Taiwan Region. Apply via Workday.

HR Technology Security Analyst — Tlaquepaque, Jalisco, Mexico. Apply via Workday.

Who We Are HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates. We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless. We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset. By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work. Join us as we reinvent work, so people everywhere can do their best work. About The Role HP IQ's Wireless Technology Team works cross-functionally with Electrical Engineering, Software, Mechanical Engineering, Product Design, Industrial Design, Program Management, and Operations to develop next-generation wearable and AI-connected products. As a Lead RF Systems & Desense Engineer, you will own the RF system architecture from concept through mass production. You will lead RF integration across Wi-Fi, Bluetooth, UWB, NFC and emerging wireless technologies while driving RF desense, coexistence, and wireless performance for highly integrated products. What You Might Do Lead RF system architecture and integration for wearable and mobile platforms. Own RF desense investigations and mitigation across the product lifecycle. Define RF specifications, link budgets, validation plans and performance targets. Lead coexistence strategy for Wi-Fi, Bluetooth, UWB, NFC and other radios. Partner with antenna, EE, FW, ME and silicon vendors to optimize total wireless performance. Perform CST and ADS simula

Who We Are HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates. We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless. We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset. By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work. Join us as we reinvent work, so people everywhere can do their best work. About The Role HP IQ is seeking a Senior Power Systems Engineer to drive end to end system architecture, modeling, and optimization for wearable platforms. The candidate will build power models, define system use cases and operating modes, partner with product and engineering teams to meet aggressive power targets, and define manufacturing tests and field telemetry for NPI. The ideal candidate brings strong systems thinking, hands-on experience with low power architectures, and the ability to build models and telemetry to drive tradeoffs from SOC level to board level to maximize user runtime. What You Might Do: Power architecture responsibility for a wearable device covering SoC states, sensor, audio, and memory architecture tradeoffs at board level. Battery, PCM, and charging profile definition and validation Design power experiments, test plans, and measurement & telemetry mechanisms across firmware and hardware to optimize power and performance. Build and maintain system-level power models to model expected power consumption for user profiles. Map power models by subsystem, correlating