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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Design Rules team develops and maintains design rules, methodologies, and automation solutions that enable the successful design and manufacturing of advanced memory technologies. The team partners closely with Design, CAD, Process Integration, Verification, and Product Engineering organizations to ensure technology scalability, design quality, and manufacturing robustness. As a DRAM Design Rules Intern, you will contribute to design rule development, validation, automation, and design enablement activities for next-generation memory products. This role provides hands-on experience with semiconductor build methodologies, industry-standard EDA tools, AI Supported analytics, and multi-functional engineering collaboration while helping drive future memory technology innovation. Responsibilities Assist in the development, documentation, validation, and optimization of semiconductor design rules for advanced memory technologies. Support design enablement activities by developing methodologies, automation solutions, scripts, and workflows that improve design productivity, verification quality, and engineering efficiency. Perform design rule validation, verification, and analysis using industry-standard EDA tools, simulation environments, and AI Supported analytics frameworks. Collaborate with Design, CAD, Process Integration, Verification, and Product Engineering teams to evaluate technology features, process

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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore Department Photolithography Engineering Project Title Large-Scale Photolithography Software Stack Integration Project Description Photolithography is one of the most software-intensive and technologically advanced manufacturing processes in semiconductor manufacturing. Maintaining world-class performance requires an integrated software ecosystem spanning process control, equipment connectivity, data engineering, automation, visualization, machine learning, and decision-support systems. As an intern within the Photolithography Engineering team, you will collaborate with process, equipment, data, and manufacturing engineers to design and develop software solutions that transform large-scale manufacturing data into actionable insights and automated engineering workflows. Project assignments will be tailored to individual strengths, academic background, and learning interests, providing opportunities to contribute across software engineering, data engineering, system integration, analytics, and Artificial Intelligence domains. Where relevant, the project will incorporate AI-Enabled development approaches, Generative AI, Artificial Intelligence, AI Assistants, Agentic AI technologies, and Agen

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron's Boise R&D site, the DRAM Technology Development organization drives innovation in next-generation memory solutions. The team develops advanced DRAM cell architectures, access devices, materials systems, and integration technologies that enable future scaling, improved performance, enhanced reliability, and manufacturing readiness. Engineers work across device, materials, process integration, modeling, design, and product engineering teams to bring groundbreaking memory technologies from concept to production. As an intern in the Advanced DRAM Device & Cell Technology team, you will contribute to the development and characterization of future DRAM cell and access device technologies through experimental studies, data analysis, and collaboration with multidisciplinary engineering teams. This position combines semiconductor device physics, materials engineering, silicon experimentation, electrical characterization, and data-driven decision making to improve cell performance, density, retention, reliability, and manufacturability. The successful candidate will collaborate with multi-functional teams to evaluate novel materials, device architectures, and integration schemes supporting future memory technology development. Responsibilities Support the evaluation of DRAM access devices, capacitors, and cell stack elements through characterization, data analysis, and assessment of new device architectures, materials systems, and integration schemes. Design and implement

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M
1mo ago

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Project Title Cumulative Error Variation Reduction in Staircase and Chop Etch Processes Project Description Analyze manufacturing process and measurement data to identify sources of cumulative error variation within advanced-technology staircase and chop etch processes. Develop data-driven control strategies and process improvement recommendations to reduce variation and improve inline process stability. The project will provide exposure to dry etch processes, staircase flow integration, statistical analysis, data visualization, and the etching mechanisms relevant to semiconductor process control. Project Scope Understand the measurement methodology and process mechanisms used to define cumulative error within the staircase formation loop. Analyze process and measurement data to identify factors contributing to cumulative error variation. Apply statistical analysis and data visualization techniques to evaluate relationships between process conditions and cumulative error performance. Develop potential control strategies to reduce cumulative error variation. Recommend opportunities to improve process margins and inline stability. Learning Opportunit

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1mo ago

About Us: Paytm is India's leading mobile payments and financial services distribution company. Pioneer of the mobile QR payments revolution in India, Paytm builds technologies that help small businesses with payments and commerce. Paytm’s mission is to serve half a billion Indians and bring them to the mainstream economy with the help of technology. About the role: The candidate will be responsible for handling the Employee Query coming on the helpdesk ticket system and have to ensure the ticket closures within specific TAT. Responsibilities: Knowledge of MS Office/Advanced MS Excel Good communications skills Email etiquettes Internal team coordination and data management Desired Candidate : Should be very prompt over email/calls A candidate with good communication skills is preferred Basic Excel knowledge is preferred. Verbal and written communication in English Duration: Should be available for 6 months of Internship Education: Must be pursuing Graduation or Post Graduation Why join us: Merit-based culture that thrives on self-motivated & driven individuals who are set out to make a successful career in India’s fastest-growing Fintech Organization. Agile & democratic setup that gives space to your creativity, and offers the opportunity to work at scale coupled with an environment that encourages diverse perspectives at all times. Compensation: If you are the right fit, we believe in creating wealth for you With enviable 500 mn+ registered users, 21 mn+ merchants and depth of data in our ecosystem, we are in a unique position to democratize credit for deserving consumers & merchants – and we are committed to it. India’s largest digital lending story is brewing here. It’s your opportunity to be a part of the story!

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's Design-Technology Co-Optimization (DTCO) team plays a critical role in bridging semiconductor device technology and circuit design to enable next-generation DRAM products. The team evaluates emerging technologies, develops methodologies for performance assessment, and contributes to early design enablement activities that influence product power, performance, and area (PPA). Through close collaboration with device, process, modeling, and design engineering teams, DTCO helps guide technology development decisions that shape future memory solutions. As a DTCO Intern, you will gain hands-on experience evaluating advanced DRAM technologies and assessing their impact on future product architectures. You will use industry-standard electronic design automation (EDA) tools, perform circuit simulations and benchmarking, and apply data analysis techniques to support technology development decisions. This position provides an opportunity to work alongside world-class engineers while developing technical skills in semiconductor technology, circuit design, and AI-enabled automation workflows. Responsibilities Evaluate emerging DRAM technologies and analyze their impact on future product architectures and design tradeoffs. Perform transistor-level simulations and circuit benchmarking using industry-standard EDA tools such as HSPICE and FineSim. Develop and utilize Claude AI-based automation workflows and data analysis processes to improve simulation efficiency and engineering productivity. <li

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a global leader in innovative memory and storage solutions that transform information into intelligence. The EUV Lithography team develops and advances groundbreaking photolithography technologies that enable next-generation semiconductor products. Working at the forefront of semiconductor innovation, the team collaborates across process integration, metrology, etch, wet process, and manufacturing fields to solve complex technical challenges and drive technology scaling. Micron internships provide hands-on experience in semiconductor research and development through meaningful technical projects, mentorship from experienced engineers, and exposure to advanced manufacturing technologies. Interns contribute directly to initiatives that support both current and future product development. As an EUV Lithography Intern, you will work on projects that support the advancement of semiconductor manufacturing technologies and next-generation memory products. You will collaborate with multi-functional engineering teams to design experiments, analyze process data, evaluate lithography performance, and develop innovative solutions related to EUV lithography, photoresist materials, process optimization, and line width roughness improvements. Responsibilities Design and execute experiments (DOE) to optimize photolithography processes, including EUV lithography, photoresist performance, and patterning improvements. Plan, coordinate, and support semiconductor process experiments in cleanroom environmen

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners! The solutions we build help make everything from virtual reality experiences to breakthroughs in artificial intelligence possible. We do it all while committing to integrity, sustainability, and giving back to our communities, because doing so can fuel the very innovation we are pursuing. As a process integration engineer in the 3D DRAM organization, you will join a team of world-class engineers who are working in an industry leading 300mm R&D facility on technology that enables the future of memory scaling. You will focus on performance and manufacturability of Micron’s cutting-edge next-generation memories. Areas of concentration will include integration and circuit issues specific to 3D DRAM technology. In addition to a broad basis of process integration knowledge, this position requires a strong background in materials science and semiconductor device physics, along with a creative mindset and effective project management. The role interacts significantly with process development, simulation, characterization, and reliability groups. Responsibilities: Contribute to technology development activities to enable next generation DRAM, working on device components such as charge storage devices and thin-film transistors, among others. Optimize process flows and develop creative solutions to meet product requirements. Engage numerous cross-functional te

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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore, Fab10 Department Fab10 High-Volume Manufacturing Photo Process and Equipment Engineering Project Title Automation of Non-Zero-Offset Control for High-Volume Manufacturing Photo Processes Project Description Non-Zero-Offset is a key photo-process control parameter used in overlay-performance management and yield protection. The current workflow includes data preparation, Non-Zero-Offset generation, engineering review, validation, and post-implementation monitoring. As the number of process vintages increases, a scalable analytical approach is needed to improve workflow consistency and efficiency. The intern will undertake a structured project to develop and evaluate an automated, data-driven Non-Zero-Offset framework using Python, statistical analysis, machine learning, and visualization. The project will provide practical exposure to photo-process engineering, inline metrology, data modeling, workflow automation, and AI-Enabled engineering analysis. Objective of the Project Develop an understanding of the end-to-end Non-Zero-Offset workflow, including wafer selection, inline recipe criteria, metrology requirements, generation logic, and validation.

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is a global leader in DRAM innovation, developing memory technologies that enable the next generation of computing, artificial intelligence, and data-driven applications. Within the Technology Development organization, the Process Integration team drives the development of future DRAM architectures by coordinating device, materials, and process innovations across multiple engineering fields. Team members work in a highly collaborative R&D environment to solve complex technical challenges and accelerate technology scaling. As a Process Integration Engineer Intern, you will contribute to the development of next-generation DRAM memory technologies through multi-functional collaboration involving process integration, device engineering, materials development, and process architecture. This role requires strong technical expertise, analytical problem-solving skills, and the ability to coordinate activities across multiple engineering organizations to achieve technology achievements and product objectives. Responsibilities Define technology achievements, design rules, structural requirements, and electrical specifications for next-generation DRAM technologies while supporting achievement of program targets and timelines. Collaborate with process development, simulation, process architecture, circuit design, and quality teams to ensure alignment with product and technology requirements. Develop and maintain documentation related to process integration plans, technical risks, issue resolution,

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Do you love the interaction of cutting-edge hardware and innovative software solutions? In today's data economy, Micron's memory and storage products are essential to advancing state of the art computing technology. Continued scaling of memory technology presents challenges that require complex and creative testing solutions. As a Product Test Engineer, you will be responsible for the development, debug and maintenance of test programs that help deliver Micron's world-class DRAM portfolio to market. A product test engineer can be focused on the health and quality of the memory cells [DRAM features 16 billion cells in less than 80mm^2 of area] or focused on high-speed interface, AI proficiency, AI supported workflow automation, and system level application testing. Responsibilities Develop, debug and support test programs from new product introduction phase up through high volume manufacturing Write test programs and support scripts in C&#43;&#43;, Python Contribute input and feedback to help define next generation 'design for test' capabilities Analyze device and test flow data to make informed test coverage decisions Balance test time objectives while maintaining optimal yield and quality

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1mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Compute Data Center Business Unit (CDBU) drives the strategy, positioning, and market adoption of advanced memory and storage technologies developed for data center, cloud, AI, and high-performance computing environments. Working closely with engineering, product management, marketing, business development, and field sales teams, the organization focuses on delivering customer value through industry-leading technologies, data-driven insights, and market-focused solutions. As an MBA Intern within CDBU, you will support priority EMEAIJ and Rest of World initiatives by conducting market analysis, developing customer-facing content, and crafting go-to-market recommendations for key verticals such as Financial Services and Sovereign AI. You will work with engineering and business teams to turn complex workload and infrastructure needs into clear business value. You will use AI and market intelligence to build impactful outcomes. Responsibilities Conduct market and opportunity assessments for targeted industry verticals, including total addressable market (TAM), customer segments, workload trends, ecosystem participants, and whitespace opportunities. Develop customer-facing solution narratives, vertical playbooks, discovery guides, and marketing content that communicate the value of memory and storage solutions for data center workloads. Collaborate with Data Center Workload Engineering (DCWE), product managers, marketing teams, business

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The CMP Process team works on developing and enhancing semiconductor manufacturing processes that support next-generation memory products. Working within a collaborative engineering environment, the team conducts fundamental research, evaluates process performance, and develops innovative solutions that meet increasingly complex device requirements. As an intern, you will gain broad exposure to semiconductor processing while developing expertise in Chemical Mechanical Planarization (CMP) process technology. You will work under the guidance of experienced engineers on a dedicated technical project focused on process development, optimization, and characterization. The internship culminates with a presentation of your technical contributions and project results to engineering collaborators. Responsibilities Develop and evaluate CMP processes that meet product requirements for physical and electrical performance in advanced DRAM technologies. Partner with multi-functional process and equipment engineering teams to identify, implement, and validate process improvements. Apply root-cause analysis and failure-mode methodologies to identify process limitations and drive corrective actions. Conduct fundamental research and experimental studies to support next-generation semiconductor process development. Analyze statistical process and manufacturing data and apply Artificial Intelligence, AI Assisted tools, or AI-Enabled methodologies to improve process understanding, data analysis, and p

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The DRAM IP Development (IPDEV) team develops critical digital IP solutions that enable next-generation AI, mobile, client, data center, and graphics memory products. Our team is responsible for delivering high-quality DRAM IPs that drive innovation, product performance, and development efficiency across Micron's memory portfolio. As a Senior or Graduate Engineering Intern in DRAM Circuit Design, you will work alongside experienced engineers to develop and validate digital IP circuits used in future DRAM products. This internship provides hands-on experience with RTL-to-GDS design methodologies, custom design and verification flows, silicon learning, and advanced semiconductor development processes. You will contribute to impactful engineering projects while gaining exposure to industry-standard EDA tools, multi-functional collaboration, and AI-enabled engineering workflows. Responsibilities Support the design, development, and verification of digital IP circuits for next-generation DRAM products using RTL-to-GDS methodologies. Perform circuit analysis across process, voltage, and temperature (PVT) corners to evaluate performance, quality, and reliability. Develop automation scripts and leverage Agentic AI, AI-Assisted tools, or Code Assist solutions to improve engineering productivity and design quality. Collaborate with multi-functional engineering teams on design implementation, verification,

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