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The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt mitigation across silicon, package, board, and platform. This role bridges architecture, silicon, and platform — translating product noise targets into shipped specifications, and feeding silicon findings back into the next generation's build. Success in this role requires strong systems thinking and a willingness to accept ambiguity. It also requires the ability to apply AI as a force multiplier while maintaining rigorous engineering judgment. What you'll be doing: Architect voltage-noise mitigation across the full stack — silicon, package, board, platform — and own the codesign trade-offs between them. Co-design noise features with Speed, Power, Reliability, Circuit Design , Power-Arch, ASIC, and platform teams. You're the connective tissue across the codesign web. Work with other team members to define product-level voltage noise targets, drive them to closure, and sign them off at shipment. Build and take ownership of the Sim-to-Si correlation methodology for noise. You know when a model is lying and when silicon is. Model and prototype next-gen noise features — transient sense, droop response, mitigation IP, and codify them so every future program inherits them. Lead show-stopper noise bugs during bringup. The critical issues stop with you. Drive architecture-level codesign tradeoffs across V/F Power Noise Reliability Thermal (Noise-Variation) and (Noise-to-Closure) boundary work, where the highest-leverage innovation lives. What we need to see: BS / MS / PhD in EE, CE, or related (or equivalent experience). 5+ years in silicon power integrity, voltage noise, or PDN. Deep expertise in at least one of

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ​Job Description Summary The role will be responsible for managing AV devices, assets, and Windows-based personal computers to provide technical support to employees for computer systems software and hardware. You will support obtaining, setting up, upkeep, and management of Windows, PC applications and hardware resources. You will collaborate with global Corporate teams to introduce new solutions and meet business requirement. You will be encouraged to follow Corporate standards to provide high-level customer services, including: - Training programs built to educate an organization’s employee as new employee orientation program - Provide diverse IT supports as needed for specific business areas - Maintain an expert level of computer literacy including a solid understanding of the Operating Systems Detailed Job Description Responsible for Windows, PC, AV devices and asset management to provide technical support to employees for PC software and hardware. Experience in Windows OS, computer software and hardware maintenance. Familiar with the installation, operation, repair and resolving issues in Microsoft Windows OS, including LAN TCP/IP knowledge related to problem research. Ability to analyze and solve problems for Microsoft Windows/Office 365/PC. Those with information-related certificates are preferred, such as MCSE or CCNA, etc. <

NVIDIA builds the silicon behind AI, accelerated computing, and graphics. Every watt of performance and every degree of thermal headroom traces back to decisions made in power, performance, and thermal architecture. We are the Silicon Co-Design Group (SCG). We identify, own, and drive system-level co-design ideas. We start with initial concepts and advance to product differentiation across NVIDIA's roadmap. We are hiring a Principal System Power Management and Performance Architect who operates at the ambiguous boundary where workload behavior, silicon capabilities, firmware policies, and platform constraints collide, and who turns that ambiguity into architecture that survives across multiple silicon generations. SCG scope spans architecture, design, software, operations, platforms, and productization. This role shapes system, platform, and data center features and behavior, and partners with teams across NVIDIA. What You'll Be Doing: The work here is rarely well-defined when it arrives. You will be given problems that appear to be performance gaps or power anomalies and encouraged to build a framework for solving them, not just tackle a single instance. Define the multi-generation roadmap for system-level power and performance features, grounded in prototyping, use-case analysis, and cost/benefit trade-offs across segments. You will decide what problems are worth solving and why. Own the architecture and integration strategy for HSIO power management, DVFS, P-states, and low-power features. Your decisions improve product performance, power, and reliability across product lines — not just the current program. Lead system-level boot and IST architecture defining how power and clock domains initialize, sequence, and recover across complex multi-IP systems where the interaction space is large and the failure modes matter. Drive power management strategy at data

Position Summary Pfizer is seeking a motivated Senior Associate Scientist to join the In Vivo Pharmacology group within the Oncology Research Unit, with a focus on antibody-drug conjugate (ADC) programs, but including other large molecule and small molecule programs. This role supports the execution of in vivo oncology studies that enable ADC discovery and preclinical development, including efficacy, tolerability, pharmacodynamic, and sample collection workflows. The ideal candidate will demonstrate strong technical aptitude, careful attention to detail, and a commitment to animal welfare, compliance, and high-quality study execution. The Senior Associate Scientist is expected to contribute as a dependable technical team member while building scientific understanding of oncology pharmacology and ADC-specific study requirements. Position Responsibilities Execute in vivo oncology studies supporting discovery programs using a variety of in vivo models including human cell line- derived, patient-derived xenograft, syngeneic models as appropriate with minimum guidance from study leads. Perform routine and advanced in vivo procedures, including tumor measurements, body weight monitoring, test article administration (IV, PO, subQ, IP dosing), clinical observations, and sample collection. Perform routine in vitro tissue culture procedures Support pharmacology studies evaluating efficacy, tolerability, pharmacodynamic biomarkers, dosing schedules, and combination approaches. Prepare study materials, confirm dosing and sampling schedules, and ensure study activities are performed according to approved protocols and SOPs. Maintain accurate, timely, and compliant study records using approved electronic data capture and documentation systems. Communicate study observations, technical issues, animal welfare concerns, and timeline risks promptly to managers and study line leads. Collabo

About the Team OpenAI Consumer Devices is building the next generation of products that bring powerful AI into people’s everyday lives. Guided by OpenAI’s mission to ensure AGI benefits all of humanity, our team combines world-class researchers, engineers, designers, and operators who care deeply about creating useful, intuitive, and responsible technology. You’ll have the opportunity to work alongside exceptional people on ambitious, zero-to-one challenges at the intersection of hardware, software, and AI. This is a chance to help define an entirely new category of products—and shape how people experience AI in the future. Our team works across systems software and product engineering to build reliable consumer devices and the platforms behind them. We develop the connectivity and networking foundations that support communication across OpenAI products and systems. About the Role As an Operating Systems Engineer focused on connectivity and networking, you will design, develop, and maintain the OS capabilities that enable reliable, secure, and efficient communication across OpenAI products and systems. Your work will span Wi-Fi and Bluetooth frameworks, IP networking, and advanced network services and policy. You’ll develop OS services, libraries, and interfaces for a broad range of connectivity needs, make design decisions across software boundaries, and carry solutions through development, integration, and production. In this role, you will: Build connectivity foundations: Design, implement, and maintain OS services, frameworks, and APIs for Wi-Fi, Bluetooth, and IP networking. Develop reusable network capabilities: Build connection management, network configuration and selection, service discovery, and routing capabilities. Enable secure communication: Develop network services and policies for secure communication, traffic management, and isolation across varied network environments. Resolve issues across the stack: Investigate correctness, concurrency, interoper

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering, Computer Engin

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. About the Role We’re looking for a Sales Solution Engineer in Vietnam to work with enterprise customers, system integrators, MSPs, and channel partners. You’ll design and present end-to-end solutions across networking, ProAV, VoIP, storage, and Physical Security (Protect & Access). As a key solution engineering lead in Vietnam, you’ll play an important role in market expansion. Working in a pre-sales capacity, you will help lead regional technical strategy for Ubiquiti in Vietnam, collaborating with product teams, partners, and global sales to drive adoption, market fit, and brand growth. Responsibilities Design scalable solutions across Network, Protect, Talk, Drive, and Access Deliver demos, POCs, webinars, and technical workshops Build proposals, architectures, and BoMs Enable partners and distributors Drive product visibility in retail and online channels Share market feedback with global teams Desired Experience Solution Architecture Enterprise Networking (SD-WAN, MC-LAG, BGP, OSPF) ProAV (AV-over-IP, PTP) Physical Security (CCTV & Access Control) VoIP (SIP, PBX systems) Storage (NAS, SAN) General Native Vietnamese and business English 3+ years in pre-sales, solution engineering, or system design Certifications (CCNP, CWNP, UWA) preferred Strong reliance on AI tools, LLMs, and automation to drive productivity and sca

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. About the Role We’re hiring a Sales Solution Engineer in the Philippines to support enterprise customers, integrators, and partners. You’ll design networking, ProAV, VoIP, storage, and Physical Security (Protect & Access) solutions across industries. Working in a pre-sales capacity, you will lead regional technical strategy for Ubiquiti in the Philippines, collaborating with product teams, partners, and global sales to drive adoption and growth. Responsibilities Design solutions across Network, Protect, Talk, Drive, and Access Deliver demos, POCs, and partner workshops Build proposals and architectures Support distributors and partners Strengthen brand visibility Provide feedback to product teams Desired Experience Solution Architecture Enterprise Networking (SD-WAN, BGP, OSPF) ProAV (AV-over-IP, multicast) Physical Security (CCTV & Access Control) VoIP (SIP, PBX systems) Storage (NAS, SAN) General English and Tagalog 3+ years experience Pre-sales or solution engineering background Strong reliance on AI tools, LLMs, and automation to increase efficiency and output Benefits Remote work Travel opportunities Competitive salary Flexible hours

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. About the Role We’re hiring a Sales Solution Engineer in South Korea to support enterprise customers and partners. You’ll design networking, ProAV, VoIP, storage, and Physical Security (Protect & Access) solutions. Working in a pre-sales capacity, you will lead regional technical strategy for Ubiquiti in South Korea, collaborating with product teams, partners, and global sales to drive adoption, market fit, and brand growth. Responsibilities Design solutions across all product areas Deliver demos and technical sessions Build proposals and architectures Enable partners and distributors Drive brand presence Provide market insights Desired Experience Solution Architecture Enterprise Networking (SD-WAN, BGP, OSPF) ProAV (AV-over-IP, PTP) Physical Security (CCTV & Access Control) VoIP (SIP, PBX systems) Storage (NAS, SAN) General Korean and English 3+ years in pre-sales, solution engineering, or system integration Certifications preferred Strong reliance on AI tools, LLMs, and automation to scale productivity Benefits Remote or hybrid flexibility Travel opportunities Competitive compensation

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Team lead for a group of engineers with responsibility for Linux and VMWare initiator stack behavior as well as Fibre Channel and NIC drivers on Pure storage array. WHAT YOU'LL DO The Kernel and Driver development team is responsible for several areas Working for a team that deals primarily in various storage area network protocols such as Fiber Channel and Ethernet. On the initiator side, the team will be responsible for Linux initiator behavior attached to Flasharray. Focus is on NVME (ROCE, FC, TCP/IP) but also includes FC-SCSI (FCP) and iSCSI interfaces. This includes software development/fixes for Linux initiator stack, debugging initiator problems, and creating compatibility documents for Purity. For VMWare, focus is on debugging issues with VMWare as an initiator, and creating compatibility documentation. For FibreChannel and NIC Drivers, focus is responsibility for FC-SCSI driver stack for storage side and responsibility for NIC drivers on networking side. This includes responsibility for related code, utilities, enhancements supporting RAS, as well as debugging failures found internally and in the field. Maintain Linux kernels for internal testing Documenting supported configurations for customers Responsibility for evaluating Linux initiator behavior and optimizing for Pure Storage Flasharray. This includes correctness as well as optimizing for performances. Will contribute bug fixes and enhancemen

SonicWall is a cybersecurity forerunner with more than 30 years of expertise and is recognized as a leading partner-first company, ensuring our partners and their customers are never alone in the fight against cybercrime. With the ability to build, scale and manage security across the cloud, hybrid and traditional environments in real-time, SonicWall provides relentless security against the most evasive cyberattacks across endless exposure points for increasingly remote, mobile and cloud-enabled users. With its own threat research center, SonicWall can quickly and economically provide purpose-built security solutions to enable any organization—enterprise, government agencies and SMBs—around the world. For more information, visit www.sonicwall.com or follow us on Twitter , LinkedIn , Facebook and Instagram . Role Summary We are seeking a highly skilled Test Staff Engineer with deep expertise in Firewall/Security testing and strong hands-on automation . This role requires technical leadership, end-to-end ownership of test strategy for assigned components, and building scalable automation and test tools to ensure high-quality SonicOS releases. Key Responsibilities Own test strategy, planning, execution, and quality sign-off for SonicOS components Architect, develop, and maintain automation frameworks, pipelines, and test tools Drive an automation-first regression strategy and improve overall test coverage Perform complex system, integration, and upgrade/downgrade testing Partner with Dev/PM in design reviews, scrums, and defect triage Lead root-cause analysis and validation of critical customer issues Mentor engineers; review test plans, automation design, and coverage Drive release readiness, escape analysis, and quality metrics Must-Have Skills Minimum 4+ Years of experience in QA and Automation Strong Networking: TCP/IP, Routing, NAT, VLANs, Firewall policies Firewall/Security: VPN, DPI/App Control, IPS, Gate

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to foundries and partner closely wit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s SSD Hardware Architecture organization, where we develop the technologies that power next-generation storage solutions. We work across architecture, silicon, firmware, and product engineering teams to deliver high-performance SSD controllers that meet demanding standards for quality, reliability, and innovation. As a Staff SSD Hardware PCIe Engineer, you will play a key role in bringing advanced SSD controller technologies to life. This position offers the opportunity to lead PCIe subsystem validation, debug complex system-level challenges, and influence future product capabilities while collaborating with highly skilled engineering teams across the organization. Responsibilities: Develop hardware and system specifications from architectural and product requirements Lead PCIe bring-up, characterization, debugging, validation, and compliance activities for SSD controller SoCs Partner with architecture, verification, firmware, product engineering, and external IP vendors to resolve issues and improve functionality Drive system-level validation methodologies, automation, and test development to improve coverage and efficiency Perform root-cause analysis and validate PCIe functionality across complex SSD use cases Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field, or equivalent experien

Supabase is the Postgres development platform, built by developers for developers. We provide a complete backend solution including Database, Auth, Storage, Edge Functions, Realtime, and Vector Search. All services are deeply integrated and designed for growth. We are seeking a platform engineer to join our Edge & Networking squad. This team owns everything that happens at the network perimeter: API gateway, routing, load balancing, DNS, and secure global traffic distribution. You'll design, build, and operate systems that are both robust and highly automated — enabling us to to scale reliably while maintaining low latency and high availability across our global infrastructure. You will work closely with other infrastructure and product teams to ensure seamless integration, observability, and performance of our edge services. What You’ll Be Responsible for: Help build and maintain the Supabase Cloud offering; Design and implement Supabase’s global edge router platform; Build programmable, API-driven routing logic to dynamically steer customer traffic; Work with DNS, WAF, IP networking, TLS termination, CDN integrations, and global load balancing; Implement advanced observability: relevant metric and log capturing, latency measurements, traffic shaping, routing health, and failure mitigation. Optimize routing performance to minimize latency and improve reliability across cloud regions. Collaborate cross-functionally with other teams to integrate networking solutions into the entire Supabase stack; Improve our system architecture to reduce costs while balancing security, reliability, and performance; Design CI/CD systems to speed up deployments with proper change and release management processes; Participate in on-call rotations, incident response, and post-incident reviews for edge-related issues; Resolve escalated support issues, while also identifying and resolving systemic issues across the platform. You might be a fit if you have: 5+ years experience in SRE/D

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent builds AI and RISC-V compute hardware that requires best-in-class design tools and intellectual property to compete globally. The Sr. Strategic Sourcing Manager, Engineering Infrastructure leads procurement strategy for the design ecosystem, owning vendor negotiations, IP licensing agreements, and tool sourcing that enable our worldwide engineering teams to innovate at speed. The role suits someone who takes ownership of complex, multidimensional deals, operates independently with minimal oversight, and commands credibility with vendor executives, internal stakeholders, and the C-suite. This role is hybrid or remote, based out of Santa Clara, CA; Austin, TX or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A strategic negotiator with 5+ years of experience sourcing complex technology (IP, design tools, or semiconductor components) in fast-paced environments Someone who builds trust-based vendor relationships and leverages them to unlock better terms, faster delivery, and innovative solutions A detail-oriented operator who thrives managing multiple concurrent deals while maintaining executive visibility and cross-func