Ip Counsel Jobs

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design. This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A digital design expert with a deep understanding of computer architecture and IP microarchitecture. Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows. Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals. A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning. What We Need Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components. Performance-aware design decisions for compute, interconnect, or memory-heavy blocks. Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows. Strong synthesis and timing closure awareness to support backend

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Senior Security Engineer on GitLab’s Security Incident Response Team (SIRT), you will play a critical role in defending GitLab.com and the broader GitLab environment against evolving security threats. This role operates on a compressed 4-day work schedule, with a full-time week's hours condensed into four longer working days. Shifts run either Sunday through Wednesday or Wednesday through Saturday to provide 24/7/365 security coverage. You will lead high-impact incidents and investigations, drive continuous improvements in defense, detection and response capabilities, and help scale security operatio

Transform technology into opportunity as an F5 Administrator at Leidos. You will play a crucial role in configuring, maintaining, and troubleshooting F5 load balancing and traffic management systems to ensure high availability, reliability, and performance of critical applications and services for USCENTCOM on the CITS contract. The F5 Administrator is responsible for the configuration, deployment, and maintenance of F5 BIG-IP systems, ensuring the optimal performance, security, and availability of critical applications. This role involves hands-on technical work, troubleshooting complex F5-related issues, and collaborating with various IT teams to integrate F5 solutions within the broader network and infrastructure environment. The F5 Administrator will contribute directly to the mission success of USCENTCOM by maintaining robust and efficient application delivery services. Primary Responsibilities: F5 System Configuration & Maintenance Configure, deploy, and maintain F5 BIG-IP systems, including Load Balancers, Application Delivery Controllers (ADCs), and SSL offloading configurations. Design and implement traffic management rules, including global server load balancing (GSLB) and local server load balancing (LSLB). Manage F5 configurations for SSL/TLS offloading, including key and certificate management for secure communication. Configure and maintain F5 iRules to manage application traffic and provide enhanced functionality for specific use cases. Assist in performing F5 system upgrades, patches, and troubleshooting tasks to ensure continued system functionality. Assist in the design and implementation of new F5 solutions to improve application delivery, scalability, and security. Troubleshooting & Performance Optimization Troubleshoot and r

Job Details: Job Description: About the Group Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain. Intel Foundry will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC-V ecosystem IP's. Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. Come join us and do something wonderful. The Aerospace, Defense, Government (ADG) - The Senior DFT Logic Design Engineer provides technical support to Intel Foundry Services customers on our PDKs, DFT/DFM insertion, ATPG validation methodology and flows. The successful candidate will: Collaborate with internal teams across Intel and external stakeholders such as foundry customers' design teams, IP providers, and EDA vendors on issue resolution. Create content, application notes and deliver technical training/presentations. Drive quality of ASIC DFT/DFM and ATPG validation methodology, capability/flow and documentation for block level and SOC level. Support and provide Tool/Flow/Methodology on customer issues and challenges for successful c

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's ASIC Logic Design team develops next-generation ASICs and controller IP that enable industry-leading memory solutions. Working across advanced process technologies, the team collaborates with architecture, analog, verification, physical design, and validation engineers to deliver high-performance, production-ready silicon for future DRAM products. As an ASIC Digital Design Engineer, you will contribute to the design and development of RTL for next-generation DRAM memory controllers and subsystems. You will work in a collaborative engineering environment supporting design implementation, simulation, validation, and chip bring-up activities while leveraging AI-enabled tools to improve productivity and design quality. Responsibilities Design and develop RTL for DRAM memory controllers and subsystem components using SystemVerilog. Collaborate with analog, verification, physical design, validation, and other cross-functional teams to support successful product development. Develop and validate HDL models, support simulation and co-simulation activities, and analyze design functionality and performance. Support chip bring-up, debugging, and validation activities to identify and resolve design issues. Use scripting, automation, and AI-enabled tools to improve design workflows, productivity, and engineering efficiency. Minimum Qualifications 0-2 years of relevant experience through intern

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities 12+ years in Design Verification (experience with DDR/GDDR/DDR memory Verification is preferred) Define and drive verification architecture and methodology for next generation DDR designs. Develop verification plans, coverage strategies, and sign-off criteria. Architect and implement UVM-based testbenches and reusable verification components. Collaborate strictly with build teams to ensure verification completeness and quality. Mentor and guide verification engineers on guidelines and advanced methodologies. Evaluate and integrate AMS Co-Simulation techniques for mixed-signal IP verification. Work closely with EDA vendors to adopt the latest tools and flows. Leverage AI/ML tools to improve verification efficiency and debug turnaround time Develop or utilize AI-assisted regression analysis tools for failure classification Apply data-driven techniques to identify patterns in verification failures and silicon risks Contribute to automation initiatives such as Intelligent test generation, predictive coverage gap analysis, AI-driven waveform/debug analytics Required Skills & Qualifications Expert-level proficiency in SystemVerilog, UVM, and advanced verification methodologies. Familiarity with AMS Co-Simulation and mixed-signal verification flows (preferred). Hands-on experience with simulation, coverage analysis, and r

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! We are seeking a Principal or Member of Technical Staff (MTS) in Analog Design to join our DRAM IP Design team. As a Principal/ MTS, you will help shape the next generation of Micron's memory products, while working closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level analog and mixed-signal circuits for DRAM projects. Work with the internal data science team and EDA vendors to leverage and improve AI-assisted design flow and circuits optimization. Propose, evaluate and implement new or improved circuit topology to further enhance PPAC of the circuit block. Improve design verification scope and coverage to increase circuit robustness to enhance mass production yield. Partner with global design groups and provide layout guidance through post‑layout simulation. Compare silicon

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking an experience high-speed high-speed IO/Clocking Design Engineering at a Principal/Sr Member of Technical Staff (SMTS) level to join our DRAM IP Design team and contribute to the development of critical high-speed IP circuits used across Micron’s DRAM memory products. In this role, you will be responsible for the architecture, design, development, optimization, verification, and technical support of these high-speed IPs. You will focus on equalization and bandwidth extension to push the limits of circuit and process performance, analyze IO impairments as well as clock jitter and duty cycle distortion, and assess their impact on DRAM system timing. You will also develop core strategy and implement effective engineering solutions to address these challenges. Relocation to Micron headquarter in Boise, Idaho is required for this position. Responsibilities: Define, innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation resu

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. DEVELOP AND TEST FIRMWARE SSD products: Develop firmware IP subsystems for SSD products that meet or exceed the requirements of the technical spec matrix; including, but not limited to: Performance, Endurance, Capacity, Functionality, and Quality/Reliability Firmware Quality Assurance: Develop a firmware unit and functional tests that ensures the firmware subsystem meets the quality, functional, and performance requirements required at each integration breakthrough in the product development lifecycle COMMUNICATE EFFECTIVELY Dedicatedly provide management, multi-functional team members, and the firmware team with consistent, detailed, and accurate summaries of activities within firmware development. DEVELOP PEOPLE Multi-functional Teamwork: Develop and maintain collaborative, open and, constructive relationships with peers and management Team Development: Provide technical capability that continuously boosts team involvement, morale, and efficiency Personal Development: Work to continuously improve your technical capability and communication skills REQUIREMENTS Masters/Bachelors in Computer Engineering or Ele

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a member of the IP Protection team, you will build and operate data protection solutions that safeguard Micron's intellectual property throughout its lifecycle. You will partner with team members across all of Micron's business areas to identify and reduce data exposure risks, improve data governance, and enable secure collaboration both inside and outside the company. Responsibilities: Serve as the enterprise DLP authority, developing and managing data loss prevention policies spanning devices, electronic messaging, internet activities, cloud applications, and storage platforms. Develop and optimize advanced detection capabilities for source code, hardware designs, algorithms, product roadmaps, and other intellectual property using regex, fingerprints, EDM/IDM, and ML-based classifiers. Continuously tune DLP policies to reduce false positives and negatives while implementing automated remediation and tiered response workflows. Monitor and protect against data ex-filtration across key egress channels, including USB devices, email, SaaS applications, personal webmail, messaging platforms, generative AI tools, and cloud sync services. Develop detections for anomalous access and ex-filtration activities, such as bulk downloads, repository mirroring, and unusual after-hours behavior. Author and maintain information protection standards, DLP governance, runbooks, exception processes, and data points to measure program health an

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. DEVELOP AND TEST FIRMWARE SSD Products: Develop firmware IP subsystems for SSD products that meet or exceed the requirements of the technical spec matrix; including, but not limited to: Performance, Endurance, Capacity, Functionality, and Quality/Reliability Firmware Quality Assurance: Develop a firmware unit and functional tests that ensures the firmware subsystem meets the quality, functional, and performance requirements required at each integration breakthrough in the product development lifecycle COMMUNICATION Consistently provide Management, multi-functional team members, and the firmware team with detailed and accurate information. This includes activities within the firmware development organization and project status updates. DEVELOP PEOPLE Multi-functional Collaboration: Develop and maintain collaborative, open, and constructive relationships with peers and management Team Development: Provide technical capability that continuously improves team involvement, morale, and efficiency Personal Development: Work to continuously improve your technical capability and communication skills REQUIREMENTS Mast

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! We are seeking a Principal or Member of Technical Staff (MTS) in Analog Design to join our DRAM IP Design team. As a Principal/ MTS, you will help shape the next generation of Micron's memory products, while working closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level analog and mixed-signal circuits for DRAM projects. Work with the internal data science team and EDA vendors to leverage Agentic- AI and improve AI-assisted design flow and circuits optimization. Propose, evaluate and implement new or improved circuit topology to further enhance PPAC of the circuit block. Improve design verification scope and coverage to increase circuit robustness to enhance mass production yield. Partner with global design groups and provide layout guidance through post‑layout simulation. Com

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Security Firmware Engineer at Micron Technology Inc., you will be providing the technical capability in the creation and integration of Security Firmware IP for use in SSD products. The lifecycle of this responsibility is associated with the organization's product development life cycle and can range from product inception to obsolescence or any portion that is defined by specific assignments. You will also be responsible for providing technical support to implement the development and quality assurance processes necessary to insure the firmware IP consistently provides the required functionality, security, usability, quality/reliability, performance, and ensure Micron SSDs meet their design targets. Responsibilities: DEVELOP AND TEST FIRMWARE SSD products: Develop Security firmware IP subsystems for SSD products that meet or exceed the requirements of the technical spec matrix; including, but not limited to: Security,

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. DEVELOP AND TEST FIRMWARE SSD products: Develop firmware IP subsystems for SSD products that meet or exceed the requirements of the technical spec matrix; including, but not limited to: Performance, Endurance, Capacity, Functionality, and Quality/Reliability Firmware Quality Assurance: Develop a firmware unit and functional tests that ensures the firmware subsystem meets the quality, functional, and performance requirements required at each integration breakthrough in the product development lifecycle COMMUNICATE EFFECTIVELY Dedicatedly provide management, multi-functional team members, and the firmware team with consistent, detailed, and accurate summaries of activities within firmware development. DEVELOP PEOPLE Multi-functional Collaboration: Develop and maintain collaborative, open and, constructive relationships with peers and management Team Development: Provide technical capability that continuously improves team involvement, morale, and productivity Personal Development: Work to continuously improve your technical capability and communication skills AI RESPONSIBILITIES • Integrates AI-assisted tools and insights into daily work to improve efficiency,

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. DEVELOP AND TEST FIRMWARE SSD products: Develop firmware IP subsystems for SSD products that meet or exceed the requirements of the technical spec matrix; including, but not limited to: Performance, Endurance, Capacity, Functionality, and Quality/Reliability Firmware Quality Assurance: Develop a firmware unit and functional tests that ensures the firmware subsystem meets the quality, functional, and performance requirements required at each integration breakthrough in the product development lifecycle COMMUNICATE EFFECTIVELY Dedicatedly provide management, multi-functional team members, and the firmware team with consistent, detailed, and accurate summaries of activities within firmware development. DEVELOP PEOPLE Multi-functional Collaboration: Develop and maintain collaborative, open and, constructive relationships with peers and management Team Development: Provide technical capability that continuously improves team involvement, morale, and productivity Personal Development: Work to continuously improve your technical capability and communication skills AI RESPONSIBILITIES • Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exer