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Ip Counsel Jobs

570 active opportunities · Updated for October 2026

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Intel
📍 Leixlip• €53.2K – €98.8K/yr
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Job Details: Job Description: The Role and Impact You will be part of a highly skilled, agile design/verification team developing cutting-edge hardware for the NIC, IPU and AI domains. As an IP Design Verification Engineer, you will play a crucial role in ensuring the functionality and reliability of complex designs. You will develop verification plans, create test benches, and build environments to thoroughly validate meaningful parts of the chip — complex IPs and subsystems. Your work will directly contribute to identifying and resolving bugs in the pre-silicon environment using simulation and/or Formal Property Verification techniques, ensuring robust designs that meet high-performance standards. We are intentional, fast adopters of AI as a working tool. We bring modern AI assistants and automation into every part of the verification flow — planning, stimulus and checker development, coverage analysis, debug and more. Business group You will be joining Intel's Central Engineering Group (CEG), a global organization responsible for designing and verifying industry-leading IPs and architectures that power Intel's NIC, IPU and ASIC products. The group produces innovative technologies and solutions for hyperscalers , cloud providers, networking, AI and other specialized workloads. <d

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M
Micron
📍 Hyderabad• Full-time
Just now

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job responsibilities: Verification of High speed IPs like PCIe and sub-system using Best-In-Class methodologies and Processes Lead and Drive Deliverables for IP/SS Verification using SV/UVM based verification. Planning and Strategizing Team Execution towards Efficient, Scalable IP/SS Verification Environment and Methodologies Interact with Architecture and Design Team to establish standard flows and Deliverables alignments. Understanding to Architecture requirements and support till end product QS Work across a challenging schedule and maximize Teams efficiency using Automation, Portability and Reusability Lead and drive Silicon Bring up. Plan and ramp-up the team for enabling multiple IP/SS verification in parallel with High Quality and Efficiency Job Qualifications Bachelors/Masters in Engineering with Overall Verification domain experience of 14&#43; years Minimum 12&#43; years of experience in IP/SS verification using SV and UVM An expert level experience on PCIe protocols (Root-Complex, Endpoints and SR-IOV) Minimum 3&#43; years of Experience in managing teams of 10&#43; engineers and Leads Management Good experience in collaborating with engineering teams across multiple Geographies.

artificial intelligenceairecruitment
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal Analog Design Engineer to lead the design, integration, and delivery of advanced analog and mixed-signal IPs for High Bandwidth Memory (HBM) products. This role is critical in developing and integrating high-performance analog subsystems within the HBM logic die, enabling industry-leading bandwidth, power efficiency, and reliability. As a principal engineer, you will provide deep technical leadership across analog design, IP integration, system alignment, and silicon execution, driving end-to-end success of HBM solutions. Responsibilities will include, but are not limited to: Lead the d esign and own critical HBM analog circuits, including: High ‑ speed transmitters and receivers Clock generation and distribution (PLLs, DLLs, CDRs) SerDes ‑ related analog blocks Biasing, reference, and calibration circuits

airecruitment
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Duties include, but not limited to: Chipping in to the development of new NAND Flash Memory by assisting with the overall design, layout, and optimization of Memory/Logic circuits Supervising and own the full chip verification activities including planning, tracking, and criteria setting Drive multi-functional team in key features evaluation and recommend decision on architecture Driving innovation into the future Memory generation with dynamic work environment Proven ability to leverage AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies Leverage AI tools to automate the tools and workflow Applying Artificial Intelligence in workflows to improve build efficiency Successful candidates for this position will have: Broad knowledge and experience in IP Verificatipn is preferred Ability to lead multi-functional team in a project environment Good interpersonal skills with the ability to convey complex technical concepts in verbal and written form Proven knowledge of variousverification functionality on full chip level Proven expertise and background in Test Bench development in System Verilog Knowledge in verification methodologies such as UVM Knowledge of circuit simulators such as XA, hspice and/or hsim/Finesim, etc. 6-8 years of proven experience in Verification Degree or equivalent

artificial intelligenceairecruitment
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities of your team will include, but are not limited to: 1. Contributing to the development of new DRAM, emerging memory products and IP’s by enabling the overall design, layout, and optimization of Memory/Logic/Analog circuits 2. Supporting design validation & verification, reticle experiments and required tape-out revisions 3. Performing verification processes with modeling and simulation using industry standard simulators 4. Contributing to cross group communication to work towards standardization and group success 5. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure proper manufacturability of product 6. Proactively solicit inputs from Standards, CAD, modeling, Technology Development groups to ensure the design quality and reliability 7. Driving innovation into the future Memory generations within a dynamic work environ

pythonartificial intelligenceai
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Title: Principal Engineer – HBM Verification Location: Hyderabad, India Experience : 12&#43; years in Design Verification (experience with Pre-Silicon Verification OR DDR/GDDR/LPDDRmemory/SerDes PHY IP Verification is preferred) Role Description Join the Micron HBM team where you will drive verification architecture for next-generation HBM, ensuring robust methodologies and sign-off strategies. This role is perfect for a hands-on silicon verification expert who is passionate about developing best-in-class verification methodologies, testbench design, AI enabled verification and developing novel solutions to improve quality and efficiency of verification workflows. Key Responsibilities Define and drive verification architecture and methodology for next generation HBM designs. Develop verification plans, coverage strategies, and sign-off criteria. Architect and implement UVM-based testbenches and reusable verification components. Apply Formal Verification techniques for critical Collaborate strictly with build teams to ensure verification completeness and quality. Mentor a

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an SoC Physical Design Senior Manager, HBM in the Heterogeneous Integration Group (HIG), you will lead a team of physical design and physical verification engineers responsible for implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tapeout. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Recruit, develop, and mentor a team of physical design engineers delivering HBM base die products. Plan project resourcing requirements and timelines. Prioritize resources across projects and individual assignments to meet aggressive product delivery schedules. Drive physical implementation for SoC blocks and/or top-level including floorplanning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Collaborate with design and integration teams to ensure clean implementation of clocking/reset strategy, power architecture, and SoC integration requirements. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust

airecruitment
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I
8 days ago

Job Details: Job Description: The Role and Impact As a GPU Platform Hardware Design Engineer, you will play a pivotal role in designing and developing high-quality GPU hardware platforms that drive innovation in high-performance computing, graphics, and visualization technologies. You will lead the design process from initial feasibility studies through board layout, tapeout, and platform power-on, ensuring robust functionality and compatibility with industry standards. Your expertise in platform-level requirements, electrical engineering applications, and system bring-up will directly contribute to delivering cutting-edge GPU systems that accelerate Intel's leadership in computing. Business group The Data Center Group (DCG) is dedicated to advancing Intel's role in powering the digital world with leading-edge technologies. Focused on delivering innovative solutions for data center and cloud environments, DCG supports high-performance computing and graphics to enable capabilities such as AI, machine learning, and advanced visualizations. As part of the GPU IP Engineering team within DCG, you'll contribute to developing GPU systems that meet the evolving demands of the industry while supporting Intel's broader mission to create world-changing technology. Key Responsibilities - Design, develop, and evaluate electronic components, PCBs, and integrated circuits for GPU hardware platforms. - Translate platform-level requirements into detailed specifications and ensure adherence throughout the design process. - Define component placement and trace routing rules to optimize board layouts for performance, power, and signal integrity. - Conduct feasibility studies, board layout, tapeout, and platform power-on activities. - Perform functionality tests and utilize tools to verify platform configurations and compatibility. - Research, develop, and validate firmware, hardwa

machine learningairecruitment
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Job Details: Job Description: oin Intel Foundry Construction and Sourcing (FCS) in building the world's largest semiconductor manufacturing factories across the globe. The future is what we build. The scope of our work includes but is not limited to Advanced Packaging Factories, New Wafer Fabrication factories (Fabs), Fab Conversions, Process Tools Install, Infrastructure, and Progressive Build. We are looking for world-class technical talent to join our team. If you enjoy working with the latest technology in a rewarding, fast-paced environment, this is the right place for you. Everywhere you go, you'll find an opportunity to make a difference. In any given workday, you will be given the responsibility to innovate and create an impact on our business. The Install Qualification Operation Sr Specialist is responsible for driving key milestones enabling tool installation, readiness, and qualification within Intel Foundry Construction and Sourcing (FCS). The role is responsible for equipment install execution from pre-design through design finish and set to SL2 signoff, ensuring safe delivery, accurate scope definition, efficient construction, and prompt vendor qualification. This position requires five days per week of onsite presence and close coordination with manufacturing, design, construction, OEMs, trade contractors, and supplier partners. Please consider that this is an Intel Contract position (3 years). Responsibilities will include but are not limited to: Safety and Compliance: Champion Intel's Culture of Caring and ensure safe behaviors across design and construction activities. Enforce cleanroom, IP protection, and site protocols to maintain compliance with all applicab

project managementPMPprocurement
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ​Job Description Summary You will be responsible for Windows, PC, AV devices and asset management to provide technical support to employees for computer systems software and hardware. You will support the acquisition, installation, maintenance, and administration for Windows, PC software and hardware assets. You will work with world-wide Corporate teams to implement new solutions and meet business requirements. You will be expected to leverage Corporate standards to provide high-level customer services, including: - Training programs designed to educate an organization’s employee as new employee orientation program - Provide diverse IT supports as needed for specific business areas - Maintain an expert level of computer literacy including a working knowledge of the Operating Systems Detailed Job Description Responsible for Windows, PC, AV devices and asset management to provide technical support to employees for PC software and hardware. Experience in Windows OS, computer software and hardware maintenance. Familiar with the installation, operation, repair and troubleshooting of Microsoft Windows OS, including LAN TCP/IP knowledge related to problem research. Ability to analyze and solve problems for Microsoft Windows/Office 365/PC. Those with information-related certificates are preferred, such as MCSE or CCNA, etc. <span

artificial intelligenceairecruitment
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Senior Offensive Cybersecurity Test Analyst Company: The Boeing Company The Boeing Company is seeking a Senior Offensive Cybersecurity Test Analyst to support the Boeing Test & Evaluation (BT&E) cyber test capability. The selected applicant will join a highly technical Test & Evaluation team building an offensive cyber test capability in Berkeley, MO . This position will be providing testing services to Boeing Defense Space & Security (BDS) portfolio. The primary responsibilities will include Product Security (Cyber) test planning, integration, and execution, mission-based risk assessments, vulnerability assessments, and penetration tests. The selected applicant will become a Berkeley team member trained across the broader BT&E Product Security Capability team. Position Responsibilities: Lead execution of penetration tests to identify, exploit, and assess a target system’s vulnerabilities in a threat-representative manner on embedded systems and IP-based networks Subject Matter Expert for emulating advanced cyber adversary (advanced persistent threats) tactics, techniques and procedures (TTPs) Lead controlled attack simulations that test the effectiveness of a blue team and its capabilities to detect, block, and mitigate attacks and breaches</span

pythonlinuxrecruitment
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22 days ago

The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt mitigation across silicon, package, board, and platform. This role bridges architecture, silicon, and platform — translating product noise targets into shipped specifications, and feeding silicon findings back into the next generation's build. Success in this role requires strong systems thinking and a willingness to accept ambiguity. It also requires the ability to apply AI as a force multiplier while maintaining rigorous engineering judgment. What you'll be doing: Architect voltage-noise mitigation across the full stack — silicon, package, board, platform — and own the codesign trade-offs between them. Co-design noise features with Speed, Power, Reliability, Circuit Design , Power-Arch, ASIC, and platform teams. You're the connective tissue across the codesign web. Work with other team members to define product-level voltage noise targets, drive them to closure, and sign them off at shipment. Build and take ownership of the Sim-to-Si correlation methodology for noise. You know when a model is lying and when silicon is. Model and prototype next-gen noise features — transient sense, droop response, mitigation IP, and codify them so every future program inherits them. Lead show-stopper noise bugs during bringup. The critical issues stop with you. Drive architecture-level codesign tradeoffs across V/F Power Noise Reliability Thermal (Noise-Variation) and (Noise-to-Closure) boundary work, where the highest-leverage innovation lives. What we need to see: BS / MS / PhD in EE, CE, or related (or equivalent experience). 5&#43; years in silicon power integrity, voltage noise, or PDN. Deep expertise in at least one of

N
23 days ago

We are looking for an enthusiastic software engineer to join our AI networking acceleration team, to work on a groundbreaking open-source library, using hardware offloads, GPU Kernels and RDMA network cards. Our product is a performance-oriented low-level infrastructure, crafted to change the way inference works. We thrive as a team in a deeply strong environment, and we're passionate about innovation. The rewards are sweet and include working with some of the brightest people in the industry, an aggressive compensation plan that rewards top performers, and the opportunity to collaborate on products that transform daily the way people work and play. What you'll be doing: Developing a highly optimized inference framework Running on the world’s largest supercomputers and data centers. The work environment is dynamic and challenging as our employees work on innovative, next-generation products at the forefront of technology in terms of performance, scalability, and features. What we need to see: B.Sc. or equivalent experience in Computer Science or Software Engineering 6&#43; years of experience in modern C&#43;&#43; / C / Rust development 3 years of experience in Linux environment and familiarity with development tools Deep knowledge of the TCP/IP network stack Understanding of computer architecture and operating systems concepts Ways to stand out from the crowd: Background in Linux internals and low-level software optimizations (benchmarking, bottleneck research, performance tuning) Experience in programming CUDA kernels is an advantage Familiarity with ML frameworks and LLMs Background in parallel programming / high-performance computing / RDMA t

REMOTElinuxai
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ​Job Description Summary The role will be responsible for managing AV devices, assets, and Windows-based personal computers to provide technical support to employees for computer systems software and hardware. You will support obtaining, setting up, upkeep, and management of Windows, PC applications and hardware resources. You will collaborate with global Corporate teams to introduce new solutions and meet business requirement. You will be encouraged to follow Corporate standards to provide high-level customer services, including: - Training programs built to educate an organization’s employee as new employee orientation program - Provide diverse IT supports as needed for specific business areas - Maintain an expert level of computer literacy including a solid understanding of the Operating Systems Detailed Job Description Responsible for Windows, PC, AV devices and asset management to provide technical support to employees for PC software and hardware. Experience in Windows OS, computer software and hardware maintenance. Familiar with the installation, operation, repair and resolving issues in Microsoft Windows OS, including LAN TCP/IP knowledge related to problem research. Ability to analyze and solve problems for Microsoft Windows/Office 365/PC. Those with information-related certificates are preferred, such as MCSE or CCNA, etc. <

artificial intelligenceairecruitment
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NVIDIA builds the silicon behind AI, accelerated computing, and graphics. Every watt of performance and every degree of thermal headroom traces back to decisions made in power, performance, and thermal architecture. We are the Silicon Co-Design Group (SCG). We identify, own, and drive system-level co-design ideas. We start with initial concepts and advance to product differentiation across NVIDIA's roadmap. We are hiring a Principal System Power Management and Performance Architect who operates at the ambiguous boundary where workload behavior, silicon capabilities, firmware policies, and platform constraints collide, and who turns that ambiguity into architecture that survives across multiple silicon generations. SCG scope spans architecture, design, software, operations, platforms, and productization. This role shapes system, platform, and data center features and behavior, and partners with teams across NVIDIA. What You'll Be Doing: The work here is rarely well-defined when it arrives. You will be given problems that appear to be performance gaps or power anomalies and encouraged to build a framework for solving them, not just tackle a single instance. Define the multi-generation roadmap for system-level power and performance features, grounded in prototyping, use-case analysis, and cost/benefit trade-offs across segments. You will decide what problems are worth solving and why. Own the architecture and integration strategy for HSIO power management, DVFS, P-states, and low-power features. Your decisions improve product performance, power, and reliability across product lines — not just the current program. Lead system-level boot and IST architecture defining how power and clock domains initialize, sequence, and recover across complex multi-IP systems where the interaction space is large and the failure modes matter. Drive power management strategy at data

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