Ip Counsel Jobs

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will ensure functionality and performance of the system. This role is based out of Tokyo, Japan and offer flexible Hybrid work style. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Verify Tenstorrent’s digital IP and SoC logic at chiplet integration level, using industry standard verification methodologies Build and improve components of verification infrastructure including model builds and simulation/regression runs, Create verification components like testbenches, checkers and test generators, Add assertions and coverages along associated methodologies, Build verification test plans for subsystems, align them with project stakeholders, implement test suites, summarize the results and share feedback with project stakeholders Publish and review verification metrics and drive

Job Details: Job Description: About the Role The Client Computing and Physical AI Group (CCG) is shaping the future of AI-enabled computing experiences. We are seeking a highly motivated Senior Customer Solutions Architect, Graphics & AI to drive customer adoption of Intel's graphics and AI technologies across next-generation client platforms. In this role, you will serve as a trusted technical advisor to strategic customers and ecosystem partners, helping define, architect, validate, and optimize innovative graphics and AI solutions. You will work across hardware, firmware, software, and platform teams to translate customer requirements into scalable product solutions while influencing future technology roadmaps. This position blends deep technical expertise, customer engagement, cross-functional leadership, and innovation to accelerate the deployment of Intel AI and graphics technologies. What You’ll Do Key responsibilities will include but not limited to: Be the center point of contact for technical collaborations with the customer and with various internal teams. Own end to end architecture of customer solution in alignment with product and IP architectures, and its translation to product requirements. Co define test vehicle and validation strategy, and collaboratively manage the execute schedule and resource negotiation. Drive technology tradeoff decisions ensuring customer needs are met, along with satisfying standards and specifications, and execution reality. Be the customer voice and collaborate heavily with internal execution teams and manage customer dashboards. Participate and contribute in identifying critical technology solutions for future product needs and influence roadmap.

Overview: We are seeking a Junior IT Support Technician to join our IT Support Team. This role is ideal for someone passionate about technology and eager to provide IT system support. The role supports the Desktop Systems and General IT matters at the Guidepoint office in Shanghai. This includes triaging hardware and software issues, network problems and other IT tasks as assigned. What You'll Do: Provide helpdesk support to a technical and non-technical staff in a Windows/MAC environment Management of desktop systems, and applications (MS Office / Firefox, etc) Setting up and configuring new desktops and users Troubleshoot network issues, desktop application issues, security issues (Anti-virus, malware, etc) Available off hours to monitor and respond to support calls and alerts; Printer management; Audio/Video devices Provide remote support to global users Manage and support mobile devices Inventory management Maintain a knowledge base, documentation and administration procedures Research on new technology Knowledge of Ticketing systems/Helpdesk ( ManageEngine , ServiceNow , Jira etc) Basic troubleshooting /understanding : Azure environment , Endpoint , Intune , O365 Admin Portal / Exchange Online What You Have: Bachelor's Degree 3-4 years of experience with IT Support in a corporate office environment Previous internship/volunteering/extracurricular experience OS: Working knowledge of Windows OS. (Mac/Linux a plus) Networking: LAN, WAN, TCP/IP, DHCP, DNS, Active Directory Security: Data & Network security Network/traffic security (file/folder, content filtering, etc) Knowledgeable in Spy/Malware/Virus vulnerabilities Spam filtering; Knowledge of messaging protocols Hardware: Dell Laptops, Printers, Docking Stations, Monitors Applications: Basic Desktop applications, Application deployment and updates as needed Microsoft Suite, including Teams, O365 Office Suite Data recovery tools, Microsoft Office, QuickBooks, etc Telecommu

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an experienced CPU Architect/Micro-Architect to drive the next generation of high-performance RISC-V CPU Vector (RVV), Floating Point, and Matrix extensions. In this role, you will drive both the architecture and micro-architecture of compute execution units and subsystems that enable the efficient execution of modern high-performance computing (HPC), and AI inference/training workloads. Working closely with architects, software teams, silicon designers, and external IP partners, you will translate HPC/AI workload requirements into scalable CPU architectures that optimize performance, power, and area (PPA) while enabling future HPC/AI computing platforms. This role is ideal for an architect/micro-architect who enjoys working across hardware and software boundaries, defining next-generation compute architectures, and shaping how CPUs and HPC/AI workloads work together. This role is remote, based out of North America or Spain. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Passionate about designing next-generation compute architectures for AI, HPC, and large-scale datacenter systems. Experienced in CPU

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Job title Senior DFT Engineer Job description We are looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design. Your responsibilities Integrate and verify test features in digital designs for effective manufacturing testing and silicon debug. Key responsibilities include: Building entire chip-level DFT strategies Inserting DFTs, including scan chains, memory BIST, and JTAG Collaborating with RTL, physical design, and verification teams for testability throughout the design flow Scripting and automating DFT flows using industry-standard EDA tools (e.g., Cadence, Synopsys, Siemens) Running and analyzing ATPG and fault coverage reports Supporting silicon bring-up and debug related to test features Knowledge of advanced silicon technologies and methodologies for test coverage optimization Experience with formal verification and signoff of inserted DFT logic Strong communication and collaboration skills for cross-functional teamwork Exp

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design. This role is remote based out of the United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are You have a Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or Computer Science, along with 10+ years of relevant DFT experience. You have hands-on experience with industry-standard DFT tools such as Synopsys and Siemens, as well as scripting in TCL and Python. You bring expertise in DFT planning, SoC-level silicon debug, formal verification, and signoff of inserted DFT logic. You are a strong cross-functional collaborator who can assess risk, communicate resource needs, and deliver in a complex technical environment. What we need Build

About the Role Together AI is looking for a Senior Network Engineer to design, deploy, and operate the global network infrastructure supporting our production services and high-performance AI compute environments. This is a hands-on engineering role for someone with deep networking expertise who can also troubleshoot across Linux, Kubernetes, automation, and application boundaries. You will work on large-scale, multi-vendor data center networks and help ensure they remain highly available, reliable, scalable, and performant. The ideal candidate has strong networking fundamentals, experience operating complex networks at scale, and a structured, evidence-based approach to troubleshooting. You should be comfortable owning problems from initial investigation through root cause and resolution, including situations where the issue may extend beyond the network itself. Requirements 8+ years of professional experience designing, building, and supporting large-scale production data center, cloud, service-provider, or high-performance computing networks (excluding enterprise networks). Deep understanding of TCP/IP and strong experience with technologies such as BGP, OSPF, VXLAN, EVPN, ECMP, and QoS. Experience designing and supporting multi-tenant network environments using technologies such as VRFs, VLANs, overlays, and policy-based segmentation. Hands-on experience deploying and troubleshooting network platforms from vendors such as Arista, Cisco, Juniper, and NVIDIA. Strong troubleshooting skills using tools such as Wireshark, tcpdump, MTR, curl, nmap, and standard Linux networking utilities. Ability to diagnose connectivity, latency, packet-loss, routing, and performance issues across the network, host, and application layers. Experience developing or maintaining network automation using Python, Ansible, or similar tools. Experience working through a Git-based software development lifecycle, including branching, code review, validation, linting, testing, CI/CD, de

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to foundries and partner closely wit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s SSD Hardware Architecture organization, where we develop the technologies that power next-generation storage solutions. We work across architecture, silicon, firmware, and product engineering teams to deliver high-performance SSD controllers that meet demanding standards for quality, reliability, and innovation. As a Staff SSD Hardware PCIe Engineer, you will play a key role in bringing advanced SSD controller technologies to life. This position offers the opportunity to lead PCIe subsystem validation, debug complex system-level challenges, and influence future product capabilities while collaborating with highly skilled engineering teams across the organization. Responsibilities: Develop hardware and system specifications from architectural and product requirements Lead PCIe bring-up, characterization, debugging, validation, and compliance activities for SSD controller SoCs Partner with architecture, verification, firmware, product engineering, and external IP vendors to resolve issues and improve functionality Drive system-level validation methodologies, automation, and test development to improve coverage and efficiency Perform root-cause analysis and validate PCIe functionality across complex SSD use cases Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field, or equivalent experien

About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence. Job Summary Working within the Logical Design team, the Silicon Logical Design Engineer is responsible for a wide range of logical design tasks which require working closely with other engineers within the Silicon department. This person is responsible for helping the team deliver high quality micro-architecture specifications and RTL for Graphcore chips, and assisting the rest of the Silicon teams to ensure we can meet the company objectives for silicon delivery. Responsibilities and Duties Integrate IP and subsystems into top-level SoC designs Develop and maintain build and configuration environments Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level Support verification and physical design teams through clean interface hand-offs Debug and resolve integration-related issues across multiple hierarchies Contribute to the continuous improvement of integration flows and automation Producing high quality microarchitecture and other documentation Ensure good communication between sites to maintain consistent working practices Essential skills: Degree in Computer Science, Engineering or a related subject Digital design experience in a relevant industry Be highly motivated, a self-starter, and a team player Ability to work across teams and findi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. 勤務地：東京 Tenstorrentでは、AIサーバーおよび関連インフラの安定運用を支える Support Engineer. AI Infrastructure を募集しています。 本ポジションでは、GPUクラスタ、ストレージ、ネットワーク機器を含むシステムの保守・障害対応・予防保守を担当し、社内外の関係者と連携しながら、高可用性なAIインフラ環境の維持に貢献していただきます。 Who You Are ハードウェア保守・障害対応に強みを持ち、現場での迅速な切り分けと対応ができる方 顧客現場やデータセンター環境でのサポート業務を主体的に進められる方 Linuxサーバー、GPUサーバー、ネットワーク機器に関する基本的な知識と実務経験をお持ちの方 インシデント発生時にも冷静に状況を整理し、適切にエスカレーションできる方 国内外の関係者と協力しながら、正確で丁寧なコミュニケーションができる方 実務を通してAIインフラや高性能コンピューティング環境への理解を深めたい方 What We Need AIサーバーおよび関連システム（GPUクラスタ、ストレージ、ネットワーク機器等）の保守・点検・障害対応 サーバー障害時の一次切り分け、オンサイト修理、部品交換 NOC（Network Operations Center）やリモート監視ツールを用いた稼働状況の監視およびログ分析 トラブル発生時のインシデントレポート作成と関係者への報告 ファームウェア、BIOS、ドライバの更新対応 顧客向け定期点検および予防保守の計画・実施 エンジニアリング部門およびサポート部門と連携したエスカレーション対応 保守用在庫の管理、交換部品の配送調整 現場導入支援、設置・移設作業への立ち会いおよび主導 日本語および英語能力 Required Qualifications x86サーバー、もしくはにGPUサーバーの保守経験 ハードウェア障害の切り分けスキル（電源、メモリ、ストレージ、PCIe、GPU等） Linux環境（Ubuntu、RHEL、CentOS等）での操作経験 基本的なネットワーク知識（L2/L3、TCP/IP、DHCP、IPMI） 顧客現場での技術サポート経験、またはオンサイト対応経験 障害対応や保守作業に関するドキュメント作成経験 IPMItool、smartctl、nvidia-smi等の診断ツール使用経験 英語マニュアルの読解力、および海外サポート窓口とのやり取り経験 英会話能力（エンジニア間でのQ&Aが可能なレベル Nice to Have NVIDIA GPUサーバー（DGX、HGX等）やSupermicro、Inspur、Lambda等のハードウェア取り扱い経験 Ethernet、InfiniBand、NVLink、PCIeスイッチに関する知識 データセンターでの運用・保守経験 GPUベースのディープラーニングやAIワークロードに関する基礎知識 Linux shellスクリプトによる簡易自動化経験 普通自動車運転免許 英語での交渉能力および詳細なテクニカルコミュニケ~ションが可能 What You Will Learn 最先端のAIサーバーおよび高性能コンピューティング環

About the Role Together AI is looking for a Senior Network Engineer to design, deploy, and operate the global network infrastructure supporting our production services and high-performance AI compute environments. This is a hands-on engineering role for someone with deep networking expertise who can also troubleshoot across Linux, Kubernetes, automation, and application boundaries. You will work on large-scale, multi-vendor data center networks and help ensure they remain highly available, reliable, scalable, and performant. The ideal candidate has strong networking fundamentals, experience operating complex networks at scale, and a structured, evidence-based approach to troubleshooting. You should be comfortable owning problems from initial investigation through root cause and resolution, including situations where the issue may extend beyond the network itself. Requirements 8+ years of professional experience designing, building, and supporting large-scale production data center, cloud, service-provider, or high-performance computing networks (excluding enterprise networks). Deep understanding of TCP/IP and strong experience with technologies such as BGP, OSPF, VXLAN, EVPN, ECMP, and QoS. Experience designing and supporting multi-tenant network environments using technologies such as VRFs, VLANs, overlays, and policy-based segmentation. Hands-on experience deploying and troubleshooting network platforms from vendors such as Arista, Cisco, Juniper, and NVIDIA. Strong troubleshooting skills using tools such as Wireshark, tcpdump, MTR, curl, nmap, and standard Linux networking utilities. Ability to diagnose connectivity, latency, packet-loss, routing, and performance issues across the network, host, and application layers. Experience developing or maintaining network automation using Python, Ansible, or similar tools. Experience working through a Git-based software development lifecycle, including branching, code review, validation, linting, testing, CI/CD, deploymen

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Firmware Engineer at Micron Technology, Inc., you will build groundbreaking high-performance controller firmware for volatile and non-volatile memory systems. You will assist in the evaluation, creation, build, bench testing, debugging, and failure analyzes of firmware for new high-performance memory controllers and Solid State Drives (SSD) that will improve performance, while reducing power, latency and SoC (System on Chip) complexity for the target sectors. You can expect to partner multi-disciplinary Engineers seek multi-functional product development issues. You will triage failures, file bug reports, and help the development teams with isolating issues. DEVELOP AND TEST FIRMWARE SSD products: Develop firmware IP subsystems for SSD products that meet or exceed the requirements of the technical spec matrix; including, but not limited to: Performance, Endurance, Capacity, Functionality, and Quality/Reliability Firmware Quality Assurance: Develop a firmware unit and functional tests that ensures the firmware subsystem meets the quality, functional, and performance requirements required at each integration breakthrough in the product development lifecycle COMMUNICATE EFFECTIVELY Dedicatedly provide managem

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Staff Verification Architect and shape modular, scalable verification solutions for next-generation HBM DRAM products across multiple customer platforms! You will be part of a highly multi-functional team of technical domain experts. You will collaborate closely with Design Engineering, Product Engineering, Business Units, and external customer teams to ensure our future HBM roadmap is successful. You will apply your thorough understanding of testbench architecture, custom and SoC verification methodologies, and 2.5D & 3D package integration to analyze bottlenecks and propose innovative solutions targeting scalability, quality, and verification cycle time. Responsibilities: Deliver high-quality, on-time verification plans and architecture collateral across IP-level and SoC-level verification, and develop turnkey solutions for future designs based on look-ahead information from customers and the architecture team Drive co-verification through direct customer interactions, and mentor early-career engineers to strengthen team capability and tech

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering,