Micro Optics Engineer in Jalisco

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Optical Proximity Correction (OPC) entry level engineer / technician, you will work in Micron’s reticle data preparation organization to process reticle design data through OPC enabling our Production and R&D fabs to print on wafer using photolithography as intended by the Designers. Your responsibilities will encompass a broad range of teams to ensure inputs and outputs to the tapeout process are accurate and of the highest quality. Interested candidates should be comfortable working across time-zones and interfacing with peers in US, Japan, and India to Passdown and maintain operations around the clock to help Micron improve our speed of development and response times to the needs of our Manufacturing and R&D Fabrication Facilities Responsibilities include, but are not limited to the following: Active participation in OPC production environment as an important part of reducing cycle time for each job requiring collaboration with the Mask and Litho Development teams to advocate the use of best-known methods (BKM) Watch notifications sent by the system, follow up with preliminary investigations, forward key information to appropriate team members and notifications when necessary to keep all aspects of day to day production running efficiently. Interact with a wide range of internal customers and collaborators and effectively communicate with the different groups in the tapeout flow in order to coordinate work load and field preliminary questions, Be able to provide i

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description As a Supply Chain Planner at Micron Technology, Inc. , you will play a key role in aligning supply chain operations with strategic business objectives for assigned product lines. You will proactively manage supply fulfillment, inventory positioning, and demand alignment through data-driven analysis, planning systems, and ERP tools. In this role, you will collaborate with global cross-functional teams to execute supply plans, address risks and opportunities, and ensure supply chain performance supports revenue goals and customer commitments. Success in this position requires strong analytical capabilities, problem-solving skills, leadership, and the ability to influence stakeholders across the value chain. This position is based in Guadalajara, Mexico , and requires daily on-site work. Responsibilities Publish supply responses for customer demand, backlog, factory plans, material plans, die mix plans, and inventory replenishment strategies. Manage and communicate supply risks and opportunities to relevant business processes and stakeholders. Collaborate with global cross-functional teams to drive execution and ensure timely resolution of urgent action items. Position supply and inventory strategically to support revenue objectives and customer requirements. Develop an understanding of supply chain processes, including demand management, S&OP, inventory management, manufacturing, logistics, and fulfillment. Minimum Quali

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Design and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. Effectively communicating with Global engineering teams to assure the success of layout project. Minimum Qualification: 5+ years of experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, Fin

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Lead Principal Engineer, Layout Design at Micron, you will be at the forefront of developing groundbreaking memory solutions! This role is an outstanding opportunity to lead the physical implementation of modern DRAM and mixed-signal circuits, turning schematics and specifications into flawless, manufacturable layouts. You will collaborate with a world-class team of Circuit Designers, Verification Engineers, CAD/Methodology experts, Process Integrators, Product Engineers, Test/Probe specialists, Assembly professionals, and Marketing strategists. Together, we will drive cost, quality, reliability, time-to-market, and customer happiness through outstanding layout and build. Key Responsibilities Lead the layout build and physical realization of new memory products. Interpret device and circuit specifications to implement custom layout solutions meeting PPA (power, performance, area) and reliability targets. Develop hierarchical layouts for analog, digital, and memory-array-related circuitry using industry-standard EDA tools. Build block and top-level floorplans optimizing placement, routing resources, signal integrity, power delivery, and manufacturability. Optimize layout for critical metrics such as die size/area efficiency, matching, coupling/noise, and timing. Produce layout collateral and documentation for cross-team integration. Physical Verification and Tapeout Signoff Run and debug physical verification flows and ensure closure using indust

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description For more than 47 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life for all. Become an Engineer CAD at Micron Technology in Guadalajara. Contribute to innovative memory designs impacting HBM, DRAM, and new technologies. Responsibilities: Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center. Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop advanced capabilities, ensuring the deployment of outstanding practices and methodologies. Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation. applying Artificial Intelligence Minimum Qualifications: Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering. 5+ years of direct CAD or Design experience in mixed

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Optical Proximity Correction (OPC) entry level engineer / technician, you will work in Micron’s reticle data preparation organization to process reticle design data through OPC enabling our Production and R&D fabs to print on wafer using photolithography as intended by the Designers. Your responsibilities will encompass a broad range of teams to ensure inputs and outputs to the tapeout process are accurate and of the highest quality. Interested candidates should be comfortable working across time-zones and interfacing with peers in US, Japan, and India to Passdown and maintain operations around the clock to help Micron improve our speed of development and response times to the needs of our Manufacturing and R&D Fabrication Facilities Responsibilities include, but are not limited to the following: Active participation in OPC production environment as an important part of reducing cycle time for each job requiring collaboration with the Mask and Litho Development teams to advocate the use of best-known methods (BKM) Watch notifications sent by the system, follow up with preliminary investigations, forward key information to appropriate team members and notifications when necessary to keep all aspects of day to day production running efficiently. Interact with a wide range of internal customers and collaborators and effectively communicate with the different groups in the tapeout flow in order to coordinate work load and field preliminary questions, Be able to provide information regarding sta

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a DRAM Design Engineering Group at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned Dram product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures. Responsibilities: Responsible for Design and development of IP layouts used in DRAM chips. Perform layout verification like LVS/DRC/EM, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. G

Sr Engineer, Memory CAD, Guadalajara — Jalisco, Mexico. Apply via Workday.

SENIOR ENGINEER HBM LAYOUT — Jalisco, Mexico. Apply via Workday.

PRINCIPAL ENGINEER HBM LAYOUT — Jalisco, Mexico. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has transformed innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are redefining how the world uses information to enrich life. We are looking for Layout Build engineer at our Micron Technology’s DRAM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Build and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for timely delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Optimally copresentingith Global engineering teams to assure the success of layout project. Minimum Qualification: Around 5 years of experience in analog/custom layout design in sophisticated CMOS process, in various technology nodes (Planar, FinFET). <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has been at the forefront of innovation, delivering the world’s most advanced memory and semiconductor technologies. Our distributed team of engineers, scientists, and visionaries is developing groundbreaking solutions that redefine how the world uses information to enrich life for all. We are seeking a Layout Design Engineering Manager to join Micron’s High Bandwidth Memory (HBM) organization in Guadalajara, Mexico. In this leadership role, you will guide a distributed team focused on developing complex analog, mixed‑signal, and custom layouts powering next‑generation AI and high‑performance computing solutions. Responsibilities Manage a team responsible for crafting and developing critical layouts for analog circuits, mixed-signal components, and custom blocks, including support for full-chip-level integration. Oversee layout verification activities, including LVS, DRC, Antenna checks, documentation, and quality reviews. Ensure timely and high‑quality delivery of block‑level layouts that meet all project requirements. Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple concurrent projects. Mentor and guide layout engineers of all levels. Perform detailed reviews of sub‑block‑level layouts. Collaborate with global engineering teams to drive successful project execution and alignment across Micron’s worldwide footprint. </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Design layout for leaf cells, standard cells (Stdcell), or sub-blocks. Apply a systematic, meticulous, and methodical approach to IC layout design. Interpret DRC/LVS and other physical verification checks to ensure design accuracy. Demonstrate ownership and proactively plan work to meet project timelines. Collaborate effectively with internal teams to ensure successful layout project execution. Minimum Qualifications Bachelor’s, Master’s, or PhD in Electronics, Mechatronics, Robotics Engineering, Nanotechnology, or related fields. Graduation within the last 2 years (Bachelor’s, Master’s, or PhD). Strong knowledge of electronic circuit concepts. Experience using circuit simulation and design tools. Effective interpersonal and problem-solving skills. English communication skills (conversational level required). Self-motivated, enthusiastic, and collaborative standout colleague. Passion for technology and willingness to grow in the semiconductor industry. Preferred Qualifications Internship or academic project experience in pre-silicon circuit design. Understanding of pre-silicon development areas such as analog circuits and physical design. Basic knowledge of MOS concepts, semiconductor fabrication, and analog layout fundamentals. Strong interpersonal skills and goal-oriented perspective. Experience with programming or script

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming the ways people around the globe engage with information to improve life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Design and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Effectively communicating with Global engineering teams to assure the success of layout project. Minimum Qualification: 5&#43; years of experience in analog/custom layout design in advanced CMOS process, in various

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s AI Enablement team and help accelerate enterprise-wide AI adoption. This role is designed for engineers passionate about applying AI to real-world business challenges. You will work on rapid prototyping, automation, and integration of AI solutions that enhance productivity and innovation across diverse business areas. Responsibilities: AI Solution Development: Build and deploy AI-driven tools and workflows using platforms like Copilot Studio , UiPath , and other automation frameworks. Integration & Enablement: Connect AI agents with enterprise systems (e.g., SharePoint, M365), external APIs, knowledge bases, and ensure seamless interoperability. Process Automation: Identify repetitive tasks and design intelligent automation solutions to improve efficiency. Collaboration & Training: Partner with