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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the Technology - Advanced Modeling and AI Solutions (AMAIS) Group in Hyderabad, you will work in a multi-functional team of engineers highly skilled in the modeling of process, equipment, structures, and materials. This team’s primary responsibility is to support and enable solutions to Micron’s most significant challenges in Memory development and manufacturing. Your role will be to work on a project that directly supports one of our group’s critical programs. This project will involve materials or structure or process modeling. You are expected to work in a dynamic and fast-paced team environment developing models and reporting results to the AMAIS team and collaborating with them on next steps. This position seeks individuals that can code, implement, and utilize numerical models. You will interact with process engineers and development teams to identify questions and issues hindering the node development milestones. Additionally, you will create software programs, algorithms, and computational modeling tools to extract concrete insights from modeling and data. You will interpret and convey these insights and findings from models and experiments to engineering teams and leaders. You will be responsible for predictive structure modeling across multiple DRAM and NAND nodes. The modeling engineer will collaborate extensively with product design and process teams for structure model development, deployment, and providing solutions to be implemented on Silicon. Qualifica

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Process Integration Engineer working in the fast-paced DRAM R&D Memory Group, you will be instrumental in developing Micron's core memory technology critical for AI-enabled customers. The R&D development takes place in an industry-leading 300mm facility which is adjacent to our newly announced Manufacturing facility (currently under construction). Your focus will be on driving front-end process integration for future DRAM technology nodes, owning integration schemes, DOEs, and silicon learning from development through transfer to manufacturing. You will strengthen that work with device and process modeling, using simulation and device physics to build predictive insight, shorten learning cycles, and guide integration decisions. This is an integration role first; modeling is a tool you bring to it, not a standalone assignment. Responsibilities include, but not limited to: Own process integration for assigned DRAM FEOL modules: define integration schemes, drive unit process and module interactions, and deliver on technology node milestones. Design and execute DOEs on silicon, analyze inline, parametric, and yield data, and drive root cause to resolution. Apply device and process modeling (TCAD, Silvaco, Sentaurus, or comparable) to evaluate process interactions, device behavior, and scaling options, and to prioritize experiments before committing silicon. Correlate simulation results with experimental and silicon data to improve model accuracy and deepen process understanding.</li

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description •Responsible for the strategic ,tactical planning and execution to meet the business plan within budget, this includes but not limited to short and mid-term capacity planning, automation enablement, equipment performance continual improvement, human resources organization, management, technical and leadership development. •Lead the adoption of AI-enabled engineering and management practices to improve equipment reliability, manufacturing efficiency, resource optimization, and business performance. •Drive the integration of AI, advanced analytics, automation, and digital solutions into engineering workflows, problem solving, capacity planning, maintenance strategies, and operational decision making. Identify and prioritize AI use cases that deliver measurable business impact, promote the effective use of Microsoft Copilot and approved AI tools across the organization, and develop team capabilities in AI-assisted engineering, data-driven decision making, and continuous improvement to support Micron's AI transformation journey. Responsibilities and Tasks •To drive equipment performance continual improvements. Work with the PEE and IE to assess and audit the capacity of each workstation in the strategic and tactical timeframe, identify increased throughput opportunities as well as risks to meet Cycle Time and Business Plan goals. Develop action plans to maximize opportunities and mitigate risks. •Work with PIE and SIC team on new technology node

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description •Responsible for the strategic, tactical planning and execution to meet the business plan within budget, this includes but not limited to short and mid-term capacity planning, automation enablement, equipment performance continual improvement, human resources organization, management, technical and leadership development. •Lead the adoption of AI-enabled engineering and management practices to improve equipment reliability, manufacturing efficiency, resource optimization, and business performance. •Drive the integration of AI, advanced analytics, automation, and digital solutions into engineering workflows, problem solving, capacity planning, maintenance strategies, and operational decision making. Identify and prioritize AI use cases that deliver measurable business impact, promote the effective use of Microsoft Copilot and approved AI tools across the organization, and develop team capabilities in AI-assisted engineering, data-driven decision making, and continuous improvement to support Micron's AI transformation journey. Responsibilities and Tasks •To drive equipment performance continual improvements. Work with the PEE and IE to assess and audit the capacity of each workstation in the strategic and tactical timeframe, identify increased throughput opportunities as well as risks to meet Cycle Time and Business Plan goals. Develop action plans to maximize opportunities and mitigate risks. •Work with PIE and SIC team on new technology node

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Senior Professional Services Engineer at GitLab, you'll work directly with customers to deliver installation, migration, training, and advisory services that help them adopt GitLab successfully. You'll lead engagements from single-node Omnibus installs to large reference architectures built with infrastructure as code (IaC) and configuration as code. You'll also guide migrations from other systems to GitLab SaaS or self-managed deployments, and help customers make practical decisions that improve reliability, security, and day-to-day workflows. In this role, you'll work closely with customers and Git

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Design Engineering Group (DEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! As a Design Engineer, you will help shape the next generation of Micron’s memory products. You’ll work closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level circuits for DRAM projects Compare silicon performance with simulation results and support correlation activities Collaborate with process integration and modeling teams on new process node development Partner with global design groups and provide layout guidance through post‑layout simulation Minimum Qualifications: Bachelor’s degree in Electrical Engineering with 2&#43; years of semiconductor design or manufacturing experience Demonstrated experience in mixed-signal, digital, or analog IC design Experience designing regulators, charge pumps, oscillators, current references, bandgaps, or comparators Proficiency with SPICE and Verilog modeling and simulation Experience working wi

Job Details: Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Life at Intel: https://jobs.intel.com/en/life-at-intel As a Yield Development Engineer, you will be at the forefront of advancing Intel's cutting-edge process technologies within our Logic Technology Development (LTD) organization. This pivotal role involves identifying root cause yield limiters and driving solutions that enhance manufacturability and yield across technology nodes. You will work within a dynamic, fast-paced environment to ensure the successful introduction of new products, process improvements, and robust methodologies to meet manufacturing goals. Your expertise will directly contribute to Intel's ability to deliver world-class semiconductor solutions and advance the future of computing. About Intel Foundry At Intel, the Foundry Technology Development (TD) unit is the driving force behind Moore's Law, enabling us to create groundbreaking technology that enriches lives globally. With over 15,000 dedicated employees, Foundry TD spearheads innovative research, develops next-generation processes and packaging technologies, and manages high-volume manufacturing in state-of-the-art facilities. Within Intel Foundry TD, our Logic Technology Development (LTD) organization is at the forefront of creating and refining each process technology node, paving the way for tomorrow's computing solutions. Your responsibilities as a Product Yield Development Eng

This is where your work makes a difference. At Baxter, we believe every person—regardless of who they are or where they are from—deserves a chance to live a healthy life. It was our founding belief in 1931 and continues to be our guiding principle. We are redefining healthcare delivery to make a greater impact today, tomorrow, and beyond. Our Baxter colleagues are united by our Mission to Save and Sustain Lives. Together, our community is driven by a culture of courage, trust, and collaboration. Every individual is empowered to take ownership and make a meaningful impact. We strive for efficient and effective operations, and we hold each other accountable for delivering exceptional results. Here, you will find more than just a job—you will find purpose and pride. Baxter is seeking an experienced DevOps Engineer to support enterprise cloud platforms that securely connect medical devices and clinical applications with Baxter and third-party systems. This role will design, automate, deploy, and support cloud infrastructure across multiple environments. The successful candidate will bring strong technical skills, personal ownership, and the ability to collaborate effectively within a regulated healthcare environment. Key Responsibilities: Design, deploy, and maintain Azure infrastructure using Terraform and infrastructure-as-code principles. Build and support Azure Kubernetes Service (AKS) infrastructure, including clusters, node pools, namespaces, workloads, resource configurations, ingress, networking, and scaling. Develop and maintain Helm charts, Kubernetes manifests, and environment-specific configurations. Develop and maintain secure CI/CD pipelines using Azure DevOps, GitHub Actions, and related automation tools. Support Azure services including PostgreSQL Flexible Server, Cosmos DB, Az

NVIDIA’s Silicon Co-Design Group sits at the crossroads of architecture, silicon, systems, and manufacturing, where first-principles thinking and engineering judgment at the highest level translate directly into product outcomes at scale. We are looking for a Principal Performance and Manufacturing Architect who has built the models, defined the specs, and seen them validated through silicon. You have owned the connection between design intent and manufacturing reality, not as a reviewer or a contributor, but as the person who set the methodology and proved it worked. You turn ambiguous physical phenomena into quantified, defensible margin terms. You do not wait for data to confirm your hypothesis; you design the experiment that gets it. You improve how the organization ships products after every program. The exceptional hire also uses AI deliberately — with proven workflow impact and the judgment to know where it compresses real work and where it introduces risk. What you'll be doing: Own the physics, from mechanism to margin. Build first-principles models connecting AVF, defect mechanisms, and DVFS transients to field FIT, system-level yield, and DPPM vs. coverage — calibrated per node and population shift — so every margin term in the V/F curve and P-state table is named, sourced, and defensible. Set the screen that resolves escapes. Specify ATE and SLT voltage, frequency, and timing conditions that capture worst-case transient VF windows — making it unambiguous whether a marginal defect or timing violation is detected or escapes at every manufacturing stage. Make the POR the authoritative source. Author the methodology document for each program and drive alignment across build, product definition, reliability, and test engineering — so every team is making decisions from the same model. Prove the model before produc

This is a 12- month contract. This position is for temporary engagement through our staffing partner, Yoh Enterprise Solutions. Insomniac Games is looking for a VFX Artist. In this role the VFX Artist is responsible for creating VFX to work and assist in gameplay, environments, and cinematics of games. ESSENTIAL FUNCTIONS AND RESPONSIBILITIES Creates, designs, and implements real-time particle effects using both static and animating 2D/3D elements. Placing of visual FX across all areas of the game, including environmental and gameplay FX, and cinematics. Create FX textures (color, normal, specular, ambient occlusion, height, and incandescent maps.) Possesses at least an intermediate ability to navigate and use DCC software such as Maya, Houdini, or equivalent. Creates FX shaders with node-based shader networks. Creates simple geometry and UV sets. Possesses an intermediate foundation in computer graphics fundamentals and artistic analysis Optimizes FX for framerate and memory. Collaborates with other development departments to ensure that FX are implemented appropriately in the game engine. Understands and adds to the overall art style of game. Orchestrates FX events involving layering and timing of different FX to create a believable scene. Demonstrated professionalism in attendance, communication, reading comprehension, receiving feedback and working in a production setting. Other duties may be assigned Reasoning Ability : Ability to define problems, collect data, establish facts, and draw valid conclusions. Ability to interpret an extensive variety of technical instructions in mathematical or diagram form and deal with several abstract and concrete variables. Computer Skills : Proficient in Maya, competent working with joints and locators, keyframing, rigid body simulations, hard surface modeling, and UV mapping. Proficient in Photoshop for painting and editing textures. Proficient with node- based shader networks. Knowledge of other visual e

NVIDIA is seeking a Senior System Architect: Heterogeneous EDA Systems to solve a complex challenge in accelerated computing: Failure Attribution at Scale. As EDA or equivalent experience workloads scale across thousands of heterogeneous nodes, a single failure can cause massive resource waste. We need an engineer to develop and build an automated framework. This framework will ingest telemetry from CPU and GPU clusters to identify the root cause of job failures in real-time. It will distinguish between hardware faults, infrastructure instability, and software defects. What you'll be doing: Architect Failure Attribution Frameworks: Build a scalable &#34;flight recorder&#34; for EDA jobs that captures high-fidelity state across the CPU, GPU, and Fabric at the moment of failure. Build automated diagnostics that correlate GPU XID errors, PCIe bus failures, and CUDA memory exceptions. Connect these errors with system-level events such as OOM kills or NUMA-related hangs. Distributed Logging & Tracing: Implement low-overhead tracing mechanisms (using tracing tools or custom agents) that provide access to job execution across multi-node Slurm or Kubernetes clusters. Root Cause Automation: Develop heuristics and models based on machine learning to classify failures as &#34;Hardware Fault,&#34; &#34;Software Bug,&#34; or &#34;Environment Issue.&#34; This reduces the Mean Time to Identify (MTTI) for R&D teams. Resiliency Engineering: Work closely with hardware and infrastructure teams to define &#34;signals of impending failure,&#34; enabling proactive job migration or check-pointing before a crash occurs. What we need to see: Distributed Systems Mastery: BS, MS, or PhD in Computer Science or Electrical Engineering (or equivalent experience) with 6&#43; years in systems programming. Experience building automated

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description As a senior Manager, you will be responsible for the strategic ,tactical planning and execution to meet the business plan within budget, this includes but not limited to short and mid-term capacity planning, automation enablement, equipment performance continual improvement, human resources organization, management, technical and leadership development. Responsibilities and Tasks Work with Equipment team to drive equipment performance continual improvements. Work with the PEE and IE to assess and audit the capacity of each workstation in the strategic and tactical timeframe, identify increased throughput opportunities as well as risks to meet Cycle Time and Business Plan goals. Develop action plans to maximize opportunities and mitigate risks. Work with PIE and SIC team on new technology node and new part types line readiness matrix. Work with HVM/ADTT PEE and EE on area constraint management/improvements (dynamic constraints) . Work with OI team on area MAS scheduling, automation, line management systems and successfully roll out to the shift team. Work with Engineering team on tool qualification, release and install requirements, and maintenance priorities. Work with PIE yield improvement and quality. Work closely with other departments to meet the needs of the Fab and build strong peer relationships. Develop organization resource plans, training plans and business processes within organization operation to meet Business Plan. <span

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. Senior Software Engineer — Cortex Training The Snowflake ML Platform team's mission is to let customers run their most demanding ML/AI workloads inside Snowflake. Cortex Training is our LLM post-training platform: it turns scarce, expensive GPU capacity into a simple, composable service, so customers can adapt open-weight foundation models to their own business problems while we handle the hard distributed-systems parts, including scheduling, orchestration, multi-node training and inference, fault tolerance, and throughput. The platform already runs post-training at scale. Under the hood, it decouples GPU computation from the training loop and exposes it as primitive APIs that compose into everything from SFT to full RL workflows. You'll work alongside a team that ships fast & sweats reliability and the researchers behind DeepSpeed. We're looking for an engineer who thrives in the ML infrastructure layer and brings a solid understanding of LLMs and post-training to help us scale and grow it. YOU WILL: Design and build across the full stack — from the public training APIs and SDK through the control plane to the GPU data plane. Scale the distributed systems that make GPU compute serverless — multi-tenant scheduling, placement, and capacity-aware routing across regional G

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today, SpaceX is actively developing the technologies to make this possible, with the ultimate goal of making life multiplanetary and expanding consciousness to the stars. SpaceXSI is building Super Intelligence to help humanity understand the universe. Our teams are building the full Super Intelligence stack: from our Colossus supercomputers, to Grok models, to our suite of applications, including Grok Bot, Grok Build, Grok Imagine, Grok Voice, and X. We're creating a powerful flywheel where more compute trains better models, better models power more useful products, and what we learn from people using those products shapes what we build next. ABOUT THE ROLE: As the Director of Site Operations, you’ll own node and rack uptime for SpaceXSI's AI supercompute cluster—the most advanced of its kind. This role is the extreme owner of cluster health and customer Service Level Agreements across 5+ sites operating 24/7. You’ll lead a 250+ person organization of site managers, shift supervisors, and technicians, plus the site reliability engineering team that monitors cluster health and drives fault mitigation at scale. We’re looking for a hands-on operations leader who can build a culture of excellence and accountability, partner tightly across the company, and keep uptime exceptional as we grow. RESPONSIBILITIES: Own Cluster Uptime: Serve as extreme owner of node, rack, and cluster health across 5+ sites running 24/7, accountable for customer Service Level Agreements and consistently exceptional uptime on SpaceXSI's supercompute cluster. Lead a Large Operations Organization: Direct a 250+ person team spanning site managers, shift supervisors, and technicians across four 24/7 shifts, building a culture of excellence and accountability at every layer of the org. Drive Node and Rack Remediation: Ensure systematic recovery of fai

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary: We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing. Your responsibilities include but are not limited to developing and enabling deployment of processes related to the post-fab wafer finishing processes in semiconductor manufacturing to meet performance, cost, manufacturability, quality, reliability and schedule requirements. You will have opportunity to work with peers and partners across organizations to coordinate the development and launch of new technologies and integration flows for solutions that drive the future. Main Responsibilities: Process Development: Establish and improve process management projects to deliver technology node requirements and scaling for next node for wafer level process conditions and technologies including photolithography, dry etch, CMP, wet process, de