Packaging Artwork Design Assistant Jobs

Job Details: Job Description: The Role and Impact We are seeking a Silicon Packaging Design Architect to join our team, where you will drive end-to-end package solutions for physical, electrical, and cost requirements. In this senior engineering role, you will collaborate with cross-functional teams to design, troubleshoot, and continuously improve packaging standards and processes, ensuring high-quality package output. Your contributions will directly impact the seamless transition of designs to production and enhance Intel's advanced packaging technologies. Business Group As part of Intel Corporation's dynamic and innovative ecosystem, this role resides within the Silicon Packaging Architecture team, focused on developing advanced packaging solutions that enable Intel's cutting-edge silicon technologies. The team plays a vital role in ensuring packaging, and 3D IC designs meet technical, mechanical, and reliability standards while supporting Intel's broader mission to drive world-changing advancements in technology. Key Responsibilities Translate product requirements into detailed package architecture specifications. Drive technology tradeoff decisions to ensure silicon packages conform to electrical, mechanical, thermal, and reliability standards. Collaborate with silicon, hardware, and package teams to deliver high-quality package solutions and overcome roadblocks. Oversee the end-to-end package development process, including design, procedures, and continuous improvements to quality standards. Troubleshoot packaging designs and resolve issues related to materials and processes, providing innovative and cost-effective solutions. Implement co-design strategies between silicon and board design teams to optimize product

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Packaging Modeling Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for thermal modeling and simulation of various packaging solutions from silicon redistribution layers to IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Thermal modeling and simulation of packaging hardware to understand how heat flows from silicon test chips through various heat spreader hardware - Manage the overall integration of the packaging hardware and enable co-design between relevant stakeholders - Work closely with mechanical designers to define heat spreaders for optimal performance - Deliver and disseminate design milestones to stakeholders - Communicate designs in presentations and relevant documentation - Stay current with the latest developments in packaging technology and design techniques by attending conferences and rea

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Packaging Signal/Power Integrity (SI/PI) Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for modeling and simulation of various packaging solutions from silicon redistribution layers to IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Modeling and simulation of packaging hardware including redistribution layers (e.g., interposers, RDLs), IC substrates, and silicon testchip routing - Work closely with stakeholders to meet design requirements - requirements come from both theory and hardware teams. In some pathfinding projects, you will be asked to participate in creating requirements and novel packaging hardware. - System-level modelling and simulation; end-to-end simulations to ensure designs meet system-level requirements - Deliver and disseminate design milestones to stakeholders - Communicate designs in pr

Job Details: Job Description: The Advanced Packaging Technology Development (APTD) Substrate and Wafer Assembly organization is responsible for developing cutting edge substrate packaging and wafer assembly solutions for our customers. As a member of the Substrate Technology and Manufacturing Group, you will play a critical role in enabling new manufacturing capacity across advanced packaging suppliers. In this position, you will lead substrate supplier development and qualification activities for advanced technologies such as high density FCBGA, EMIB-T and glass core substrate, ensuring suppliers achieve the required readiness to support growing customer demand. This includes driving technical enablement, managing readiness milestones, and collaborating closely with cross functional engineering teams and supplier partners. A combination of detail-oriented project management, strong technical risk assessment / problem solving skills, and effective supplier / stakeholder management will be needed to be successful. Please note: This role requires periodic evening meetings with suppliers in East Asia, as well as occasional travel to supplier sites to support essential program objectives. Key Responsibilities Define process integration roadmaps and establish manufacturing procedures to meet technology transfer milestones. Extract insights from structured and unstructured data, applying statistical analysis and coding techniques for yield improvement. Lead low yield analysis and corrective actions to address quality excursions in high-volume production environments. Drive continuous improvement initiatives to minimize defects and optimize process reliability. Assess quality and reliability risks for manufacturing material and process changes, ensuring sustained product performance. C

Job Details: Job Description: The Role and Impact We are seeking a Module Engineer to play a pivotal role in advancing Intel's high-volume manufacturing capabilities. In this position, you will oversee critical equipment and processes that enable the production of cutting-edge integrated circuits, driving innovation in device miniaturization and semiconductor excellence. Your expertise will directly impact production efficiency, quality, and yield, ensuring Intel maintains its leadership in the semiconductor industry. Business Group Join Intel Corporation's Engineering team, which is dedicated to enabling the rapid advancements of semiconductor manufacturing technologies. This group supports Intel's broader mission of delivering world-class technology solutions by optimizing manufacturing processes, ensuring high-quality outputs, and transferring technology globally. As part of this team, you will collaborate across regions to shape the future of semiconductor innovation. Key Responsibilities - Operate and optimize high-volume manufacturing equipment and processes to maintain control over critical dimensions and defectivity. - Conduct tests and measurements to evaluate equipment and process performance, recommending and implementing modifications to improve productivity and quality. - Execute maintenance, repair, and upgrades for assigned equipment and modules to ensure consistent operational excellence. - Lead continuous improvement initiatives focused on enhancing safety, productivity, cost efficiency, and yield. - Develop and implement excursion prevention systems to detect and address discrepant materials or activities in equipment and processes. - Facilitate technology transfer to global manufacturing sites through training, audits, and documentation to ensure consistent processing across locations. - Oversee installation, conversion, and qualification of

We take play seriously. We’re looking for curious adventurers ready to find their party, fueled by imagination and drive to build what’s never been built before. At Hasbro and Wizards of the Coast, you’ll collaborate with passionate teams to reimagine our iconic brands and create experiences that spark joy, connection, and community through the magic of play. This is your chance to shape legendary play that lasts a lifetime. Purpose of Role • Drive packaging structural simplicity whereas product protection is a primary goal of packaging box. • Oversee packing processes of Hasbro’s products and fully engaged with new packaging designs or improving existing ones to appeal consumer in terms of packaging structure design, quality and cost. • Deliver insights of new paper-making methods such as recycling paper, new techniques for shaping and forming paper, and new materials for use in paper-based products. • Drive strategic next generation materials, engage in hands-on project-based work, and establish key material suppliers’ relationships with a sharp focus on material and process sustainability. Key responsibilities: • Review different types of packaging that commonly applied in Hasbro, design and develop packaging solutions that is safe and cost-effective. • Develop and implement quality control procedures to ensure consistent product quality such as paper, coating, inks and adhesives. • Supports structural packaging initiatives, such as process improvements, material qualification, manufacturing and cost improvements, and sustainability. • Maintain knowledge of industry trend, development and innovation in paper & cardboard materials and printing technology. Act as a SME to educate internal engineers for right use of packaging material, tackle packaging problem in development and manufacturing stage. • Reviewing competitors’ products and pricing to understand market trend and actively connect with Global printers to keep up-to-date packaging design

Silicon Packaging Design Engineer — Arizona, Phoenix. Apply via Workday.

Senior Packaging Technical Engineer - Hardware — 3 Locations. Apply via Workday.

What We're Looking For: We're looking for photonics packaging engineers to contribute to, and own aspects of the A-0 and A-1 packages. This role bridges the classically divided photonics and advanced packaging skillsets, and thus is an unique point in our team. Ideal Background: Experience with integrated photonics package assemblies with multiple dies Experience with integrated circuit MCM assemblies with multiple heterogeneous materials, including compound semiconductors Understanding of photonics concepts, such as mode field diameters, mode mismatch, polarization, etc. Nice to Have: Experience with large device count photonic assemblies Experience with clear underfill Experience with high density fiber attach Experience with large substrate size photonic MCM assemblies Hands-on experience with PIC design

About the Role You will contribute to and own aspects of the Volantis A-0 and A-1 package. We are interested in both people with package design as well as package process development backgrounds Our end goal has challenges to overcome in warpage, CTE mismatch, thermomechanical aspects, assembly speed and more. We're building a wafer-scale package with both silicon and compound semiconductor dies sitting together at very high TDP. This creates both unique challenges and opportunities. The end result is breaking the memory wall, enabling a new era of AI, and a platform that scales another 1-3 orders of magnitude. What We Look For Ability to think from first principles about novel problems- not just applying existing solutions outside of their range of application. What works for 5x reticle platforms may not work for 56x reticle platforms Design or process development of complex packages Nice to Have: Experience with heterogeneous material assemblies Experience with high-TDP packages Experience with compound semiconductor assemblies Experience with co-packaged optics Ability to work with architects to co-design system architecture and package design Experience with interposer platforms such as CoWoS, CoWoS-L, CoWoS-R, EMIB, FoCoS, FoCoS-Bridge, etc Experience with flip-chip integration, especially mass reflow, TCB & LAB Experience with large scale (>50x50mm) substrates Compensation Package: Competitive Base salary + Significant Equity Stake. You'll be well compensated while also owning a piece of the outcome. California Pay Range: $250K-$400K

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking a Package Reliability Engineer to lead reliability engineering for advanced packages used in high-performance AI and computing systems. The primary focus of this role is to assess package level mechanical and thermal reliability risks and apply thermal and mechanical modeling to optimize package design, material selection, and assembly processes. The engineer will also develop reliability test plans with external partners, identify failure mechanisms, perform root-cause analysis, and recommend practical corrective actions. In this role, you will assess package reliability risks from early architecture development through product qualification and high-volume manufacturing. You will work closely with package design, silicon design, system engineering, manufacturing, and ASIC partners to predict package behavior, develop qualification strategies, resolve reliability issues, and improve overall package robustness and lifetime. In this role you will: Lead reliability test plan and assessments for advanced HPC packages, including risk identification, potential failure-mechanism analysis, root-cause investigation, mitigation planning, and corrective-action development. Drive reliability-focused package design optimization based on thermo-mechanical modeling to improve package reliability, power integrity, thermal performance, mechanical robustness, and platform scalability. Develop, validate, and apply package reliability models and lifetime-prediction

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Cleanroom/ Packaging Operations Manager — Skawina, Poland. Apply via Workday.

Fulfillment Packaging Assistant — MD - Columbia. Apply via Workday.

Fulfillment Packaging Assistant — TN - Bartlett. Apply via Workday.