Principal HBM Design Architect — 2 Locations. Apply via Workday.
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Principal HBM Design Architect — Richardson, TX. Apply via Workday.
Principal HBM Design Architect — Richardson, TX. Apply via Workday.
Principal HBM Design Architect — Richardson, TX. Apply via Workday.
The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. NVIDIA’s Silicon Co-Design Group is hiring a Chip Lead to serve as the technical lead for one of our most consequential silicon programs! This is not project management, and it is not a senior IC role. You are the person the program partners with on its hardest technical questions — when the right answer is not obvious, and when leadership needs a single technical perspective to align on direction. You are accountable for the technical integrity of the chip end-to-end. You guide co-design feature integration, help resolve the toughest multi-functional bugs, and serve as the project-specific custodian of the qualification playbook. The program runs cleaner because you are on it! What you’ll be doing: You will partner across design, validation, software, and manufacturing to keep the program’s technical narrative clear and on track. Day to day, you will: Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs. Co-lead program-level feature integration from chip to system, surfacing inter-function dependencies and guiding them to resolution. Help resolve the program’s hardest multi-functional bugs by translating ambiguous, multi-team symptoms into root-cause closure on areas such as HBM, power and thermal, high-speed I/O, and packaging. Steward the qualification playbook. When the playbook does not fit a situation, guide the mitigations and capture the lessons as reusable methodology for other SSG programs. Shape the program’s technical narrative by surfacing key risks, trade
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer at Micron’s HBM New Product Validation team in Boise, ID you will be a senior technical guide responsible for validation strategy and readiness for future-generation High Bandwidth Memory (HBM) products. You will apply deep expertise in complex RAM and high-bandwidth memory architecture and building to establish architecture validation strategies. You will impact decisions that improve validation observability and debug efficiency . You will lead investigations of complex architecture, building , and silicon issues from pre-silicon simulation through post-silicon characterization. You will partner across Design Engineering, Design Validation, Product Engineering, Systems teams, and will develop and promote AI-enabled validation methodologies that improve efficiency, quality, and scalability. Responsibilities: Define architecture-aware validation strategies and coverage direction for future-generation HBM products. Drive validation readiness for next-generation products by preparing strategies, test environments, and execution plans before first silicon, reducing risk, accelerating issue resolution, and preventing late-stage surprises. Evaluate new DRAM/HBM architectural features and define validation requirements and testability needs before DBR. <span style="color:#
Principal Engineer – HBM Design for Test (DFT) — Richardson, TX. Apply via Workday.
Staff/Principal Engineer - HBM Design for Test (DFT) — Richardson, TX. Apply via Workday.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal Analog Design Engineer to lead the design, integration, and delivery of advanced analog and mixed-signal IPs for High Bandwidth Memory (HBM) products. This role is critical in developing and integrating high-performance analog subsystems within the HBM logic die, enabling industry-leading bandwidth, power efficiency, and reliability. As a principal engineer, you will provide deep technical leadership across analog design, IP integration, system alignment, and silicon execution, driving end-to-end success of HBM solutions. Responsibilities will include, but are not limited to: Lead the d esign and own critical HBM analog circuits, including: High ‑ speed transmitters and receivers Clock generation and distribution (PLLs, DLLs, CDRs) SerDes ‑ related analog blocks Biasing, reference, and calibration circuits
Principal Memory Design Engineer, HBM — Richardson, TX. Apply via Workday.
Principal Analog Design Engineer, HBM — Richardson, TX. Apply via Workday.
Principal Memory Design Engineer, HBM — Richardson, TX. Apply via Workday.
Principal Design Verification Engineer, HBM — Richardson, TX. Apply via Workday.
Principal Design Engineer, HBM — Richardson, TX. Apply via Workday.
Principal HBM Tapeout Execution & Release Coordination — Richardson, TX. Apply via Workday.
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