Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Senior Design Engineer is responsible for designing, simulating, and optimizing DRAM circuits while supporting the development of digital and analog circuitry used in advanced memory products. This role collaborates globally across design, verification, product engineering, test, probe, process integration, assembly, and marketing to ensure manufacturable, high‑quality, cost‑optimized solutions. The position drives innovation in future memory generations and contributes to silicon‑to‑system development in a dynamic engineering environment. Responsibilities Design digital, analog, and memory core circuits using CMOS logic and transistors, implementing device specifications from concept to solution. Utilize AI-Enabled tools to assist with schematic editing, data collection and layout floorplan. Create optimized floorplans for circuit placement, routing, power delivery, sense margins, array timing, and die size, including layout leadership. Conduct circuit simulations using FINESIM, HSPICE, and VERILOG; analyze power, performance, reliability, and parasitic impacts. Validate builds through reticle experiments, tape‑out revisions, and simulation‑to‑silicon correlation, identifying required schematic edits. Prepare and maintain design documentation while contributing to best‑known practices and departmental training. Collaborate with global build, verification, product engineering, test, probe, process integration, assembly, and marketing teams to ensure manufacturability and quality. <
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Probe Application Integration Engineer Jobs
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Key Responsibilities Yield & Process Optimization: Collaborate with semiconductor manufacturing engineering teams to analyze inline/param/probe data to identify top yield detractors and drive continuous improvement. Data Pipeline & Automation: Extract, cleanse, and analyze datasets from SQL databases, sensor networks, and fabrication tool logs to support semiconductor manufacturing operations. Advanced Analytics & Modeling: Apply data science techniques, statistical modeling, and machine learning to solve yield issues and support defect reduction strategies. Experimentation Support: Assist process and integration engineers in running and analyzing Design of Experiments (DOE) to enhance process capabilities and margins. Visualization & Communication: Develop automated reports and dashboards using visualization tools (e.g., Dash, Plotly, Angular) to communicate technical concepts and project outcomes effectively to engineering stakeholders. Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Position Overview: As an SPC Engineer, you are responsible for the effectiveness and efficiency of the SPC program. This includes collaborating with Process Engineering, Process Integration, RDA, and Probe departments to ensure they are adhering to the Micron Quality Standards for Statistical Process Control. Additionally, you are responsible for prioritizing inline parameters that need engineering attention, sourcing variation contributors on critical parameters, providing internal customers with SPC performance metrics, and providing CpK metrics to Micron Corporate to be shared with external customers for review. Responsibilities: Implementing SPC Business Process and Best Known Methods Understand the different types of limits used in SPC system and drives the proper use of limits throughout the engineering community Understand proper control techniques (Western Electric Rules, etc.) and enforces use for critical parameters, as needed to detect quality deviations • Works with engineering community to set appropriate goals for SPC metrics (CpK, Cp, Control limits, %OOC, etc.) on a semi-annual basis or as needed Utilize WW SPC Business Process to enforce use of BKM’s with regards to SPC Participates in WW SPC meetings to ensure the best interests of internal/external customers are considered with regards to any modifications to the WW SPC BP and/or BKM’s Regula
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Position Overview: As an SPC Engineer, you are responsible for the effectiveness and efficiency of the SPC program. This includes collaborating with Process Engineering, Process Integration, RDA, and Probe departments to ensure they are adhering to the Micron Quality Standards for Statistical Process Control. Additionally, you are responsible for prioritizing inline parameters that need engineering attention, sourcing variation contributors on critical parameters, providing internal customers with SPC performance metrics, and providing CpK metrics to Micron Corporate to be shared with external customers for review. Responsibilities: Implementing SPC Business Process and Best Known Methods Understand the different types of limits used in SPC system and drives the proper use of limits throughout the engineering community Understand proper control techniques (Western Electric Rules, etc.) and enforces use for critical parameters, as needed to detect quality deviations • Works with engineering community to set appropriate goals for SPC metrics (CpK, Cp, Control limits, %OOC, etc.) on a semi-annual basis or as needed Utilize WW SPC Business Process to enforce use of BKM’s with regards to SPC Participates in WW SPC meetings to ensure the best interests of internal/external customers are considered with regards to any modifications to the WW SPC BP and/or BKM’s Regula
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary: As a Yield Enhancement Engineer of Micron, you will be responsible to define and communicate the issues in processing and designing which should be completed under the situation of limited wafer yield with a fast turnaround and accurate way. Through daily analysis of inline/param/probe/experiments data, achieve the best in class yield ramp as well as quality improvement. Main Responsibilities: Demonstrates thorough understanding of yield data analysis, Wafer Fabrication (Fab) processes and their common effects/signatures on yield/device. Use knowledge of semiconductor device physics, electronics and semiconductor manufacturing process to explain and resolve yield issues using various statistical/data analysis tools. Communicates the process/tool related yield toggles to the Fab process areas and support them in fixing the process/tool. Should have excellent interaction with other internal Yield Enhancement (YE) groups and work to understand their constraints. Create/participate in multi-area focus teams to solve sophisticated yield problems. Publishes a clear Pareto of yield limiters on their specific part type. </p
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities: - To take on reliability accountability for Singapore Fab 10 with cross-functional projects and tasks which include but not limited to Understand semiconductor reliability failure mechanisms and physics Understand RG and FG process technology and risks on manufacturing quality Understand probe testing, device datasheet spec, and device characterization knowledge Accountable for Fab Reliability performance, define Wafer Level Reliability (WLR) sampling plan, Outgoing Quality and Reliability Monitoring (OQRM) matric, Fab process SWR study and conversion risk assessment Partner with Fab 10 PI/ PEE and Global TD, QE, Product, Test engineering team to meet intrinsic targets through process improvement Perform risk assessment on Class 1 and Class 2 process conversions and advise on data collection requirements and conversion roadmap Development of WLR capability as a proxy for equivalent package level reliability test Deep dive in Product Intrinsic Scorecards and Key Metric Understanding (Endurance, Retention, Program Disturb, X-temp, etc) Part of the Fab quality team contributing as SME in reliability fail modes and its associated detec
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Lead Principal Engineer, Layout Design at Micron, you will be at the forefront of developing groundbreaking memory solutions! This role is an outstanding opportunity to lead the physical implementation of modern DRAM and mixed-signal circuits, turning schematics and specifications into flawless, manufacturable layouts. You will collaborate with a world-class team of Circuit Designers, Verification Engineers, CAD/Methodology experts, Process Integrators, Product Engineers, Test/Probe specialists, Assembly professionals, and Marketing strategists. Together, we will drive cost, quality, reliability, time-to-market, and customer happiness through outstanding layout and build. Key Responsibilities Lead the layout build and physical realization of new memory products. Interpret device and circuit specifications to implement custom layout solutions meeting PPA (power, performance, area) and reliability targets. Develop hierarchical layouts for analog, digital, and memory-array-related circuitry using industry-standard EDA tools. Build block and top-level floorplans optimizing placement, routing resources, signal integrity, power delivery, and manufacturability. Optimize layout for critical metrics such as die size/area efficiency, matching, coupling/noise, and timing. Produce layout collateral and documentation for cross-team integration. Physical Verification and Tapeout Signoff Run and debug physical verification flows and ensure closure using indust
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary: As a Yield Enhancement Engineer of Micron, you will be responsible to define and communicate the issues in processing and designing which should be completed under the situation of limited wafer yield with a fast turnaround and accurate way. Through daily analysis of inline/param/probe/experiments data, achieve the best in class yield ramp as well as quality improvement. Main Responsibilities: Demonstrates thorough understanding of yield data analysis, Wafer Fabrication (Fab) processes and their common effects/signatures on yield/device. Use knowledge of semiconductor device physics, electronics and semiconductor manufacturing process to explain and resolve yield issues using various statistical/data analysis tools. Communicates the process/tool related yield toggles to the Fab process areas and support them in fixing the process/tool. Should have excellent interaction with other internal Yield Enhancement (YE) groups and work to understand their constraints. Create/participate in multi-area focus teams to solve sophisticated yield problems. Publishes a clear Pareto of yield limiters on their specific part type. Excellent verbal and written communi
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a HIG IE Engineer, your responsibilities encompass tactical execution and planning to support tactical pillar, CAPEX and OCAP budget management, material planning for wafer probe C1-C4 to Micron IQP, build Business Processes to enable wafer level activities. Also to work as a window for wafer PRIME, pWLR and DOE material acquisition, drive sample deliveries to execution for Wafer Reliability and IQP Reliability. You are also expected to understand procurement of items, inventory logistic management, audits, continual improvements, 6S housekeeping, and project management. It is a must for a HIG PSE IE Engineer to be familiar with Claude Code, AI apps and leveraging AI for work productivity and quality improvements. Responsibilities include, but are not limited to: Able to utilize Claude Code and AI apps in regular work. Proven creation of Claude Code apps (Advantageous with more than one creation) Have clear knowledge of HBM wafer probe operations starting from Assembly to post C4. Have clear knowledge of wafer material acquisition from FE processes. Liaison with NPO, SIC, NPI teams from F15 and OMT. Have knowledge in MES/MAM attributes, tagging of lots from AAA, DAA and NAA lots. Familiar with CBG setting to ensure engineering wafers are not mixed with MFG wafers. Able to track E2E DOEs requests from start to CRD/MAD. Work closely with requestors on process needs. Able to work as a team with fellow members in a safe, cohesive, and collabo
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Design and analyze digital and analog circuits used in the development of memory products. Collaborate with company’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Parasitic modeling and assist in design validation, reticle experiments and required tape-out revisions. Oversee and manage the layout process including floor-planning, placement, and routing. Perform verification processes with modeling and simulation using industry standard simulators. Contribute to cross group communication to work towards standardization and group success. Work with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Drive innovation into the future Memory generations within a dynamic work environment. Employer will accept a Master's degree in Electrical Engineering or related field. Position requires: 1. System Verilog/Verilog/VHDL, 2. C/C++ Programming and Debugging, 3. TCL/Python/Perl, 4. Dig
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products! We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions! In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. You will own physical implementation and top-level integration of large digital designs in our NAND products. Drive blocks and full-chip partitions through synthesis handoff, floorplan, place-and-route, and timing/DRC/LVS closure. Perform hierarchical design planning and top-level assembly. Responsibilities will include, but are not limited to: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions Leading all aspects of and managing the layout process including floor-planning, placement, and routing
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. - PTS (Probe To Ship) yield enhancement to meet BP/LPI target - PTS detractors debugging and improvement actions control - Burn quality ARH/ABI/ABL monitoring, debug and improvement - module HMB1/QMON dpm improvement - Product grade improvement - RMA handling and drive CAPA solutions - product reliability improvement - New product qualification - Qual/QS sample health monitoring and tracking - Wafer outgoing inspection handling and engineering improvement - Global MRB case analysis and handling AI Relevant Job Responsibilities: - Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. - Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. - Ability to apply baseline digital fluency and role‑appropriate AI literacy to use AI‑enabled tools responsibly and effectively for research, analysis, content creation, problem‑solving, operational tasks, and achieving business - Leverage data analytics, automation, and AI solutions to improve engineering productivity and quality monitoring
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Analyze inline/param/probe/DOE data to identify yield detractors and drive continuous improvement. Apply semiconductor device physics, process knowledge, and statistical tools to troubleshoot yield issues. Collaborate with module engineering teams to diagnose process/tool‑related yield variation and ensure timely resolution. Lead or participate in cross‑functional task forces to solve complex yield, defect, or process integration challenges. Perform root‑cause analysis using FMEA, 8D, SPC, and other structured methodologies. Publish clear Pareto analyses and maintain dashboards for assigned product lines. Support new technology transfer, process baseline setup, and qualification activities. Partner with equipment engineering, shift engineering, and quality teams to address long‑term defect or excursion issues. Conduct material, process, and equipment evaluations and recommend optimization strategies. Ensure product performance meets design and reliability requirements and propose corrective actions when gaps exist. Leverage AI-Enabled and AI-Assisted solutions, including Copilot, YMS Genie, Agentic AI, AI Agents, and Large Language Models (LLMs), to accelerate yield analysis, automate engineering workflows, summarize insights, and enhance diagnostic efficiency. Develop and maintain Tableau dashboards and visualization solutions to monitor yield performance, detect abnormal trends, and provide actionable in
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. - PTS (Probe To Ship) yield enhancement to meet BP/LPI target - PTS detractors debugging and improvement actions control - Burn quality ARH/ABI/ABL monitoring, debug and improvement - module HMB1/QMON dpm improvement - Product grade improvement - RMA handling and drive CAPA solutions - product reliability improvement - New product qualification - Qual/QS sample health monitoring and tracking - Wafer outgoing inspection handling and engineering improvement - Global MRB case analysis and handling AI Relevant Job Responsibilities: - Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. - Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. - Ability to apply baseline digital fluency and role‑appropriate AI literacy to use AI‑enabled tools responsibly and effectively for research, analysis, content creation, problem‑solving, operational tasks, and achieving business - Leverage data analytics, automation, and AI solutions to improve engineering productivity and quality monitoring effectiveness. - Develo
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Responsibilities: As an Engineer, TSE Probe Integration at Micron, you will play a crucial role in our ambitious and world-class team. Your responsibilities will include: Supporting the evaluation, fixing, installation, and deployment of Probe FOAK TOR equipment across manufacturing sites. Deploying best-known methods across all sites, addressing TOR procedure gaps and equipment deficiencies, and building and implementing improvements. Partnering with Probe HVM site equipment teams to develop and support new process and technology implementations. Monitoring process efficiency and OEE to identify improvement opportunities and recommend corrective actions. Supporting TOR equipment operating software and software release activities. Evaluating new technologies and FOAK equipment to improve current toolsets and operating methods. Completing assigned projects and tasks independently with a hardworking approach. Traveling domestically or internationally as needed to support business-critical projects and deployments. Adjusting to functional rotations according to business requirements. Bringing to bear AI skills to improve workability and adopting AI-related skills into the work. Leverage AI-enabled tools and data analytics to improve equipment performance, troubleshooting efficiency, and process optimization. Utilize AI and automation solutions to streamline engineering workflows, accelerate pr
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