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Probe Application Integration Engineer Jobs

773 active opportunities · Updated for October 2026

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Explore current probe application integration engineer jobs. Use filters to narrow by work mode, employment type, experience and date posted.

M
Micron
📍 Singapore• Full-time
5mo ago

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Your responsibilities will include, but are not limited to, the following: Assist Process Integration (PI) Engineers to coordinate and trouble shoot daily line issues such as disposition of line deviations and engineering job submissions for analysis. Assist in inline inspection and coordinate non-routine metro/RDA inspection on R&D experiments. Support process flow setup activities for production and the short loop flow. Extract, analyze, and summarize data from SWR and Conversion experiments in a report format and make recommendations to engineering based on the data. Manage wafer shipment logistics between fabs (swap lots and fab-to-fab offloads) for technology transfer and yield learning. Monitor and publish regular updates for priority and WIP lot movements. Monitor key inline/probe/final parametric indices for any deviation and to trigger first level of investigations promptly. Competent in the knowledge and expert usage of Micron’s systems to perform routine operational tasks effectively (Micron Central/DataNav/SPACE etc.). Own or contribute towards activities and projects that impro

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M
Micron
📍 Singapore• Full-time
5mo ago

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Your responsibilities will include, but are not limited to, the following: Assist Process Integration (PI) Engineers to coordinate and trouble shoot daily line issues such as disposition of line deviations and engineering job submissions for analysis. Assist in inline inspection and coordinate non-routine metro/RDA inspection on R&D experiments. Support process flow setup activities for production and the short loop flow. Extract, analyze, and summarize data from SWR and Conversion experiments in a report format and make recommendations to engineering based on the data. Manage wafer shipment logistics between fabs (swap lots and fab-to-fab offloads) for technology transfer and yield learning. Monitor and publish regular updates for priority and WIP lot movements. Monitor key inline/probe/final parametric indices for any deviation and to trigger first level of investigations promptly. Competent in the knowledge and expert usage of Micron’s systems to perform routine operational tasks effectively (Micron Central/DataNav/SPACE etc.). Own or contribute towards activities and projects that improve STC PI operationa

gcpartificial intelligenceai
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M
5mo ago

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Your responsibilities will include, but are not limited to, the following: Assist Process Integration (PI) Engineers to coordinate and trouble shoot daily line issues such as disposition of line deviations and engineering job submissions for analysis. Assist in inline inspection and coordinate non-routine metro/RDA inspection on R&D experiments. Support process flow setup activities for production and the short loop flow. Extract, analyze, and summarize data from SWR and Conversion experiments in a report format and make recommendations to engineering based on the data. Manage wafer shipment logistics between fabs (swap lots and fab-to-fab offloads) for technology transfer and yield learning. Monitor and publish regular updates for priority and WIP lot movements. Monitor key inline/probe/final parametric indices for any deviation and to trigger first level of investigations promptly. Competent in the knowledge and expert usage of Micron’s systems to perform routine operational tasks effectively (Micron Central/DataNav/SPACE etc.). Own or contribute towards activities and projects that improve STC PI operationa

gcpartificial intelligenceai
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M
Micron
📍 United States• Full-time
5mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. This is a hands-on technical role passionate about RTL build, IP integration, debugging, and pre/post-silicon support. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering, Computer

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M
Micron
📍 United States• Full-time
5mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM design organization, building the test architectures that enable the most advanced memory products in the world. Our team works at the intersection of design, manufacturing, and silicon learning to make 3D‑stacked memory reliable at scale. We thrive on deep technical challenges and close collaboration across disciplines! As an HBM Design Architect, you will define how next‑generation HBM products are tested from wafer to system. This role is critical to ensuring quality, yield, and performance across complex multi‑die architectures. You’ll influence product success early, work hands-on with silicon, and partner closely with design, test, and manufacturing teams. Responsibilities: Define and implement end-to-end DFT architectures for HBM base die and DRAM die Develop DFT strategies for stacked-die, cube-level, and system-level test flows Architect test access mechanisms supporting wafer probe through final test Enable silicon observability for yield learning, debug, and failure analysis Collaborate across design, verification, layout, test, and manufacturing teams Minimum Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts Experience with wafer probe and fin

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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Description: Internship to contamination control for cleanroom manufacturing process. Job Scope: Responding to ERT and Security alerts and ensuring that gowning room logistics are adequate when evacuation occurs ​ Responding to contamination alarms and reporting abnormal conditions to engineering and other stake holders Sampling various areas of the Fab for contamination (swab, bacteria, airborne and liquid particles and airborne molecular contamination) and working with the chemical lab to have the samples analyzed and obtaining the data in a timely manner Ensuring that real time monitoring systems are Operating and recording properly Carrying out primary investigation on contamination Issues and providing contamination data to engineering for analysis Completing special projects as well as supporting contamination control engineering projects. Ensuring team Members are practicing approved cleanroom protocol. Acting as contamination control resources to the Fab, Probe, Facilities and supporting groups . Deliverable: Support contamination control team daily operation T

artificial intelligenceailogistics
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M
Micron
📍 United States• Full-time
5mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing collaborators to ensure builds meet manufacturability and quality requirements. Support tape-out execution (checklists, ECO flows, signoff r

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Responsibilities: Lead PI loop structural uniformity integration and cross loop integration projects for critical loops such as Capacitance loop to address yield and quality challenges, collaborating with cross module process/PI technical experts and suppliers to improve integration structures to achieve BIC yield performance. Build Model based root cause analysis and enhance critical inline defense line for structure including uniformity. Maintain and enhance product integration programs or loop domain knowledge and technical expertise, explore innovation opportunities with strategic thinking and systematic approach. Node over node shift left uniformity, bevel and backside BKM implementation at early development stage to accelerate wafer overall and edge yield and quality ramping. Promote worldwide synergy for improved benchmark performance and efficiency gains through global project management and execution, network BKM leveraging and enhancement, and business process creation and re-engineering. Job Requirements: Good logical thinking and knowledge in Semiconductor Fabrication process flows, interaction of different processes and how changes affect yield, device performance and reliability. Understanding of DRAM and NAND operation and structure to decipher parametric, probe and qual data from both front end and backend assembly process. Good model based problem solving together with data driven decision making, and presentation skills. Proven abili

artificial intelligenceaiproject management
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M
6mo ago

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever! We need someone who is passionate about detecting problems, making changes for the better, and seek out innovative ways in how predict device performance! We are an equal opportunity company who values of People, Innovation, Customer Focus, Tenacity and Collaboration. As Yield Failure Analysis Engineer in Micron NAND Technology Integration (NTI) Singapore department, you will be responsible for providing yield analysis for next-generation Micron products. In this exciting role, you will become a domain expert on physical failure analysis methods for any given electrical failure! You will also participate in the identification and communication of yield issues, assist with the root cause analysis for process deviations, characterize, probe, parametric, and fabrication data to identify the sources of failures. Job Responsibility: Perform Failure analysis which includes conducting electrical characterization, perform electrical verification to confirm failures, and understanding PFA techniques available for de-processing failures Dr

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M
Micron
📍 Tokyo• Full-time
6mo ago

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Sr. or Staff Design Engineer in the NVE Design Engineering Analog group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing analog and mixed circuits used in the development of memory products. Designing, simulating, optimizing, and floor planning NAND circuits. Evaluating design feasibility and analyze circuit functionalities. Implementing analog and mixed signal circuit design to meet specifications. Validating design performance and functionalities by running block and chip level simulations using standard industry simulators. Working closely with other functional teams to evaluate, analyze, and improve NAND power consumptions. Collaborate productively with other team members in your team. Review existing and generate new technical documentation. Build and maintain Python-based AI utilities that interfaces with EDA environments to accelerate design tasks such as environment setup, corner execution, regression runs, automated documentation and intelligent/predictive design/layout techniques. Working with and supporting the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.

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M
6mo ago

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Smart Manufacturing I4.0 Analyst at Micron Technology, Inc., you will enable new frontier technology for Smart manufacturing especially in the area of Smart Die Matching, speed, quality and reliability predictions to define and drive end to end smart manufacturing solutions, coordinated across functions of the business. We will look into applying industry-leading methodologies in automation, AI and machine learning to improve Micron’s product development, business and administrative processes across the company. Responsibilities and Tasks Partner with Assembly, Test, Probe, Product & Quality group to drive AI transformation in Smart Die matching as well as SMBP, Machine learning predictions enabling new insights and innovative solutions for Technology acceleration. Conceptualize, Prototype and productize innovative solutions using artificial intelligence, big data to improve/revolutionize Micron manufacturing performance such as Smart Die Matching, SMBP as well as other prediction projects Participate/Lead End-to-End project teams comprising of Data Scientists, Industry 4.0 analysts, Solution Architects & Data Engineers. Provide domain insights into available data, identify gaps

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SA
Scale AI
📍 United States• Full-time• $216K – $270K/yr
7mo ago

Scale Labs, Research Scientist — AI Controls and Monitoring As the leading data and evaluation partner for frontier AI companies, Scale plays an integral role in understanding the capabilities and safeguarding AI models and systems. Building on this expertise, Scale Labs has launched a new team focused on policy research, to bridge the gap between AI research and global policymakers to make informed, scientific decisions about AI risks and capabilities. Our research tackles the hardest problems in agent robustness, AI control protocols, and AI risk evaluations to help governments, industry, and the public understand and mitigate AI risk while maximizing AI adoption. This team collaborates broadly across industry, the public sector, and academia and regularly publishes our findings. We are actively seeking talented researchers to join us in shaping this vision. As a Research Scientist focused on AI Controls and Monitoring, you will design methods, systems, and experiments to ensure that advanced AI models and agents remain aligned with intended goals, even in high-stakes or adversarial environments. For example, you might: Develop monitoring techniques and observability methods that track AI behavior in real time to identify and flag deviations, emergent capabilities, or anomalous outputs; Research mechanisms for layered control, including fail-safes, oversight protocols, and intervention methods that can halt or redirect AI systems when risks are detected; Design red-team simulations to probe weaknesses in oversight and control mechanisms, and build mitigations to close identified gaps; Collaborate with policymakers, engineers, and other researchers to establish standards and benchmarks for AI monitoring and escalation. Ideally you’d have: Commitment to our mission of promoting safe, secure, and trustworthy AI deployments in the industry as frontier AI capabilities continue to advance. Practical experience conducting technical research collaboratively. You should be

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SA
Snorkel AI
📍 New York• Hybrid• $160K – $400K/yr
7mo ago

About Snorkel Snorkel AI is the frontier AI data lab, helping teams build the data and environments behind high-performing frontier and agentic AI. We combine technology with research-driven AI data development to create datasets, benchmarks, evals, and custom solutions for real-world AI systems. Founded out of the Stanford AI Lab in 2019, Snorkel works with leading AI labs and enterprises to move from better data to better outcomes. Excited to help us redefine how AI is built? Apply to be the newest Snorkeler! About the Role Snorkel AI is hiring Forward Deployed Researchers (Multiple levels) who will partner with frontier AI labs on their most challenging data problems. This is a high-impact, customer-facing role that combines deep technical and research credibility with the ability to work directly with customer research teams. You'll partner with customer research teams to design complex data and environments that improve frontier model performance, serving as a thought partner throughout the engagement. You'll work at the critical intersection of research, technical strategy, and customer partnership. This includes scoping training data needs, designing RL environments and tasks, developing evaluation frameworks, probing model behavior and failure modes, and translating customer research objectives into actionable technical plans. Forward Deployed Researchers own a technical domain. You are the person who knows where frontier models fail in it, what data moves those numbers, and what we should build next. Main Responsibilities Own a technical domain end to end: the technical bar for what we build in it, and what we build next Partner with frontier AI research labs to design datasets and environments that improve model performance Lead technical conversations with customer researchers to understand model capabilities, failure modes, data requirements, and success criteria Probe model behavior through systematic evaluation to uncover weaknesses and identify

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities include, but are not limited to · Responsible for the architecture, design, implementation, and validation of analog and mixed-signal circuits used in NAND Flash across the complete design lifecycle. · Design and develop circuits such as charge pumps, amplifiers, voltage regulators, data converters (ADC/DAC), bandgap references, sensor interfaces, and power-management blocks. · Translate system-level requirements into detailed circuit specifications, architectures, schematics, verification plans, and clear design documentation. · Perform transistor-level design and optimization to meet performance, power, area, noise, and reliability targets. · Conduct DC, AC, transient, noise, Monte Carlo, and corner simulations to verify functionality and robustness across process, voltage, and temperature variations. · Validate block- and chip-level design performance using standard industry simulators, including evaluation of parasitic effects and integration quality. · Participate in cross-functional evaluation of key NAND features and collaborate with Product Engineering, Test, Probe, Process Integration, Assembly, and other partner teams. · Analyze design and silicon issues, drive root-cause analysis, and implement robust corrective actions. · Coordinate technical activities for a small team when required, including design reviews, execution tracking, and knowledge sharing. · Deve

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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM design organization, building the test architectures that enable the most advanced memory products in the world. Our team works at the intersection of design, manufacturing, and silicon learning to make 3D‑stacked memory reliable at scale. We thrive on deep technical challenges and close collaboration across disciplines! As an HBM Design Architect, you will define how next‑generation HBM products are tested from wafer to system. This role is critical to ensuring quality, yield, and performance across complex multi‑die architectures. You’ll influence product success early, work hands-on with silicon, and partner closely with design, test, and manufacturing teams. Responsibilities: Define and implement end-to-end DFT architectures for HBM base die and DRAM die Develop DFT strategies for stacked-die, cube-level, and system-level test flows Architect test access mechanisms supporting wafer probe through final test Enable silicon observability for yield learning, debug, and failure analysis Collaborate across design, verification, layout, test, and manufacturing teams Leveraging AI for design quality

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