Probe Application Integration Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Engineer in DRAM Technology Node Development, the role is responsible for bringing up new technology from design start through qualification and production ramp while co-optimizing product and process. Primary Responsibilities Enable new process node startup, qualification, yield and ramp. Provide direction to development teams using process integration knowledge. Develop technology health metrics and drive learning. Work with Design, TD, DFT, Manufacturing and Quality teams. Perform electrical failure analysis and yield improvement activities. Identify design marginalities and recommend fixes. Perform deep statistical analysis to improve product yield. Process–Device Integration & Failure Mechanism Diagnosis Collaborate with Process Integration, TD, Design, Test, and Reliability teams to identify yield‑limiting mechanisms and propose corrective actions. Conduct electrical failure analysis (bench + probe) to isolate circuit, array, or process‑originated signatures. Interpret data from proprietary internal tools (e.g., FRPT/efrpt, csensei, Node Dev analysis workflows). Test Program & Probe Flow Development Guide probe program correctness by correlating design intent, simulation data, and production test behavior. Ide

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Design, implementation, and improvement of Complex Analog Power Management IPs such as Bandgap reference, Voltage/Current reference, Regulators, Charge-pumps, CMOS Amplifiers, Comparators in advanced semiconductor process nodes for advanced DRAM products. Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions. Being responsible for and managing the layout process including floor-planning, placement, and routing. Performing verification processes with modeling and simulation using industry standard simulators. Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Driving innovation into the future Memory generations within a dynamic work environment. Leveraging AI About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description: As a QEM PQE Electrical Failure Analysis (EFA) Engineer, you will be responsible for driving deep technical understanding and resolution of yield, quality, and reliability challenges for advanced NAND memory products manufactured in Fab10. You will support both new product introduction (NPI) and high-volume manufacturing (HVM) by performing die-level electrical analysis, failure mode construction, and innovative characterization to enable robust product qualification and continuous yield improvement. Leveraging strong knowledge in device physics, probe testing, and wafer fabrication processes, you will identify root causes of electrical failures and translate insights into actionable test, process, and design improvements to enhance product performance and outgoing quality. Job Responsibility: Perform electrical failure analysis (EFA) using bench characterization to identify failure mechanisms at die, circuit, and transistor levels Construct failure models and root cause understanding for yield excursion, reliability issues, and customer return cases <

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description What You’ll Do Team Leadership & Talent Development: Lead and develop global engineering and analytics teams across multiple levels. Recruit, mentor, and grow analysts, engineers, and contractors into high–performing contributors. Foster a culture of technical excellence, collaboration, and continuous improvement. Yield & Process Optimization: Collaborate with semiconductor manufacturing engineering teams to analyze inline/param/probe data to identify top yield detractors and drive continuous improvement. Data Pipeline & Automation: Extract, cleanse, and analyze datasets from SQL databases, sensor networks, and fabrication tool logs to support semiconductor manufacturing operations. Advanced Analytics & Modeling: Apply data science techniques, statistical modeling, and machine learning to troubleshoot yield issues and support defect reduction strategies. Experimentation Support: Assist process and integration engineers in running and analyzing Design of Experiments (DOE) to enhance process capabilities and margins. Visualization & Communication: Develop automated reports and dashboards using visualization tools (e.g., Dash, Plotly, streamlit) to communicate technical concepts and project outcomes

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description You must be enrolled in an AAS in Mechatronics, Robotics, Engineering Technology, or related 2 year field of study program! ID1 Expansion is looking for enthusiastic interns to join our state-of-the-art research and development fabrication facility. As one of the most advanced fabs globally, we specialize in various process areas including Wet Etch, Dry Etch, Diffusion, Photolithography, Metrology, RDA, PCVD, CMP, Implantation, and Probe. As a Fab Equipment Maintenance Technician Intern , you will gain a basic knowledge of the semiconductor fabrication process. Interns will be exposed to new technology and the equipment we use in the clean room environment to manufacture the world’s leading memory solutions! Interns receive on-the-job training that includes safety and cleanroom protocol, preventative and corrective maintenance, basic troubleshooting, and our ongoing improvement programs. With knowledge gained, you will have the opportunity to collaborate with cross-functional sub-teams to evaluate methods to optimize the efficiency of equipment maintenance and repairs. Responsibilities and Duties Complete required safety training and conduct all work in accordance with safety policies. On the job training for preventative and corrective maintenance on semiconductor equipment. Receive training and participate in area continuous improvement programs. Partner with operations technicians and shift engineers/technicians to complete daily p

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. About the Role: Lead the Advanced NAND Process Integration team responsible for defining and enabling Micron's next-generation NAND technology roadmap. This role drives technology pathfinding, advanced architecture development, and cross-functional execution while building and leading a high-performing global engineering organization. Key Responsibilities: Drive the NAND technology roadmap, pathfinding strategy, and advanced architecture development by identifying critical technology gaps and leading cross-functional innovation to enable future product requirements. Lead technology development from concept through delivery, including process architecture definition, CSPEC/FMEA development, test vehicle execution, manufacturable solution development, and workflow optimization to accelerate learning and execution. Lead global NAND pathfinding projects in partnership with Device, Design, Probe, Test, Reliability, Yield, Operations, and Process teams to deliver key technology milestones and drive successful execution. Build, develop, and mentor a high-performing engineering team while fostering a culture of technical excellence, collaboration, accountability,

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary As a Data Scientist at Micron, you will employ techniques drawn from mathematics, statistics, and information technology to uncover patterns in data, drive predictive models, and develop actionable solutions for advanced semiconductor manufacturing. Your primary focus will be to support Process Integration and Process Engineering teams to enhance product yield and improve process variation. You will interact closely with multi-functional process areas to solve manufacturing line problems and conduct root cause analysis. In this position, you will help develop software programs, algorithms, and automated processes to cleanse, integrate, and evaluate large datasets from multiple disparate sources—such as inline, param, and probe data—translating them into insights that directly improve process capability and device yield. Key Responsibilities Yield & Process Optimization: Collaborate with semiconductor manufacturing engineering teams to analyze inline/param/probe data to identify top yield detractors and drive continuous improvement. Data Pipeline & Automation: Extract, cleanse, and analyze datasets from SQL databases, sensor networks, and fabrication tool logs to support semiconductor manufacturing operati

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff DFT Design Engineer, you will work on design, simulation, and validation of next generation High Bandwidth Memory (HBM) architectures and circuit blocks. The HBM DFT Design Engineer is responsible for defining, designing, and integrating Design for Test (DFT) architectures for next generation High Bandwidth Memory (HBM) products. This role ensures robust test coverage across wafer, die, stack, and system in package (SiP) test stages while balancing performance, power, area, and manufacturing cost. The engineer works in a multi-functional manner with HBM build, verification, product engineering, test enablement, packaging, and external partners to deliver manufacturable, high quality HBM solutions. Responsibilities will include, but are not limited to: Define and implement HBM DFT architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy test, and at‑speed test structures. Develop DFT solutions for both base die and DRAM die, considering stacked‑die and cube‑level test requirements. Design and integrate test access mechanisms to support wafer probe, cube test, and SiP/system test flows. Collaborate with Product Engineering and Test Enablement teams to align DFT features with manufacturing test flows and cost targets. Support yield learning, failure analysis, and debug by enabling observability and controllability in silicon. Work closely with logic, analog, layout, verification, and physical design teams to ensure DFT is

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Your responsibilities will include, but are not limited to, the following: Primarily focus on wafer matching including lot pairing and execution. Configure the bonding UI and continuously track development lots, including interpreting wafer matching outputs, executing wafer shuffling within the bonding UI, and monitoring subsequent wafer build and pairing. Apply AI-enabled ways of working to improve efficiency in wafer matching operations, lot tracking, data summarization, exception monitoring, and routine reporting where applicable. Assist Process Integration (PI) Engineers to coordinate and trouble shoot daily line issues such as disposition of line deviations and engineering job submissions for analysis. Assist in inline inspection and coordinate non-routine metro/RDA inspection on R&D experiments. Support process flow setup activities for production and the short loop flow. Extract, analyze, and summarize data from SWR and Conversion experiments in a report format and make recommendations to engineering based on the data. Manage wafer shipment logistics between fabs (swap lots and fab-to-fab offloads) for technology transfer and yield learning. Monitor key inline/probe/final parametric indices for any deviation an

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where innovation meets excellence. We are passionate about advancing memory and storage technologies through collaborative engineering and creative problem-solving. Our team works at the forefront of semiconductor design, developing groundbreaking solutions that shape the future of memory products in a dynamic, learning-focused environment. As a Design Engineer, you will play a key role in developing next-generation memory technologies by designing, analyzing, and optimizing digital and analog circuits. You will collaborate with global cross-functional teams throughout the product lifecycle, helping deliver high-quality, manufacturable memory solutions that meet performance, reliability, cost, and customer requirements. Responsibilities: Contribute to the design, layout, verification, and optimization of memory, logic, and analog circuits for new product development Perform parasitic modeling and support design validation, reticle experiments, and tape-out revisions Lead layout activities including floor planning, placement, and routing Partner with Product Engineering, Test, Probe, Assembly, Process Integration, and Marketing teams to ensure manufacturable product designs Collaborate with CAD, modeling, standards, and verification teams to improve design quality and execution Minimum Qualifications: Bachelor’s or Master’s degree in Electrical Engineering Minimum 4 years o

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. You will also work on efforts to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing coll

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Usage & working with AI Skills is must Strong

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Usage & working with AI Skills is must Strong