Process Integration And Defect Reduction Engineer Jobs

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. We are an ambitious AI hardware startup building next-generation accelerators with massive compute density. To achieve aggressive Power, Performance, and Area (PPA) targets on accelerated tapeout schedules, we require a robust, highly automated, and heavily optimized physical implementation and signoff flow. The Role As a Staff / Senior Staff CAD & Methodology Engineer, you will be the resident expert in Innovus and Tempus, responsible for developing, debugging, and continually accelerating our RTL-to-GDSII and timing signoff flows. You will work closely with Physical Design and STA leads to eliminate bottlenecks, automate manual tasks, and push the limits of EDA capabilities at advanced process nodes. Key Responsibilities Flow Architecture & Automation: Architect, develop, and maintain a highly automated, robust, and scalable physical design and signoff flow from synthesis through GDSII, optimized for AI accelerator architectures. Innovus Methodology: Drive advanced physical design methodologies in Cadence Innovus. Optimize recipes for floorplanning, placement, Clock Tree Synthesis (CTS), routing, and power grid implementation to squeeze out maximum PPA. Tempus Signoff Integration: Own the STA and timing signoff methodology using Cadence Tempus. Implement and optimize Distributed Multi-Scenario Analysis (DMSA), advanced OCV methodologies, and automat

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Physical Design Engineer (2-4 Years Experience) We are looking for a high-caliber Physical Design Engineer to join our fast-paced startup team. This role is designed for "top 1%" talent—engineers from tier-1 universities (IIT/NIT/BITS or equivalent) who possess a relentless "go-getter" attitude and the critical thinking skills required to solve complex, next-generation silicon challenges. If you are eager to move beyond standard digital flows into the future of AI-driven automation , this is your playground. Key Responsibilities End-to-End Ownership: Drive RTL-to-GDSII implementation, including floorplanning, placement, CTS, routing, and physical verification (LVS/DRC/ERC). Performance Optimization: Execute high-performance design closure focusing on PPA (Power, Performance, Area) targets in advanced process nodes ( 3nm or below) Static Timing Analysis (STA): Perform comprehensive timing closure, including signal integrity, crosstalk analysis, and CPPR (Common Path Pessimism Removal) optimization. Power Integrity: Conduct IR-drop analysis (Static/Dynamic) and EM (Electromigration) checks to ensure robust power delivery. Innovation: Develop and integrate AI/ML-based automation scripts to optimize the physical design flow and reduce turnaround time. Qualifications &am

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is seeking a highly experienced Staff Engineer for Design Enablement and Layout in Advanced Packaging Technology Development. This role involves coordinating cross-functional engineering teams across geographies to develop and optimize design rules, requirements, design, and layout from early development through manufacturing! Job Description: Responsibilities will include, but are not limited to: Develop and refine Design Rules, Requirements, and Test Structures for advanced packaging. Create layout and DBR test vehicle and product designs to support technology development. Ensure robust Design Rule Checks (DRC) and appropriate responses to deviations. Analyze large datasets to extract meaningful insights and drive data-driven decision-making. Leverage of artificial intelligence to reduce development time. Manage structure evaluation to support development and quantify process margins. Strategically partner with teams to resolve process issues related to layout and prioritize solutions. Document and communicate complex problem resolutions and drive cross-node design rule alignment. Maintain effective communication across Process Integration, Product Engineering, Design, and Advanced Mask teams. Minimum Qualifications: BS/MS/PhD in Electrical Engineering, Microelectronics, Physics, or related field. 5+ years of experience in semiconductor industry in areas such as Process Integration, Yiel

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is seeking an engineer for Design Enablement and Layout in Advanced Packaging Technology Development. This role involves coordinating cross-functional engineering teams across geographies to develop and optimize design rules, requirements, design, and layout from early development through manufacturing! Job Description Key Responsibilities: Develop and refine Design Rules, Requirements, and Test Structures for advanced packaging. Create layout and DBR test vehicle and product designs to support technology development. Ensure robust Design Rule Checks (DRC) and appropriate responses to deviations. Analyze large datasets to extract meaningful insights and drive data-driven decision-making. Leverage of artificial intelligence to reduce development time. Manage structure evaluation to support development and quantify process margins. Strategically partner with teams to resolve process issues related to layout and prioritize solutions. Document and communicate complex problem resolutions and drive cross-node design rule alignment. Maintain effective communication across Process Integration, Product Engineering, Design, and Advanced Mask teams. Minimum Qualifications: BS/MS/PhD in Electrical Engineering, Microelectronics, Physics, or related field. 2+ years of experience in semiconductor industry in areas such as Process Integration, Yield Enhancement, Product Engineering, Design, Test Structure Development

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We have an opening for Yield Analysis Engineer for NAND Technology Department in Singapore. We are looking for candidate that is passionate to innovate in data analytics, and curious to ask "what, how and why"? In this role you will be responsible for providing key feedback and direction on yield improvement activity for NAND memory technology! This role requires a high degree of collaboration across virtually all company functions, up to and including the Executive level. As Yield Analysis Engineer , you will be responsible for developing innovative NAND product technologies, define, and execute various effective actions to enable solutions to improve yield, quality, reliability, and hit key milestones & achieve the required performance within committed timelines. Your responsibilities will include, but are not limited to, the following: Discover yield issues in NAND development and identify unique metric or combination of metrics, such as wafer/dice/tile shading, ECATS or other custom metric for issues quantification Interact with process area, process integration, yield, failure analysis, product engineering, design, and layout teams to drive clear definition of yield, cell, CMOS,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Manufacturing Development Engineering (MDE) Shift Engineer in Wet Etch/CMP/Bond , you will play a critical role in enabling 24/7 process development for next-generation DRAM technologies within the Wet Etch/CMP/Bond Process Areas. This position operates on a 12-hour rotating shift schedule and serves as the primary engineering decision-maker for development activities occurring during off-hours for one of the three listed areas while also supporting the other two areas as needed. You will work closely with Process Development, Process Integration, Equipment Development, Manufacturing, and Shift Operations teams to ensure uninterrupted development execution, increase learning velocity, and support technology roadmap objectives. Unlike traditional manufacturing shift engineering roles, this MDE Shift Engineer operates in a highly dynamic development environment where process conditions, specifications, and experimental flows frequently evolve. This role requires strong engineering judgment to disposition development wafers, make real-time process decisions, troubleshooting process and equipment issues, and appropriately balance execution needs with development objectives. Responsibilities Serve as the primary off-shift engineering decision-maker for development activities, using sound engineering judgment to disposition wafers, release or hold tools, define actions on development targets, respond to process deviations, handle execution risk

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We have an opening for Yield Analysis Engineer for NAND Technology Department in Singapore. We are looking for candidate that is passionate to innovate in data analytics, and curious to ask "what, how and why"? In this role you will be responsible for providing key feedback and direction on yield improvement activity for NAND memory technology! This role requires a high degree of collaboration across virtually all company functions, up to and including the Executive level. As Yield Analysis Engineer , you will be responsible for developing innovative NAND product technologies, define, and execute various effective actions to enable solutions to improve yield, quality, reliability, and hit key milestones & achieve the required performance within committed timelines. Your responsibilities will include, but are not limited to, the following: Discover yield issues in NAND development and identify unique metric or combination of metrics, such as wafer/dice/tile shading, ECATS or other custom metric for issues quantification Interact with process area, process integration, yield, failure analysis, product engineering, design, and layout teams to drive clear definition of yield, cell, CMOS,

Job Title Product Industrialization Project Manager OHC Job Description Job Responsibilities: • Ensures the implementation of process development activities specifically tailored for mid complexity projects to streamline procedures, enhance efficiencies, and ensure optimal outcomes within the defined project scope. • Introduces Design for Lean Manufacturing (DFLM) methodologies into Product Development Lifecycle Management (PDLM) processes, ensuring thorough integration of designs, particularly focusing on mid-complexity projects, to enhance efficiency and streamline production workflows. • Aligns process and equipment capabilities with specified criteria, incorporating process requirements from product specifications provided by I&D and manufacturing requirements to ensure seamless integration and compliance. • Leads timely release of Manufacturing Bill of Materials (BOM) and routes Master data, facilitating seamless integration of product specifications and ensuring efficient execution of manufacturing processes. • Oversees the implementation of complex processes and standards and ensures strict adherence to safety, regulatory, and environmental requirements, alongside local laws, company general business principles, and other relevant policies. • Addresses diverse complex product industrialization challenges through innovative problem-solving, exercising sound judgment in selecting methods and techniques to devise effective solutions tailored to specific circumstances and requirements. • Fosters productive relationships, disseminates expertise, and exerts influence within product industrialization project teams and peer groups, showcasing comprehensive mastery of the specialized domain. • Initiates design changes within factories and at supplier sites, guided by PDLM-managed projects, ensuring seamless integration and adherence to standards and timelines t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Heterogeneous Integration Group (HIG) is shaping the future of AI and accelerated computing by developing advanced memory solutions! The team focuses on designing and optimizing High Bandwidth Memory (HBM) products for AI/ML, high-performance computing (HPC), and data-centric systems, collaborating across global engineering and product teams to deliver industry-leading performance, power efficiency, and reliability! HBM product family is growing due to high demand from industry-leading semiconductor companies. As an HBM Memory Design Engineer you will work closely with cross-functional teams including Design Engineering (DE), Product Engineering (PE), Process Integration, Packaging, and Technology Development (TD) to analyze and resolve silicon issues across HBM products . You will collaborate with architecture to understand new or updated specification requirements and contribute to the implementation, verification, and maintenance of design updates , supporting both silicon release and ongoing product lifecycle needs. This role requires strong AI driven technical execution and the ability to independently drive complex issues to closure. Responsibilities Design Support: Work on HBM product design and support sustaining design maintenance (ECOs/spec changes). Silicon Debug: Own end-to-end debug of silicon, system, and customer issues, driving root-cause analysis and resolution. Cross-Functional Collaboration: Work closely with DE, PE, TD,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Heterogeneous Integration Group (HIG) is shaping the future of AI and accelerated computing by developing advanced memory solutions! The team focuses on designing and optimizing High Bandwidth Memory (HBM) products for AI/ML, high-performance computing (HPC), and data-centric systems, collaborating across global engineering and product teams to deliver industry-leading performance, power efficiency, and reliability! HBM product family is growing due to high demand from industry-leading semiconductor companies. As an HBM Design Engineer, you will work closely with cross-functional teams including Design Engineering (DE), Product Engineering (PE), Process Integration, Packaging, and Technology Development (TD) to analyze and resolve silicon issues across HBM products . You will collaborate with architecture to understand new or updated specification requirements and contribute to the implementation, verification, and maintenance of design updates , supporting both silicon release and ongoing product lifecycle needs. This role requires strong technical execution and the ability to independently drive complex issues to closure. Responsibilities Design Support: Work on HBM product design and support sustaining design maintenance (ECOs/spec changes). Silicon Debug: Own end-to-end debug of silicon, system, and customer issues, driving root-cause analysis and resolution. Cross-Functional Collaboration: Work closely with DE, PE, TD, and system teams

WHO WE ARE: Zinnia is the leading technology platform for accelerating life and annuities growth. With innovative enterprise solutions and data insights, Zinnia simplifies the experience of buying, selling, and administering insurance products. All of which enables more people to protect their financial futures. Our success is driven by a commitment to three core values: be bold, team up, deliver value – and that we do. Zinnia has over $180 billion in assets under administration, serves 100+ carrier clients, 2500 distributors and partners, and over 2 million policyholders. WHO YOU ARE: We are seeking a highly skilled Staff API Developer . As a Staff API Developer, you will be responsible for designing, documenting, and maintaining the enterprise APIs using industry’s best practices and standards. You will work closely with our fellow engineers to implement API gateway capabilities and automate the process for the rest of the Zinnia teams to consume. You will collaborate closely with developers in API management team to create and implement CI/CD process to deploy enterprise APIs and API gateway capabilities. WHAT YOU’LL DO: Design, document, and implement API standards and best practices for Zinnia enterprise APIs. Collaborate with the API management team to implement API gateway capabilities such as traceability, monitoring, security, and analytics. Design and maintain Zinnia’s next level enterprise Search with natural language capabilities and scalability across multiple resources and dataset. Write and maintain existing and new enterprise APIs with polyglot architecture and languages Understand the existing software development and deployment lifecycle for the API management team and help implement the improvements to better the existing process. Catalog existing APIs. Create and maintain developer portal for the enterprise APIs. Implement and automate the unit, functional, integration and contract testing for all internal and external APIs. Write high-qual

Here at Appian, our values of Intensity and Excellence define who we are. We set high standards and live up to them, ensuring that everything we do is done with care and quality. We approach every challenge with ambition and commitment, holding ourselves and each other accountable to achieve the best results. When you join Appian, you’ll be part of a passionate team dedicated to accomplishing hard things, together. Senior Consultant Location: Chennai, India | Work Model: In Office Appian Customer Success is obsessed with delivering exceptional customer outcomes and driving mission-critical business impact. Grounded in our core values of Excellence and Intensity, we act as elite technical advisors to our commercial clients. By joining this high-performance team, you will champion a culture of candid communication and excellence while accelerating global adoption of our AI-Powered Process Automation platform. What You’ll Do Implement Scalable Platform Architecture: Build and maintain standards and tools to ensure high performance and resilience with a focus on reusability, schema design, data modeling , query performance, and responsive UX/UI best practices. Engineered Integrations: Perform hands-on design, code implementation, and unit testing using SQL views , stored procedures , and high-concurrency REST/SOAP web services/APIs . System-Level Troubleshooting: Rapidly diagnose performance bottlenecks, memory usage, CPU constraints, and network latency spikes across the web application stack. Performance Profiling & Analysis: Analyze database execution plans, system logs, and Locust load test outputs to isolate and resolve root-cause performance bottlenecks. Technical Quality & Enablement: Ensure continuous integration and delivery alignment by applying strong DevSecOps practices, robust automated testing, and clean coding standards. Required Qualifications Bachelor’s Degree in Computer Science, Engineering, Information Systems, or Mathematics. 8+ years of pro

Platform Engineering is the department within SRE that is responsible for a range of critical infrastructure and operational functions that support the broader engineering organization. Among these are our multi-cloud-provider Kubernetes infrastructure, networking, load balancing (including our public-facing edge and internal service mesh), and observability and alerting systems. The Deployments team designs and maintains our continuous delivery infrastructure, ensuring reliable code deployment from development through production for all engineering teams. This infrastructure is primarily composed of Argo Workflows and ArgoCD. The team also provides tooling that enables clear system ownership and facilitates self-service onboarding for development teams. We are looking to speak to candidates who can work East Coast hours. The ideal candidate should Have 6+ years of experience in software development and operating distributed systems Proficiency in Python, Go, or a similar language Proven experience building and operating large-scale continuous integration and continuous deployment (CI/CD) pipelines Possess a customer-focused mindset Value efficiency in processes and operations Prefer automation over manual process (“allergic to ops work”). We are a small team of software engineers with a strong bias towards software solutions to avoid toil Experience using and extending containerization technologies, particularly Kubernetes, to enhance application agility, optimize resource utilization, and accelerate time-to-market Expertise in cloud infrastructure platforms, including AWS, Google Cloud Platform (GCP), or Azure Understanding of Linux operating system internals and networking concepts (e.g., TCP/IP, DNS, TLS, routing) Expectations Contribute to developing a world-class continuous deployment experience, enabling the rapid and reliable shipment of MongoDB products This includes, but is not limited to, contributing to open-source projects, or engineering software-based

Platform Engineering is the department within SRE that is responsible for a range of critical infrastructure and operational functions that support the broader engineering organization. Among these are our multi-cloud-provider Kubernetes infrastructure, networking, load balancing (including our public-facing edge and internal service mesh), and observability and alerting systems. The Deployments team designs and maintains our continuous delivery infrastructure, ensuring reliable code deployment from development through production for all engineering teams. This infrastructure is primarily composed of Argo Workflows and ArgoCD. The team also provides tooling that enables clear system ownership and facilitates self-service onboarding for development teams. We are looking to speak to candidates who can work East Coast hours. The ideal candidate should Have 6+ years of experience in software development and operating distributed systems Proficiency in Python, Go, or a similar language Proven experience building and operating large-scale continuous integration and continuous deployment (CI/CD) pipelines Possess a customer-focused mindset Value efficiency in processes and operations Prefer automation over manual process (“allergic to ops work”). We are a small team of software engineers with a strong bias towards software solutions to avoid toil Experience using and extending containerization technologies, particularly Kubernetes, to enhance application agility, optimize resource utilization, and accelerate time-to-market Expertise in cloud infrastructure platforms, including AWS, Google Cloud Platform (GCP), or Azure Understanding of Linux operating system internals and networking concepts (e.g., TCP/IP, DNS, TLS, routing) Expectations Contribute to developing a world-class continuous deployment experience, enabling the rapid and reliable shipment of MongoDB products This includes, but is not limited to, contributing to open-source projects, or engineering software-based

Platform Engineering is the department within SRE that is responsible for a range of critical infrastructure and operational functions that support the broader engineering organization. Among these are our multi-cloud-provider Kubernetes infrastructure, networking, load balancing (including our public-facing edge and internal service mesh), and observability and alerting systems. The Deployments team designs and maintains our continuous delivery infrastructure, ensuring reliable code deployment from development through production for all engineering teams. This infrastructure is primarily composed of Argo Workflows and ArgoCD. The team also provides tooling that enables clear system ownership and facilitates self-service onboarding for development teams. We are looking to speak to candidates who can work East Coast hours. The ideal candidate should Have 6+ years of experience in software development and operating distributed systems Proficiency in Python, Go, or a similar language Proven experience building and operating large-scale continuous integration and continuous deployment (CI/CD) pipelines Possess a customer-focused mindset Value efficiency in processes and operations Prefer automation over manual process (“allergic to ops work”). We are a small team of software engineers with a strong bias towards software solutions to avoid toil Experience using and extending containerization technologies, particularly Kubernetes, to enhance application agility, optimize resource utilization, and accelerate time-to-market Expertise in cloud infrastructure platforms, including AWS, Google Cloud Platform (GCP), or Azure Understanding of Linux operating system internals and networking concepts (e.g., TCP/IP, DNS, TLS, routing) Expectations Contribute to developing a world-class continuous deployment experience, enabling the rapid and reliable shipment of MongoDB products This includes, but is not limited to, contributing to open-source projects, or engineering software-based